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This commit is contained in:
Bernhard Stoeckner
2024-07-09 15:47:48 +02:00
parent e45d91de02
commit caa2dd11a0
44 changed files with 35854 additions and 35675 deletions
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2
src/common/displayport/inc/dp_configcaps.h
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@@ -246,7 +246,7 @@ namespace DisplayPort
virtual bool getOuiSupported() = 0;
virtual AuxRetry::status setOuiSource(unsigned ouiId, const char * model, size_t modelNameLength, NvU8 chipRevision) = 0;
virtual bool getOuiSource(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision) = 0;
virtual bool getOuiSink(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision) = 0;
virtual bool getOuiSink(unsigned &ouiId, unsigned char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision) = 0;
};
class HDCP

2
src/common/displayport/inc/dp_connector.h
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@@ -688,7 +688,7 @@ namespace DisplayPort
virtual bool getHDCPAbortCodesDP12(NvU32 &hdcpAbortCodesDP12) = 0;
virtual bool getOuiSink(unsigned &ouiId, char * modelName,
virtual bool getOuiSink(unsigned &ouiId, unsigned char * modelName,
size_t modelNameBufferSize, NvU8 & chipRevision) = 0;
virtual bool getIgnoreSourceOuiHandshake() = 0;

8
src/common/displayport/inc/dp_connectorimpl.h
View File

@@ -102,9 +102,9 @@ namespace DisplayPort
NvU8 cachedSourceChipRevision;
bool bOuiCached;
unsigned ouiId; // Sink ouiId
char modelName[NV_DPCD_SOURCE_DEV_ID_STRING__SIZE + 1]; // Device Model-name
bool bIgnoreSrcOuiHandshake; // Skip writing source OUI
unsigned ouiId; // Sink ouiId
unsigned char modelName[NV_DPCD_SOURCE_DEV_ID_STRING__SIZE + 1]; // Device Model-name
bool bIgnoreSrcOuiHandshake; // Skip writing source OUI
LinkPolicy linkPolicy;
@@ -624,7 +624,7 @@ namespace DisplayPort
void freeTimeslice(GroupImpl * targetGroup);
void flushTimeslotsToHardware();
bool getHDCPAbortCodesDP12(NvU32 &hdcpAbortCodesDP12);
bool getOuiSink(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision);
bool getOuiSink(unsigned &ouiId, unsigned char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision);
bool hdcpValidateKsv(const NvU8 *ksv, NvU32 Size);
void cancelHdcpCallbacks();
bool handleCPIRQ();

4
src/common/displayport/src/dp_configcaps.cpp
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@@ -865,7 +865,7 @@ struct DPCDHALImpl : DPCDHAL
return true;
}
virtual bool getOuiSink(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision)
virtual bool getOuiSink(unsigned &ouiId, unsigned char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision)
{
NvU8 ouiBuffer[16];
int address = NV_DPCD_SINK_IEEE_OUI;
@@ -903,7 +903,7 @@ struct DPCDHALImpl : DPCDHAL
// Next 6 bytes are Device Identification String, copy as much as we can (limited buffer case).
unsigned int i;
for (i = 0; i < modelNameBufferSize; i++)
modelName[i] = ouiBuffer[3+i];
modelName[i] = (unsigned char)ouiBuffer[3+i];
chipRevision = ouiBuffer[9];

2
src/common/displayport/src/dp_connectorimpl.cpp
View File

@@ -3616,7 +3616,7 @@ bool ConnectorImpl::assessPCONLinkCapability(PCONLinkControl *pConControl)
return true;
}
bool ConnectorImpl::getOuiSink(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision)
bool ConnectorImpl::getOuiSink(unsigned &ouiId, unsigned char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision)
{
if (!previousPlugged || !hal->getOuiSupported())
return false;

12
src/common/displayport/src/dp_wardatabase.cpp
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@@ -66,21 +66,15 @@ void ConnectorImpl::applyOuiWARs()
// Synaptics
case 0x24CC90:
if ((modelName[0] == 'S') && (modelName[1] == 'Y') && (modelName[2] == 'N') &&
(modelName[3] == 'A') && (modelName[4] == 'S') &&
(modelName[3] == 'A') && (((modelName[4] == 'S') &&
((modelName[5] == '1') || (modelName[5] == '2') ||
(modelName[5] == '3') || (modelName[5] == '#') ||
(modelName[5] == '\"')))
(modelName[5] == '\"')))||((modelName[4] == 0x84) &&
(modelName[5] == '0'))))
{
//
// Extended latency from link-train end to FEC enable pattern
// to avoid link lost or blank screen with Synaptics branch.
// (Bug 2561206)
//
// Dock SKU ID:
// Dell Salomon-WD19TB SYNAS1
// HP Hook SYNAS3
// HP Adira-A SYNAS#
// Lenovo SYNAS" / SYNAS2
//
LT2FecLatencyMs = 57;

22
src/common/inc/nvBldVer.h
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@@ -36,25 +36,25 @@
// and then checked back in. You cannot make changes to these sections without
// corresponding changes to the buildmeister script
#ifndef NV_BUILD_BRANCH
#define NV_BUILD_BRANCH r552_52
#define NV_BUILD_BRANCH r550_00
#endif
#ifndef NV_PUBLIC_BRANCH
#define NV_PUBLIC_BRANCH r552_52
#define NV_PUBLIC_BRANCH r550_00
#endif
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS)
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r550/r552_52-292"
#define NV_BUILD_CHANGELIST_NUM (34362171)
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r550/r550_00-326"
#define NV_BUILD_CHANGELIST_NUM (34471492)
#define NV_BUILD_TYPE "Official"
#define NV_BUILD_NAME "rel/gpu_drv/r550/r552_52-292"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34362171)
#define NV_BUILD_NAME "rel/gpu_drv/r550/r550_00-326"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34471492)
#else /* Windows builds */
#define NV_BUILD_BRANCH_VERSION "r552_52-2"
#define NV_BUILD_CHANGELIST_NUM (34331643)
#define NV_BUILD_TYPE "Official"
#define NV_BUILD_NAME "552.55"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34331643)
#define NV_BUILD_BRANCH_VERSION "r550_00-324"
#define NV_BUILD_CHANGELIST_NUM (34468048)
#define NV_BUILD_TYPE "Nightly"
#define NV_BUILD_NAME "r550_00-240627"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34454921)
#define NV_BUILD_BRANCH_BASE_VERSION R550
#endif
// End buildmeister python edited section

2
src/common/inc/nvUnixVersion.h
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@@ -4,7 +4,7 @@
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
(defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
#define NV_VERSION_STRING "550.90.07"
#define NV_VERSION_STRING "550.100"
#else

3
src/common/nvlink/interface/nvlink.h
View File

@@ -516,7 +516,8 @@ NvlStatus nvlink_lib_get_remote_conn_info(nvlink_link *link, nvlink_conn_info *c
*/
NvlStatus nvlink_lib_discover_and_get_remote_conn_info(nvlink_link *end,
nvlink_conn_info *conn_info,
NvU32 flags);
NvU32 flags,
NvBool bForceDiscovery);
/************************************************************************************************/

5
src/common/nvlink/kernel/nvlink/core/nvlink_discovery.c
View File

@@ -48,7 +48,8 @@ nvlink_core_discover_and_get_remote_end
(
nvlink_link *end,
nvlink_link **remote_end,
NvU32 flags
NvU32 flags,
NvBool bForceDiscovery
)
{
nvlink_intranode_conn *conn = NULL;
@@ -68,7 +69,7 @@ nvlink_core_discover_and_get_remote_end
return;
}
if (nvlinkLibCtx.bNewEndpoints)
if (nvlinkLibCtx.bNewEndpoints || bForceDiscovery)
{
if (!_nvlink_core_all_links_initialized())
{

2
src/common/nvlink/kernel/nvlink/interface/nvlink_ioctl_entry.c
View File

@@ -1481,7 +1481,7 @@ _nvlink_lib_ctrl_device_discover_peer_link
(linkMode == NVLINK_LINKSTATE_SLEEP))
{
nvlink_link *remoteLink = NULL;
nvlink_core_discover_and_get_remote_end(link, &remoteLink, 0);
nvlink_core_discover_and_get_remote_end(link, &remoteLink, 0, NV_FALSE);
if (remoteLink == NULL)
{
NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_INFO,

6
src/common/nvlink/kernel/nvlink/interface/nvlink_kern_discovery_entry.c
View File

@@ -183,7 +183,8 @@ nvlink_lib_discover_and_get_remote_conn_info
(
nvlink_link *end,
nvlink_conn_info *conn_info,
NvU32 flags
NvU32 flags,
NvBool bForceDiscovery
)
{
NvlStatus status = NVL_SUCCESS;
@@ -258,7 +259,8 @@ nvlink_lib_discover_and_get_remote_conn_info
conn_info->bConnected = NV_FALSE;
// Get the remote_end of the link
nvlink_core_discover_and_get_remote_end(end, &remote_end, flags);
nvlink_core_discover_and_get_remote_end(end, &remote_end, flags,
bForceDiscovery);
if (remote_end)
{

3
src/common/nvlink/kernel/nvlink/nvlink_helper.h
View File

@@ -175,7 +175,8 @@ void nvlink_core_correlate_conn_by_token(nvlink_link *srcLink, NvU64 writeToken,
*/
void nvlink_core_discover_and_get_remote_end(nvlink_link *end,
nvlink_link **remote_end,
NvU32 flags);
NvU32 flags,
NvBool bForceDiscovery);
/************************************************************************************************/

4
src/common/nvswitch/kernel/lr10/lr10.c
View File

@@ -4075,7 +4075,9 @@ nvswitch_ctrl_get_nvlink_status_lr10
}
else
{
nvlink_lib_discover_and_get_remote_conn_info(link, &conn_info, NVLINK_STATE_CHANGE_SYNC);
nvlink_lib_discover_and_get_remote_conn_info(link, &conn_info,
NVLINK_STATE_CHANGE_SYNC,
NV_FALSE);
}
// Set NVLINK per-link caps

5
src/common/nvswitch/kernel/ls10/minion_ls10.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -285,7 +285,8 @@ nvswitch_minion_send_command_ls10
data = FLD_SET_DRF_NUM(_MINION, _NVLINK_DL_CMD, _FAULT, 1, 0x0);
NVSWITCH_MINION_LINK_WR32_LS10(device, linkNumber, _MINION, _NVLINK_DL_CMD(localLinkNumber), data);
return -NVL_ERR_INVALID_STATE;
return (DRF_VAL(_NVLSTAT, _MN00, _LINK_INTR_SUBCODE, statData) == MINION_ALARM_BUSY) ?
-NVL_ERR_STATE_IN_USE : -NVL_ERR_INVALID_STATE;
}
else
{

27
src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h
View File

@@ -460,11 +460,20 @@ typedef struct NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS {
NV_DECLARE_ALIGNED(NvU64 address, 8);
} NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS;
typedef struct NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO {
NvU32 bank;
NvU32 stackId;
NvU32 row;
NvU32 partition;
NvU32 sublocation;
} NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO;
#define NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_PHYSICAL 0x0
#define NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_RBC 0x1
/*
* NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO
*
* physicalAddress
* Physical address to be remapped
* source
* The reason for retirement. Valid values for this parameter are
* from NV2080_CTRL_FB_REMAPPED_ROW_SOURCE_*
@@ -480,11 +489,23 @@ typedef struct NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS {
* Attempting to remap a reserved row
* NV208F_CTRL_FB_REMAP_ROW_STATUS_INTERNAL_ERROR
* Some other RM failure
* addressType
* Type of address passed. Valid values are:
* NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_PHYSICAL
* The specified address is physical address.
* NV208F_CTRL_FB_REMAP_ROW_ADDRESS_TYPE_RBC
* The specified address is DRAM Row Bank Column address.
* address
* Union of physicalAddress and rbcAddress. Set the appropriate one based on the address type.
*/
typedef struct NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO {
NV_DECLARE_ALIGNED(NvU64 physicalAddress, 8);
NvU8 source;
NvU32 status;
NvU8 addressType;
union {
NV_DECLARE_ALIGNED(NvU64 physicalAddress, 8);
NV208F_CTRL_FB_REMAPPING_RBC_ADDRESS_INFO rbcAddress;
} address;
} NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO;
/* valid values for status */

3
src/common/shared/inc/nvdevid.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 200-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2004-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -632,6 +632,7 @@ enum {
, CS_INTEL_1B81
, CS_INTEL_18DC
, CS_INTEL_7A04
, CS_INTEL_5795
, CS_SIFIVE_FU740_C000
, CS_PLDA_XPRESSRICH_AXI_REF
, CS_AMPERE_AMPEREONE