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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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565.57.01
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@@ -322,6 +322,15 @@
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// Operations not allowed while holding this lock
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// - GPU memory allocation which can evict
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//
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// - Channel pool key rotation lock
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// Order: UVM_LOCK_ORDER_KEY_ROTATION
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// Condition: Confidential Computing is enabled
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// Mutex per channel pool
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//
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// The lock ensures mutual exclusion during key rotation affecting all the
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// channels in the associated pool. Key rotation in WLC pools is handled
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// using a separate lock order, see UVM_LOCK_ORDER_KEY_ROTATION_WLC below.
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//
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// - CE channel CSL channel pool semaphore
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// Order: UVM_LOCK_ORDER_CSL_PUSH
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// Condition: The Confidential Computing feature is enabled
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@@ -338,6 +347,15 @@
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// Operations allowed while holding this lock
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// - Pushing work to CE channels (except for WLC channels)
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//
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// - WLC channel pool key rotation lock
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// Order: UVM_LOCK_ORDER_KEY_ROTATION_WLC
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// Condition: Confidential Computing is enabled
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// Mutex of WLC channel pool
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//
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// The lock has the same purpose as the regular channel pool key rotation
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// lock. Using a different order lock for WLC channels allows key rotation
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// on those channels during indirect work submission.
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//
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// - WLC CSL channel pool semaphore
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// Order: UVM_LOCK_ORDER_CSL_WLC_PUSH
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// Condition: The Confidential Computing feature is enabled
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@@ -484,7 +502,9 @@ typedef enum
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UVM_LOCK_ORDER_CONF_COMPUTING_DMA_BUFFER_POOL,
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UVM_LOCK_ORDER_CHUNK_MAPPING,
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UVM_LOCK_ORDER_PAGE_TREE,
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UVM_LOCK_ORDER_KEY_ROTATION,
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UVM_LOCK_ORDER_CSL_PUSH,
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UVM_LOCK_ORDER_KEY_ROTATION_WLC,
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UVM_LOCK_ORDER_CSL_WLC_PUSH,
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UVM_LOCK_ORDER_CSL_SEC2_PUSH,
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UVM_LOCK_ORDER_PUSH,
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@@ -1208,7 +1228,7 @@ static void __uvm_bit_lock(uvm_bit_locks_t *bit_locks, unsigned long bit)
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{
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int res;
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res = UVM_WAIT_ON_BIT_LOCK(bit_locks->bits, bit, TASK_UNINTERRUPTIBLE);
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res = wait_on_bit_lock(bit_locks->bits, bit, TASK_UNINTERRUPTIBLE);
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UVM_ASSERT_MSG(res == 0, "Uninterruptible task interrupted: %d\n", res);
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uvm_assert_bit_locked(bit_locks, bit);
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}
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