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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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565.57.01
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@@ -62,25 +62,17 @@
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// Message to power down video stream before power down link (set D3)
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#define NV_DP_REGKEY_POWER_DOWN_PHY "DP_POWER_DOWN_PHY"
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//
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// Regkey to re-assess max link if the first assessed link config
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// is lower than the panel max
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//
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#define NV_DP_REGKEY_REASSESS_MAX_LINK "DP_REASSESS_MAX_LINK"
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//
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// DSC capability of downstream device should be decided based on device's own
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// and its parent's DSC capability.
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//
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#define NV_DP_DSC_MST_CAP_BUG_3143315 "DP_DSC_MST_CAP_BUG_3143315"
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//
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// Bug 4388987 : This regkey will disable reading PCON caps for MST.
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//
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#define NV_DP_REGKEY_MST_PCON_CAPS_READ_DISABLED "DP_BUG_4388987_WAR"
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// Bug 4426624: Flush timeslot change to HW when dirty bit is set.
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#define NV_DP_REGKEY_FLUSH_TIMESLOT_INFO_WHEN_DIRTY "DP_BUG_4426624_WAR"
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#define NV_DP_REGKEY_DISABLE_TUNNEL_BW_ALLOCATION "DP_DISABLE_TUNNEL_BW_ALLOCATION"
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//
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@@ -114,9 +106,7 @@ struct DP_REGKEY_DATABASE
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bool bBypassEDPRevCheck;
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bool bDscMstCapBug3143315;
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bool bPowerDownPhyBeforeD3;
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bool bReassessMaxLink;
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bool bMSTPCONCapsReadDisabled;
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bool bFlushTimeslotWhenDirty;
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bool bForceDisableTunnelBwAllocation;
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};
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