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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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565.57.01
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@@ -1,6 +1,6 @@
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//*****************************************************************************
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//
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// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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// SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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// SPDX-License-Identifier: MIT
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//
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// Permission is hereby granted, free of charge, to any person obtaining a
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@@ -341,12 +341,12 @@ typedef struct _TAG_DISPLAYID_2_0_TIMING_9_DESCRIPTOR
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} DISPLAYID_2_0_TIMING_9_DESCRIPTOR;
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// the following fields apply to Timing 9/10 Descriptors
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#define DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD 0
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#define DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_STANDARD_CRT_BASED 0
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#define DISPLAYID_2_0_TIMING_FORMULA_CVT_1_2_REDUCED_BLANKING_1 1
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#define DISPLAYID_2_0_TIMING_FORMULA_CVT_2_0_REDUCED_BLANKING_2 2
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#define DISPLAYID_2_0_TIMING_FORMULA_CVT_2_0_REDUCED_BLANKING_3 3
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#define DISPLAYID_2_0_TIMING_FORMULA_CVT_2_1_REDUCED_BLANKING_2 2
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#define DISPLAYID_2_0_TIMING_FORMULA_CVT_2_1_REDUCED_BLANKING_3 3
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#define DISPLAYID_2_0_TIMING_9_MAX_DESCRIPTORS 18
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#define DISPLAYID_2_0_TIMING_9_MAX_DESCRIPTORS 10
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typedef struct _tagDISPLAYID_2_0_TIMING_9_BLOCK
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{
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@@ -357,6 +357,7 @@ typedef struct _tagDISPLAYID_2_0_TIMING_9_BLOCK
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#define DISPLAYID_2_0_TIMING_10_PAYLOAD_BYTES_6 0
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#define DISPLAYID_2_0_TIMING_10_PAYLOAD_BYTES_7 1
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#define DISPLAYID_2_1_TIMING_10_PAYLOAD_BYTES_8 2
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typedef struct _tagDISPLAYID_2_0_TIMING_10_BLOCK_HEADER
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{
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@@ -368,6 +369,10 @@ typedef struct _tagDISPLAYID_2_0_TIMING_10_BLOCK_HEADER
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NvU8 payload_bytes;
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} DISPLAYID_2_0_TIMING_10_BLOCK_HEADER;
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#define DISPLAYID_2_0_TIMING_10_MAX_6BYTES_DESCRIPTORS 18
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#define DISPLAYID_2_0_TIMING_10_MAX_7BYTES_DESCRIPTORS 16
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#define DISPLAYID_2_1_TIMING_10_MAX_8BYTES_DESCRIPTORS 14
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typedef struct _DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR
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{
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struct {
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@@ -383,6 +388,9 @@ typedef struct _DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR
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NvU8 refresh_rate; // 1 Hz to 256 Hz
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} DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR;
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#define DISPLAYID_2_0_TIMING_10_NOMINAL_MINIMUM_VBLANK 35
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#define DISPLAYID_2_1_TIMING_10_ALTERNATE_MINIMUM_VBLANK 20
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typedef struct _DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR
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{
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DISPLAYID_2_0_TIMING_10_6BYTES_DESCRIPTOR descriptor_6_bytes;
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@@ -391,13 +399,17 @@ typedef struct _DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR
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NvU8 additional_vblank_timing :3;
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} DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR;
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#define DISPLAYID_2_0_TIMING_10_MAX_6BYTES_DESCRIPTORS 18
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#define DISPLAYID_2_0_TIMING_10_MAX_7BYTES_DESCRIPTORS 16
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typedef struct _DISPLAYID_2_1_TIMING_10_8BYTES_DESCRIPTOR
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{
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DISPLAYID_2_0_TIMING_10_7BYTES_DESCRIPTOR descriptor_7_bytes;
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NvU8 additional_mini_vblank :1;
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NvU8 reserved :7;
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} DISPLAYID_2_1_TIMING_10_8BYTES_DESCRIPTOR;
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typedef struct _DISPLAYID_2_0_TIMING_10_BLOCK
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{
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DISPLAYID_2_0_TIMING_10_BLOCK_HEADER header;
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NvU8 descriptors[120];
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NvU8 descriptors[144];
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} DISPLAYID_2_0_TIMING_10_BLOCK;
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#define DISPLAYID_2_0_RANGE_LIMITS_BLOCK_PAYLOAD_LENGTH 9
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