mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-08 17:19:59 +00:00
525.78.01
This commit is contained in:
@@ -119,6 +119,7 @@
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_op(NvlStatus, nvswitch_deassert_link_reset, (nvswitch_device *device, nvlink_link *link), _arch) \
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_op(NvBool, nvswitch_is_soe_supported, (nvswitch_device *device), _arch) \
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_op(NvlStatus, nvswitch_init_soe, (nvswitch_device *device), _arch) \
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_op(void, nvswitch_soe_init_l2_state, (nvswitch_device *device), _arch) \
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_op(NvBool, nvswitch_is_inforom_supported, (nvswitch_device *device), _arch) \
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_op(NvBool, nvswitch_is_spi_supported, (nvswitch_device *device), _arch) \
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_op(NvBool, nvswitch_is_smbpbi_supported, (nvswitch_device *device), _arch) \
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@@ -147,6 +148,7 @@
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_op(void, nvswitch_initialize_oms_state, (nvswitch_device *device, INFOROM_OMS_STATE *pOmsState), _arch) \
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_op(NvlStatus, nvswitch_oms_inforom_flush, (nvswitch_device *device), _arch) \
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_op(void, nvswitch_inforom_ecc_get_total_errors, (nvswitch_device *device, INFOROM_ECC_OBJECT *pEccGeneric, NvU64 *corCount, NvU64 *uncCount), _arch) \
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_op(NvlStatus, nvswitch_inforom_load_obd, (nvswitch_device *device), _arch) \
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_op(NvlStatus, nvswitch_bbx_add_sxid, (nvswitch_device *device, NvU32 exceptionType, NvU32 data0, NvU32 data1, NvU32 data2), _arch) \
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_op(NvlStatus, nvswitch_bbx_unload, (nvswitch_device *device), _arch) \
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_op(NvlStatus, nvswitch_bbx_load, (nvswitch_device *device, NvU64 time_ns, NvU8 osType, NvU32 osVersion), _arch) \
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@@ -218,7 +220,10 @@
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_op(NvlStatus, nvswitch_service_minion_link, (nvswitch_device *device, NvU32 link_id), _arch) \
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_op(NvlStatus, nvswitch_ctrl_get_sw_info, (nvswitch_device *device, NVSWITCH_GET_SW_INFO_PARAMS *p), _arch) \
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_op(NvlStatus, nvswitch_ctrl_get_err_info, (nvswitch_device *device, NVSWITCH_NVLINK_GET_ERR_INFO_PARAMS *ret), _arch) \
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_op(NvlStatus, nvswitch_ctrl_clear_counters, (nvswitch_device *device, NVSWITCH_NVLINK_CLEAR_COUNTERS_PARAMS *ret), _arch)
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_op(NvlStatus, nvswitch_ctrl_clear_counters, (nvswitch_device *device, NVSWITCH_NVLINK_CLEAR_COUNTERS_PARAMS *ret), _arch) \
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_op(NvlStatus, nvswitch_ctrl_set_nvlink_error_threshold, (nvswitch_device *device, NVSWITCH_SET_NVLINK_ERROR_THRESHOLD_PARAMS *pParams), _arch) \
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_op(NvlStatus, nvswitch_ctrl_get_nvlink_error_threshold, (nvswitch_device *device, NVSWITCH_GET_NVLINK_ERROR_THRESHOLD_PARAMS *pParams), _arch) \
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_op(NvlStatus, nvswitch_ctrl_get_board_part_number, (nvswitch_device *device, NVSWITCH_GET_BOARD_PART_NUMBER_VECTOR *p), _arch)
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#define NVSWITCH_HAL_FUNCTION_LIST_LS10(_op, _arch) \
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_op(NvlStatus, nvswitch_launch_ALI, (nvswitch_device *device), _arch) \
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@@ -74,8 +74,15 @@ struct inforom
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struct
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{
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NvBool bValid;
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NvU8 packedObject[INFOROM_OBD_OBJECT_V1_XX_PACKED_SIZE];
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INFOROM_OBD_OBJECT_V1_XX object;
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union {
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NvU8 v1[INFOROM_OBD_OBJECT_V1_XX_PACKED_SIZE];
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NvU8 v2[INFOROM_OBD_OBJECT_V2_XX_PACKED_SIZE];
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} packedObject;
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union {
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INFOROM_OBJECT_HEADER_V1_00 header;
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INFOROM_OBD_OBJECT_V1_XX v1;
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INFOROM_OBD_OBJECT_V2_XX v2;
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} object;
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} OBD;
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struct
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@@ -108,6 +108,12 @@ nvswitch_oms_inforom_flush_lr10
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struct nvswitch_device *device
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);
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NvlStatus
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nvswitch_inforom_load_obd_lr10
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(
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nvswitch_device *device
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);
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NvlStatus
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nvswitch_bbx_add_sxid_lr10
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(
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@@ -652,6 +652,7 @@ NvlStatus nvswitch_ctrl_get_sw_info_lr10(nvswitch_device *device, NVSWITCH_GET_S
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void nvswitch_setup_link_system_registers_lr10(nvswitch_device *device, nvlink_link *link);
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void nvswitch_load_link_disable_settings_lr10(nvswitch_device *device, nvlink_link *link);
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NvBool nvswitch_is_smbpbi_supported_lr10(nvswitch_device *device);
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NvlStatus nvswitch_ctrl_get_board_part_number_lr10(nvswitch_device *device, NVSWITCH_GET_BOARD_PART_NUMBER_VECTOR *p);
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NvlStatus nvswitch_ctrl_set_mc_rid_table_lr10(nvswitch_device *device, NVSWITCH_SET_MC_RID_TABLE_PARAMS *p);
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NvlStatus nvswitch_ctrl_get_mc_rid_table_lr10(nvswitch_device *device, NVSWITCH_GET_MC_RID_TABLE_PARAMS *p);
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@@ -62,4 +62,5 @@ void nvswitch_soe_unregister_events_lr10(nvswitch_device *device);
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void nvswitch_therm_soe_callback_lr10(nvswitch_device *device, union RM_FLCN_MSG *pMsg,
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void *pParams, NvU32 seqDesc, NV_STATUS status);
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NvlStatus nvswitch_soe_register_event_callbacks_lr10(nvswitch_device *device);
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void nvswitch_soe_init_l2_state_lr10(nvswitch_device *device);
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#endif //_SOE_LR10_H_
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@@ -79,6 +79,12 @@ nvswitch_inforom_ecc_get_total_errors_ls10
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NvU64 *pUncorrectedTotal
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);
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NvlStatus
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nvswitch_inforom_load_obd_ls10
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(
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nvswitch_device *device
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);
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NvlStatus
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nvswitch_bbx_add_sxid_ls10
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(
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@@ -371,6 +371,7 @@ typedef struct
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_op(XAL, ) \
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_op(XPL, ) \
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_op(XTL, ) \
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_op(XTL_CONFIG, ) \
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_op(SAW, ) \
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_op(SOE, ) \
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_op(SMR, ) \
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@@ -962,12 +963,14 @@ NvBool nvswitch_i2c_is_device_access_allowed_ls10(nvswitch_device *device, Nv
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NvlStatus nvswitch_minion_get_ali_debug_registers_ls10(nvswitch_device *device, nvlink_link *link, NVSWITCH_MINION_ALI_DEBUG_REGISTERS *params);
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void nvswitch_setup_link_system_registers_ls10(nvswitch_device *device, nvlink_link *link);
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void nvswitch_load_link_disable_settings_ls10(nvswitch_device *device, nvlink_link *link);
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void nvswitch_link_disable_interrupts_ls10(nvswitch_device *device, NvU32 link);
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void nvswitch_execute_unilateral_link_shutdown_ls10(nvlink_link *link);
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void nvswitch_init_dlpl_interrupts_ls10(nvlink_link *link);
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NvlStatus nvswitch_reset_and_drain_links_ls10(nvswitch_device *device, NvU64 link_mask);
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void nvswitch_service_minion_all_links_ls10(nvswitch_device *device);
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NvlStatus nvswitch_ctrl_get_board_part_number_ls10(nvswitch_device *device, NVSWITCH_GET_BOARD_PART_NUMBER_VECTOR *p);
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//
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// SU generated functions
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@@ -988,6 +991,8 @@ NvlStatus nvswitch_reset_and_drain_links_ls10(nvswitch_device *device, NvU64 lin
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void nvswitch_service_minion_all_links_ls10(nvswitch_device *device);
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NvBool nvswitch_is_inforom_supported_ls10(nvswitch_device *device);
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void nvswitch_set_error_rate_threshold_ls10(nvlink_link *link, NvBool bIsDefault);
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void nvswitch_configure_error_rate_threshold_interrupt_ls10(nvlink_link *link, NvBool bEnable);
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#endif //_LS10_H_
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@@ -42,5 +42,6 @@ void nvswitch_soe_unregister_events_ls10(nvswitch_device *device);
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NvlStatus nvswitch_soe_register_event_callbacks_ls10(nvswitch_device *device);
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NvlStatus nvswitch_soe_restore_nport_state_ls10(nvswitch_device *device, NvU32 nport);
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NvlStatus nvswitch_soe_issue_nport_reset_ls10(nvswitch_device *device, NvU32 nport);
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void nvswitch_soe_init_l2_state_ls10(nvswitch_device *device);
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#endif //_SOE_LS10_H_
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@@ -272,8 +272,8 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
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0xa6b0001d, 0x240cf409, 0x001da03e, 0x0049190f, 0x009ff711, 0x00f802f8, 0xb50294b6, 0x00f804b9,
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0xb602af92, 0xb9bc0294, 0xf400f8f9, 0x82f9d430, 0x301590b4, 0xc1b027e1, 0x0ad1b00b, 0x94b6f4bd,
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0x0c91b002, 0x900149fe, 0x9fa04499, 0x20079990, 0x0b99929f, 0x95b29fa0, 0xa0049992, 0x9297b29f,
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0x9fa00499, 0x0005dcdf, 0x90ffbf00, 0x4efe1499, 0xa0a6b201, 0x34ee909f, 0xb4b20209, 0x14bde9a0,
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0x34bd84bd, 0x001eef3e, 0x277e6ab2, 0x49bf001a, 0x4bfea2b2, 0x014cfe01, 0x9044bb90, 0x95f94bcc,
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0x9fa00499, 0x0005dcdf, 0x90ffbf00, 0x4efe1499, 0xa0a6b201, 0x34ee909f, 0xb4b20209, 0x84bde9a0,
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0x14bd34bd, 0x001eef3e, 0x277e6ab2, 0x49bf001a, 0x4bfea2b2, 0x014cfe01, 0x9044bb90, 0x95f94bcc,
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0xb31100b4, 0x008e0209, 0x9e0309b3, 0x010db300, 0x499800a8, 0xb27cb201, 0xfe5bb22a, 0xdd90014d,
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0x3295f938, 0x0be0b40c, 0xa53ed4bd, 0x5fbf001e, 0xf9a6e9bf, 0x34381bf4, 0xe89827b0, 0x987fbf01,
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0xb03302e9, 0xb0b40a00, 0x90b9bc0c, 0x1bf4f9a6, 0x1444df1e, 0xf9180000, 0x0094330c, 0x90f1b206,
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@@ -569,7 +569,7 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
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0x328908f4, 0xfbfa324f, 0xbf02f971, 0xbcb0b2b9, 0xb9a6b0c9, 0xe41708f4, 0xbcffffd9, 0xfba6f09b,
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0x980b08f4, 0xf9a60109, 0xf8050df4, 0xb2dc7202, 0x28d77eed, 0xb201fb00, 0x05ab98b9, 0xdeb2cfb2,
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0xfd729cb2, 0x0042a97e, 0xf0fc00f8, 0xf9fc30f4, 0xbf62f9f0, 0x08e1b0b9, 0xd4b2a5b2, 0xa630c9bc,
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0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x010124bd, 0x763efc06, 0x02f80043,
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0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x24bd0101, 0x763efc06, 0x02f80043,
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0x853e0101, 0x42bc0043, 0x0096b192, 0x060df401, 0x90010049, 0x96ff0399, 0x0b947e04, 0xb23bb200,
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0xdd0c725a, 0x00001200, 0x7e3030bc, 0x320028d7, 0x00a433a1, 0x08b0b434, 0xb209c0b4, 0x1200da2d,
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0x20bc0000, 0x01004e20, 0x0021367e, 0x0a00a033, 0x853e02f8, 0x00da0043, 0xbd000012, 0x01004cb4,
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@@ -2269,8 +2269,8 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0xa1f0af45, 0xc2521354, 0x427cca67, 0x3b102336,
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0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0xcdd28e1e, 0x6000ae0f, 0x492dfb26, 0x422cf074,
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0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0x62f5c2c4, 0xc41c2f31, 0x9af0cbcc, 0xb7efe098,
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0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0x5f24a73a, 0x55cea6d1, 0x59205a69, 0x18a31f2d,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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@@ -272,8 +272,8 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
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0xa6b0001d, 0x240cf409, 0x001da03e, 0x0049190f, 0x009ff711, 0x00f802f8, 0xb50294b6, 0x00f804b9,
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0xb602af92, 0xb9bc0294, 0xf400f8f9, 0x82f9d430, 0x301590b4, 0xc1b027e1, 0x0ad1b00b, 0x94b6f4bd,
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0x0c91b002, 0x900149fe, 0x9fa04499, 0x20079990, 0x0b99929f, 0x95b29fa0, 0xa0049992, 0x9297b29f,
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0x9fa00499, 0x0005dcdf, 0x90ffbf00, 0x4efe1499, 0xa0a6b201, 0x34ee909f, 0xb4b20209, 0x14bde9a0,
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0x34bd84bd, 0x001eef3e, 0x277e6ab2, 0x49bf001a, 0x4bfea2b2, 0x014cfe01, 0x9044bb90, 0x95f94bcc,
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0x9fa00499, 0x0005dcdf, 0x90ffbf00, 0x4efe1499, 0xa0a6b201, 0x34ee909f, 0xb4b20209, 0x84bde9a0,
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0x14bd34bd, 0x001eef3e, 0x277e6ab2, 0x49bf001a, 0x4bfea2b2, 0x014cfe01, 0x9044bb90, 0x95f94bcc,
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0xb31100b4, 0x008e0209, 0x9e0309b3, 0x010db300, 0x499800a8, 0xb27cb201, 0xfe5bb22a, 0xdd90014d,
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0x3295f938, 0x0be0b40c, 0xa53ed4bd, 0x5fbf001e, 0xf9a6e9bf, 0x34381bf4, 0xe89827b0, 0x987fbf01,
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0xb03302e9, 0xb0b40a00, 0x90b9bc0c, 0x1bf4f9a6, 0x1444df1e, 0xf9180000, 0x0094330c, 0x90f1b206,
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@@ -569,7 +569,7 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
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0x328908f4, 0xfbfa324f, 0xbf02f971, 0xbcb0b2b9, 0xb9a6b0c9, 0xe41708f4, 0xbcffffd9, 0xfba6f09b,
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0x980b08f4, 0xf9a60109, 0xf8050df4, 0xb2dc7202, 0x28d77eed, 0xb201fb00, 0x05ab98b9, 0xdeb2cfb2,
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0xfd729cb2, 0x0042a97e, 0xf0fc00f8, 0xf9fc30f4, 0xbf62f9f0, 0x08e1b0b9, 0xd4b2a5b2, 0xa630c9bc,
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0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x010124bd, 0x763efc06, 0x02f80043,
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0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x24bd0101, 0x763efc06, 0x02f80043,
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0x853e0101, 0x42bc0043, 0x0096b192, 0x060df401, 0x90010049, 0x96ff0399, 0x0b947e04, 0xb23bb200,
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0xdd0c725a, 0x00001200, 0x7e3030bc, 0x320028d7, 0x00a433a1, 0x08b0b434, 0xb209c0b4, 0x1200da2d,
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0x20bc0000, 0x01004e20, 0x0021367e, 0x0a00a033, 0x853e02f8, 0x00da0043, 0xbd000012, 0x01004cb4,
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@@ -2269,8 +2269,8 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0xa1f0af45, 0xc2521354, 0x427cca67, 0x3b102336,
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0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0xcdd28e1e, 0x6000ae0f, 0x492dfb26, 0x422cf074,
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0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0x62f5c2c4, 0xc41c2f31, 0x9af0cbcc, 0xb7efe098,
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0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0x5f24a73a, 0x55cea6d1, 0x59205a69, 0x18a31f2d,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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