550.90.07

This commit is contained in:
Bernhard Stoeckner
2024-06-04 13:48:03 +02:00
parent 083cd9cf17
commit e45d91de02
180 changed files with 43467 additions and 38127 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -87,7 +87,7 @@ _nvswitch_fsp_poll_for_queue_empty
do
{
bKeepPolling = nvswitch_timeout_check(&timeout) ? NV_FALSE : NV_TRUE;
bKeepPolling = nvswitch_timeout_check(&timeout) ? NV_FALSE : NV_TRUE;
bMsgqEmpty = _nvswitch_fsp_is_msgq_empty(device);
bCmdqEmpty = _nvswitch_fsp_is_queue_empty(device);
@@ -98,7 +98,7 @@ _nvswitch_fsp_poll_for_queue_empty
//
if (!bCmdqEmpty && !bMsgqEmpty)
{
nvswitch_fsp_read_message(device, NULL, 0);
nvswitch_fsp_read_message(device, NULL, 0, &timeout);
NVSWITCH_PRINT(device, ERROR, "Received error message from FSP while waiting for CMDQ to be empty.\n");
return -NVL_ERR_GENERIC;
}
@@ -125,23 +125,22 @@ _nvswitch_fsp_poll_for_queue_empty
* @brief Poll for response from FSP via RM message queue
*
* @param[in] device nvswitch_device pointer
* @param[in] pTimeout RPC timeout
*
* @return NVL_SUCCESS, or NV_ERR_TIMEOUT
*/
static NvlStatus
_nvswitch_fsp_poll_for_response
(
nvswitch_device *device
nvswitch_device *device,
NVSWITCH_TIMEOUT *pTimeout
)
{
NvBool bKeepPolling;
NVSWITCH_TIMEOUT timeout;
nvswitch_timeout_create(10 * NVSWITCH_INTERVAL_1MSEC_IN_NS, &timeout);
do
{
bKeepPolling = nvswitch_timeout_check(&timeout) ? NV_FALSE : NV_TRUE;
bKeepPolling = nvswitch_timeout_check(pTimeout) ? NV_FALSE : NV_TRUE;
//
// Poll for message queue to wait for FSP's reply
@@ -178,6 +177,8 @@ _nvswitch_fsp_poll_for_response
* @param[in] device nvswitch_device pointer
* @param[in/out] pPayloadBuffer Buffer in which to return message payload
* @param[in] payloadBufferSize Payload buffer size
* @param[in] pTimeout RPC timeout
*
*
* @return NVL_SUCCESS, NV_ERR_INVALID_DATA, NV_ERR_INSUFFICIENT_RESOURCES, or errors
* from functions called within
@@ -187,7 +188,8 @@ nvswitch_fsp_read_message
(
nvswitch_device *device,
NvU8 *pPayloadBuffer,
NvU32 payloadBufferSize
NvU32 payloadBufferSize,
NVSWITCH_TIMEOUT *pTimeout
)
{
NvU8 *pPacketBuffer;
@@ -206,7 +208,7 @@ nvswitch_fsp_read_message
if (pPacketBuffer == NULL)
{
NVSWITCH_PRINT(device, ERROR,
"Failed to allocate memory for GLT!!\n");
"%s: Failed to allocate memory!!\n", __FUNCTION__);
return -NVL_NO_MEM;
}
@@ -219,9 +221,10 @@ nvswitch_fsp_read_message
NvU8 tag;
// Wait for next packet
status = _nvswitch_fsp_poll_for_response(device);
status = _nvswitch_fsp_poll_for_response(device, pTimeout);
if (status != NVL_SUCCESS)
{
NVSWITCH_PRINT(device, ERROR, "%s: Timed out waiting for response from FSP!\n", __FUNCTION__);
goto done;
}
@@ -353,6 +356,7 @@ nvswitch_fsp_send_packet
* @param[in] nvdmType NVDM type of message being sent
* @param[in] pResponsePayload Buffer in which to return response payload
* @param[in] responseBufferSize Response payload buffer size
* @param[in] pTimeout RPC timeout
*
* @return NVL_SUCCESS, or NV_ERR_*
*/
@@ -364,7 +368,8 @@ nvswitch_fsp_send_and_read_message
NvU32 size,
NvU32 nvdmType,
NvU8 *pResponsePayload,
NvU32 responseBufferSize
NvU32 responseBufferSize,
NVSWITCH_TIMEOUT *pTimeout
)
{
NvU32 dataSent, dataRemaining;
@@ -443,12 +448,13 @@ nvswitch_fsp_send_and_read_message
}
}
status = _nvswitch_fsp_poll_for_response(device);
status = _nvswitch_fsp_poll_for_response(device, pTimeout);
if (status != NVL_SUCCESS)
{
NVSWITCH_PRINT(device, ERROR, "%s: Timed out waiting for response from FSP!\n", __FUNCTION__);
goto failed;
}
status = nvswitch_fsp_read_message(device, pResponsePayload, responseBufferSize);
status = nvswitch_fsp_read_message(device, pResponsePayload, responseBufferSize, pTimeout);
failed:
nvswitch_os_free(pBuffer);

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -91,8 +91,8 @@ typedef enum mctp_packet_state
MCTP_PACKET_STATE_SINGLE_PACKET
} MCTP_PACKET_STATE, *PMCTP_PACKET_STATE;
NvlStatus nvswitch_fsp_read_message(nvswitch_device *device, NvU8 *pPayloadBuffer, NvU32 payloadBufferSize);
NvlStatus nvswitch_fsp_read_message(nvswitch_device *device, NvU8 *pPayloadBuffer, NvU32 payloadBufferSize, struct NVSWITCH_TIMEOUT *pTimeout);
NvlStatus nvswitch_fsp_send_packet(nvswitch_device *device, NvU8 *pPacket, NvU32 packetSize);
NvlStatus nvswitch_fsp_send_and_read_message(nvswitch_device *device, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize);
NvlStatus nvswitch_fsp_send_and_read_message(nvswitch_device *device, NvU8 *pPayload, NvU32 size, NvU32 nvdmType, NvU8 *pResponsePayload, NvU32 responseBufferSize, struct NVSWITCH_TIMEOUT *pTimeout);
#endif //_FSPRPC_NVSWITCH_H_

View File

@@ -515,7 +515,7 @@ typedef struct
NV_NPORT_PORTSTAT_LS10(_block, _reg, _idx, ), _data); \
}
#define NVSWITCH_DEFERRED_LINK_STATE_CHECK_INTERVAL_NS ((device->bModeContinuousALI ? 12 : 30) *\
#define NVSWITCH_DEFERRED_LINK_STATE_CHECK_INTERVAL_NS ((device->bModeContinuousALI ? 15 : 30) *\
NVSWITCH_INTERVAL_1SEC_IN_NS)
#define NVSWITCH_DEFERRED_FAULT_UP_CHECK_INTERVAL_NS (12 * NVSWITCH_INTERVAL_1MSEC_IN_NS)

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -585,13 +585,16 @@ nvswitch_fsprpc_get_caps_ls10
TNVL_RPC_CAPS_PAYLOAD payload;
TNVL_RPC_CAPS_RSP_PAYLOAD responsePayload;
NvlStatus status;
NVSWITCH_TIMEOUT timeout;
payload.subMessageId = TNVL_CAPS_SUBMESSAGE_ID;
nvswitch_os_memset(&responsePayload, 0, sizeof(TNVL_RPC_CAPS_RSP_PAYLOAD));
nvswitch_timeout_create(5 * NVSWITCH_INTERVAL_1SEC_IN_NS, &timeout);
status = nvswitch_fsp_send_and_read_message(device,
(NvU8*) &payload, sizeof(TNVL_RPC_CAPS_PAYLOAD), NVDM_TYPE_CAPS_QUERY,
(NvU8*) &responsePayload, sizeof(TNVL_RPC_CAPS_RSP_PAYLOAD));
(NvU8*) &responsePayload, sizeof(TNVL_RPC_CAPS_RSP_PAYLOAD), &timeout);
if (status != NVL_SUCCESS)
{
NVSWITCH_PRINT(device, ERROR, "RPC failed for FSP caps query\n");

View File

@@ -6728,6 +6728,9 @@ _nvswitch_service_nvlipt_lnk_status_ls10
//
_nvswitch_clear_deferred_link_errors_ls10(device, link_id);
chip_device->deferredLinkErrors[link_id].state.lastLinkUpTime = nvswitch_os_get_platform_time();
// Reset NV_NPORT_SCRATCH_WARM_PORT_RESET_REQUIRED to 0x0
NVSWITCH_LINK_WR32(device, link_id, NPORT, _NPORT, _SCRATCH_WARM, 0);
}
else if (mode == NVLINK_LINKSTATE_FAULT)
{

View File

@@ -1664,8 +1664,8 @@ _nvswitch_reset_and_drain_links_ls10
continue;
}
// Initialize select scratch registers to 0x0
device->hal.nvswitch_init_scratch(device);
// Reset NV_NPORT_SCRATCH_WARM_PORT_RESET_REQUIRED to 0x0
NVSWITCH_LINK_WR32(device, link, NPORT, _NPORT, _SCRATCH_WARM, 0);
//
// Step 9.0: Launch ALI training to re-initialize and train the links

View File

@@ -639,6 +639,7 @@ _nvswitch_tnvl_get_cert_chain_from_fsp_ls10
NvlStatus status;
TNVL_GET_ATT_CERTS_CMD_PAYLOAD *pCmdPayload = nvswitch_os_malloc(sizeof(TNVL_GET_ATT_CERTS_CMD_PAYLOAD));
TNVL_GET_ATT_CERTS_RSP_PAYLOAD *pRspPayload = nvswitch_os_malloc(sizeof(TNVL_GET_ATT_CERTS_RSP_PAYLOAD));
NVSWITCH_TIMEOUT timeout;
if (pCmdPayload == NULL || pRspPayload == NULL)
{
@@ -653,9 +654,11 @@ _nvswitch_tnvl_get_cert_chain_from_fsp_ls10
pCmdPayload->minorVersion = 0;
pCmdPayload->majorVersion = 1;
nvswitch_timeout_create(5 * NVSWITCH_INTERVAL_1SEC_IN_NS, &timeout);
status = nvswitch_fsp_send_and_read_message(device,
(NvU8*) pCmdPayload, sizeof(TNVL_GET_ATT_CERTS_CMD_PAYLOAD), NVDM_TYPE_TNVL,
(NvU8*) pRspPayload, sizeof(TNVL_GET_ATT_CERTS_RSP_PAYLOAD));
(NvU8*) pRspPayload, sizeof(TNVL_GET_ATT_CERTS_RSP_PAYLOAD), &timeout);
if (status != NVL_SUCCESS)
{
NVSWITCH_PRINT(device, ERROR,
@@ -762,6 +765,10 @@ nvswitch_tnvl_get_attestation_certificate_chain_ls10
goto ErrorExit;
}
certChainLength = certChainLength -
NVSWITCH_IK_HASH_LENGTH -
NVSWITCH_ATT_CERT_SIZE_FIELD_LENGTH -
NVSWITCH_ATT_RSVD1_FIELD_LENGTH;
//
// pCertChainBufferEnd represents last valid byte for cert buffer.
//
@@ -865,6 +872,7 @@ nvswitch_tnvl_get_attestation_report_ls10
NvlStatus status;
TNVL_GET_ATT_REPORT_CMD_PAYLOAD *pCmdPayload;
TNVL_GET_ATT_REPORT_RSP_PAYLOAD *pRspPayload;
NVSWITCH_TIMEOUT timeout;
if (!nvswitch_is_tnvl_mode_enabled(device))
{
@@ -892,9 +900,11 @@ nvswitch_tnvl_get_attestation_report_ls10
pCmdPayload->majorVersion = 1;
nvswitch_os_memcpy(pCmdPayload->nonce, params->nonce, NVSWITCH_NONCE_SIZE);
nvswitch_timeout_create(10 * NVSWITCH_INTERVAL_1SEC_IN_NS, &timeout);
status = nvswitch_fsp_send_and_read_message(device,
(NvU8*) pCmdPayload, sizeof(TNVL_GET_ATT_REPORT_CMD_PAYLOAD), NVDM_TYPE_TNVL,
(NvU8*) pRspPayload, sizeof(TNVL_GET_ATT_REPORT_RSP_PAYLOAD));
(NvU8*) pRspPayload, sizeof(TNVL_GET_ATT_REPORT_RSP_PAYLOAD), &timeout);
if (status != NVL_SUCCESS)
{
NVSWITCH_PRINT(device, ERROR,
@@ -970,6 +980,7 @@ nvswitch_tnvl_send_fsp_lock_config_ls10
NvlStatus status;
TNVL_LOCK_CONFIG_CMD_PAYLOAD *pCmdPayload;
TNVL_LOCK_CONFIG_RSP_PAYLOAD *pRspPayload;
NVSWITCH_TIMEOUT timeout;
if (!nvswitch_is_tnvl_mode_enabled(device))
{
@@ -995,9 +1006,11 @@ nvswitch_tnvl_send_fsp_lock_config_ls10
pCmdPayload->minorVersion = 0;
pCmdPayload->majorVersion = 1;
nvswitch_timeout_create(5 * NVSWITCH_INTERVAL_1SEC_IN_NS, &timeout);
status = nvswitch_fsp_send_and_read_message(device,
(NvU8*) pCmdPayload, sizeof(TNVL_LOCK_CONFIG_CMD_PAYLOAD), NVDM_TYPE_TNVL,
(NvU8*) pRspPayload, sizeof(TNVL_LOCK_CONFIG_RSP_PAYLOAD));
(NvU8*) pRspPayload, sizeof(TNVL_LOCK_CONFIG_RSP_PAYLOAD), &timeout);
if (status != NVL_SUCCESS)
{
NVSWITCH_PRINT(device, ERROR,