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525.89.02

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This commit is contained in:
Andy Ritger
2023-02-08 10:15:15 -08:00
parent 1dc88ff75e
commit e598191e8e
58 changed files with 1104 additions and 233 deletions
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3
src/common/displayport/src/dp_configcaps.cpp
View File

@@ -830,6 +830,7 @@ struct DPCDHALImpl : DPCDHAL
return bSDPExtnForColorimetry;
}
virtual AuxRetry::status setOuiSource(unsigned ouiId, const char * model, size_t modelNameLength, NvU8 chipRevision)
{
NvU8 ouiBuffer[16];
@@ -887,7 +888,7 @@ struct DPCDHALImpl : DPCDHAL
return false;
}
// The first 3 bytes are IEEE_OUI. 2 hex digits per register.
ouiId = ouiBuffer[0] | (ouiBuffer[1] << 8) | (ouiBuffer[2] << 16);
ouiId = ouiBuffer[2] | (ouiBuffer[1] << 8) | (ouiBuffer[0] << 16);
// Next 6 bytes are Device Identification String, copy as much as we can (limited buffer case).
unsigned int i;

28
src/common/displayport/src/dp_connectorimpl.cpp
View File

@@ -1252,7 +1252,7 @@ bool ConnectorImpl::compoundQueryAttach(Group * target,
(modesetParams.modesetInfo.mode == DSC_DUAL))
{
//
// If DSC is force enabled or DSC_DUAL mode is requested,
// If DSC is force enabled or DSC_DUAL mode is requested,
// then return failure here
//
compoundQueryResult = false;
@@ -1284,19 +1284,19 @@ bool ConnectorImpl::compoundQueryAttach(Group * target,
(NvU32*)(&bitsPerPixelX16))) != NVT_STATUS_SUCCESS)
{
//
// If generating PPS failed
// If generating PPS failed
// AND
// (DSC is force enabled
// OR
// the requested DSC mode = DUAL)
//then
//then
// return failure here
// Else
// Else
// we will check if non DSC path is possible.
//
// If dsc mode = DUAL failed to generate PPS and if we pursue
// non DSC path, DD will still follow 2Head1OR modeset path with
// DSC disabled, eventually leading to HW hang. Bug 3632901
// non DSC path, DD will still follow 2Head1OR modeset path with
// DSC disabled, eventually leading to HW hang. Bug 3632901
//
if ((pDscParams->forceDsc == DSC_FORCE_ENABLE) ||
(modesetParams.modesetInfo.mode == DSC_DUAL))
@@ -2599,7 +2599,7 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr
if (main->isEDP() && nativeDev)
{
// eDP can support DSC with and without FEC
bEnableFEC = bEnableDsc && nativeDev->isFECSupported();
bEnableFEC = bEnableDsc && nativeDev->getFECSupport();
}
else
{
@@ -2697,17 +2697,9 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr
if (main->isEDP() && this->bEnableOuiRestoring)
{
// Power-up eDP and restore eDP OUI if it's powered off now.
bool bPanelPowerOn;
main->getEdpPowerData(&bPanelPowerOn, NULL);
if (!bPanelPowerOn)
{
main->configurePowerState(true);
hal->setOuiSource(cachedSourceOUI,
&cachedSourceModelName[0],
6 /* string length of ieeeOuiDevId */,
cachedSourceChipRevision);
}
main->configurePowerState(true);
hal->setOuiSource(cachedSourceOUI, &cachedSourceModelName[0], 6 /* string length of ieeeOuiDevId */,
cachedSourceChipRevision);
}
// if failed, we're guaranteed that assessed link rate didn't meet the mode requirements

20
src/common/inc/nvBldVer.h
View File

@@ -36,25 +36,25 @@
// and then checked back in. You cannot make changes to these sections without
// corresponding changes to the buildmeister script
#ifndef NV_BUILD_BRANCH
#define NV_BUILD_BRANCH r528_10
#define NV_BUILD_BRANCH r528_37
#endif
#ifndef NV_PUBLIC_BRANCH
#define NV_PUBLIC_BRANCH r528_10
#define NV_PUBLIC_BRANCH r528_37
#endif
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS)
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r525/r528_10-257"
#define NV_BUILD_CHANGELIST_NUM (32360976)
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r525/r528_37-265"
#define NV_BUILD_CHANGELIST_NUM (32376659)
#define NV_BUILD_TYPE "Official"
#define NV_BUILD_NAME "rel/gpu_drv/r525/r528_10-257"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (32360976)
#define NV_BUILD_NAME "rel/gpu_drv/r525/r528_37-265"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (32376659)
#else /* Windows builds */
#define NV_BUILD_BRANCH_VERSION "r528_10-11"
#define NV_BUILD_CHANGELIST_NUM (32327477)
#define NV_BUILD_BRANCH_VERSION "r528_37-4"
#define NV_BUILD_CHANGELIST_NUM (32375411)
#define NV_BUILD_TYPE "Official"
#define NV_BUILD_NAME "528.38"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (32327477)
#define NV_BUILD_NAME "528.46"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (32375411)
#define NV_BUILD_BRANCH_BASE_VERSION R525
#endif
// End buildmeister python edited section

2
src/common/inc/nvUnixVersion.h
View File

@@ -4,7 +4,7 @@
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
(defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
#define NV_VERSION_STRING "525.85.12"
#define NV_VERSION_STRING "525.89.02"
#else

5
src/common/modeset/timing/nvt_edid.c
View File

@@ -32,6 +32,8 @@
#include "edid.h"
PUSH_SEGMENTS
// Macro to declare a TIMING initializer for given parameters without border
@@ -2340,7 +2342,8 @@ NvU32 NvTiming_EDIDStrongValidationMask(NvU8 *pEdid, NvU32 length)
// validate DTD blocks
pDTD = (DETAILEDTIMINGDESCRIPTOR *)&pExt[((EIA861EXTENSION *)pExt)->offset];
while (pDTD->wDTPixelClock != 0 && (NvU8 *)pDTD - pExt < (int)sizeof(EIA861EXTENSION))
while (pDTD->wDTPixelClock != 0 &&
(NvU8 *)pDTD - pExt < (int)sizeof(EIA861EXTENSION))
{
if (parseEdidDetailedTimingDescriptor((NvU8 *)pDTD, NULL) != NVT_STATUS_SUCCESS)
ret |= NVT_EDID_VALIDATION_ERR_MASK(NVT_EDID_VALIDATION_ERR_EXT_DTD);

2
src/common/modeset/timing/nvt_edidext_861.c
View File

@@ -1299,7 +1299,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p,
tag = NVT_CEA861_GET_SHORT_DESCRIPTOR_TAG(p[i]);
payload = NVT_CEA861_GET_SHORT_DESCRIPTOR_SIZE(p[i]);
// move the pointer to the payload section
// move the pointer to the payload section or extended Tag Code
i++;
// NvTiming_EDIDValidationMask will use the different tag/payload value to make sure each of cta861 data block legal

1
src/common/nvswitch/common/inc/rmsoecmdif.h
View File

@@ -89,6 +89,7 @@ typedef struct
RM_SOE_THERM_MSG soeTherm;
RM_FLCN_MSG_SOE_INIT init;
RM_SOE_CHNMGMT_MSG chnmgmt;
RM_SOE_CORE_MSG core;
} msg;
} RM_FLCN_MSG_SOE,
*PRM_FLCN_MSG_SOE;

22
src/common/nvswitch/common/inc/soe/soeifcore.h
View File

@@ -143,6 +143,11 @@ typedef struct
NvU32 nport;
} RM_SOE_CORE_CMD_NPORT_TPROD_STATE;
typedef struct
{
NvU8 cmdType;
} RM_SOE_CORE_CMD_GET_VOLTAGE;
typedef struct
{
NvU8 cmdType;
@@ -157,6 +162,23 @@ typedef union
RM_SOE_CORE_CMD_NPORT_RESET nportReset;
RM_SOE_CORE_CMD_NPORT_STATE nportState;
RM_SOE_CORE_CMD_NPORT_TPROD_STATE nportTprodState;
RM_SOE_CORE_CMD_GET_VOLTAGE getVoltage;
RM_SOE_CORE_CMD_L2_STATE l2State;
} RM_SOE_CORE_CMD;
typedef struct
{
NvU8 msgType;
NvU8 flcnStatus;
NvU32 vdd_mv;
NvU32 dvdd_mv;
NvU32 hvdd_mv;
} RM_SOE_CORE_MSG_GET_VOLTAGE;
typedef union
{
NvU8 msgType;
RM_SOE_CORE_MSG_GET_VOLTAGE getVoltage;
} RM_SOE_CORE_MSG;
#endif // _SOECORE_H_

15
src/common/nvswitch/interface/ctrl_dev_nvswitch.h
View File

@@ -737,6 +737,20 @@ typedef struct nvswitch_get_ingress_response_table_params
} NVSWITCH_GET_INGRESS_RESPONSE_TABLE_PARAMS;
/*
* CTRL_NVSWITCH_GET_VOLTAGE
*
* Zero(0) indicates that a measurement is not available on the current platform.
*
*/
typedef struct
{
NvU32 vdd_mv;
NvU32 dvdd_mv;
NvU32 hvdd_mv;
} NVSWITCH_CTRL_GET_VOLTAGE_PARAMS;
/*
* CTRL_NVSWITCH_GET_ERRORS
*
@@ -3802,6 +3816,7 @@ typedef struct
#define CTRL_NVSWITCH_CLEAR_COUNTERS 0x51
#define CTRL_NVSWITCH_SET_NVLINK_ERROR_THRESHOLD 0x52
#define CTRL_NVSWITCH_GET_NVLINK_ERROR_THRESHOLD 0x53
#define CTRL_NVSWITCH_GET_VOLTAGE 0x55
#define CTRL_NVSWITCH_GET_BOARD_PART_NUMBER 0x54
#ifdef __cplusplus

10
src/common/nvswitch/kernel/flcn/flcnqueue_nvswitch.c
View File

@@ -1168,6 +1168,7 @@ _flcnQueueResponseHandle_IMPL
NV_STATUS status = NV_OK;
RM_FLCN_MSG_GEN *pMsgGen = (RM_FLCN_MSG_GEN *)pMsg;
PFALCON_QUEUE_INFO pQueueInfo = pFlcn->pQueueInfo;
NvU32 msgSize;
NVSWITCH_ASSERT(pQueueInfo != NULL);
@@ -1186,6 +1187,14 @@ _flcnQueueResponseHandle_IMPL
return NV_ERR_GENERIC;
}
// If response was requested
if (pSeqInfo->pMsgResp != NULL && pMsgGen != NULL)
{
NVSWITCH_ASSERT(pSeqInfo->pMsgResp->hdr.size == pMsgGen->hdr.size);
msgSize = pMsgGen->hdr.size - RM_FLCN_QUEUE_HDR_SIZE;
nvswitch_os_memcpy(&pSeqInfo->pMsgResp->msg, &pMsgGen->msg, msgSize);
}
//
// Make a client callback to notify the client that the command has
// completed. Also provide the private client data, the sequence
@@ -1472,6 +1481,7 @@ _flcnQueueCmdPostNonBlocking_IMPL
//
pSeqInfo->pCallback = pCallback;
pSeqInfo->pCallbackParams = pCallbackParams;
pSeqInfo->pMsgResp = (RM_FLCN_MSG_GEN *)pMsg;
pSeqInfo->seqDesc = pQueueInfo->nextSeqDesc++;
// Set the sequence descriptor return value.

5
src/common/nvswitch/kernel/inc/flcn/flcnqueue_nvswitch.h
View File

@@ -30,6 +30,7 @@
*/
#include "nvstatus.h"
#include "flcnifcmn.h"
struct nvswitch_device;
struct NVSWITCH_TIMEOUT;
@@ -226,6 +227,10 @@ typedef struct FLCN_QMGR_SEQ_INFO
* Client-specified params that must be provided to the callback function.
*/
void *pCallbackParams;
/*!
* The client message buffer that will be filled when the sequence completes.
*/
RM_FLCN_MSG_GEN *pMsgResp;
/*!
* CMD Queue associated with this Seq.

1
src/common/nvswitch/kernel/inc/haldef_nvswitch.h
View File

@@ -223,6 +223,7 @@
_op(NvlStatus, nvswitch_ctrl_clear_counters, (nvswitch_device *device, NVSWITCH_NVLINK_CLEAR_COUNTERS_PARAMS *ret), _arch) \
_op(NvlStatus, nvswitch_ctrl_set_nvlink_error_threshold, (nvswitch_device *device, NVSWITCH_SET_NVLINK_ERROR_THRESHOLD_PARAMS *pParams), _arch) \
_op(NvlStatus, nvswitch_ctrl_get_nvlink_error_threshold, (nvswitch_device *device, NVSWITCH_GET_NVLINK_ERROR_THRESHOLD_PARAMS *pParams), _arch) \
_op(NvlStatus, nvswitch_ctrl_therm_read_voltage, (nvswitch_device *device, NVSWITCH_CTRL_GET_VOLTAGE_PARAMS *info), _arch) \
_op(NvlStatus, nvswitch_ctrl_get_board_part_number, (nvswitch_device *device, NVSWITCH_GET_BOARD_PART_NUMBER_VECTOR *p), _arch)
#define NVSWITCH_HAL_FUNCTION_LIST_LS10(_op, _arch) \

7
src/common/nvswitch/kernel/inc/lr10/therm_lr10.h
View File

@@ -55,4 +55,11 @@ nvswitch_monitor_thermal_alert_lr10
nvswitch_device *device
);
NvlStatus
nvswitch_ctrl_therm_read_voltage_lr10
(
nvswitch_device *device,
NVSWITCH_CTRL_GET_VOLTAGE_PARAMS *info
);
#endif //_THERM_LR10_H_

6
src/common/nvswitch/kernel/inc/ls10/therm_ls10.h
View File

@@ -50,4 +50,10 @@ nvswitch_monitor_thermal_alert_ls10
nvswitch_device *device
);
NvlStatus
nvswitch_ctrl_therm_read_voltage_ls10
(
nvswitch_device *device,
NVSWITCH_CTRL_GET_VOLTAGE_PARAMS *info
);
#endif //_THERM_LS10_H_

17
src/common/nvswitch/kernel/lr10/therm_lr10.c
View File

@@ -297,3 +297,20 @@ nvswitch_therm_soe_callback_lr10
}
}
//
// nvswitch_therm_read_voltage
//
// Temperature and voltage are only available on SKUs which have thermal and
// voltage sensors.
//
NvlStatus
nvswitch_ctrl_therm_read_voltage_lr10
(
nvswitch_device *device,
NVSWITCH_CTRL_GET_VOLTAGE_PARAMS *info
)
{
return -NVL_ERR_NOT_SUPPORTED;
}

14
src/common/nvswitch/kernel/ls10/intr_ls10.c
View File

@@ -5498,10 +5498,10 @@ nvswitch_create_deferred_link_state_check_task_ls10
pErrorReportParams->nvlipt_instance = nvlipt_instance;
pErrorReportParams->link = link;
status = nvswitch_task_create_args(device, (void*)pErrorReportParams,
status = nvswitch_task_create_args(device, (void*)pErrorReportParams,
&_nvswitch_deferred_link_state_check_ls10,
NVSWITCH_DEFERRED_LINK_STATE_CHECK_INTERVAL_NS,
NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE |
NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE |
NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS);
}
@@ -5527,7 +5527,7 @@ _nvswitch_deferred_link_errors_check_ls10
void *fn_args
)
{
NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS *pErrorReportParams =
NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS *pErrorReportParams =
(NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS*)fn_args;
NvU32 nvlipt_instance = pErrorReportParams->nvlipt_instance;
NvU32 link = pErrorReportParams->link;
@@ -5550,7 +5550,7 @@ _nvswitch_deferred_link_errors_check_ls10
if (pErrorReportParams)
{
nvswitch_os_free(pErrorReportParams);
nvswitch_os_free(pErrorReportParams);
}
chip_device->deferredLinkErrors[link].bLinkErrorsCallBackEnabled = NV_FALSE;
}
@@ -5566,7 +5566,7 @@ _nvswitch_create_deferred_link_errors_task_ls10
ls10_device *chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device);
NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS *pErrorReportParams;
NvlStatus status;
if (chip_device->deferredLinkErrors[link].bLinkErrorsCallBackEnabled)
{
return;
@@ -7168,7 +7168,7 @@ nvswitch_service_nvldl_fatal_link_ls10
chip_device->deferredLinkErrors[link].fatalIntrMask.dl |= bit;
_nvswitch_create_deferred_link_errors_task_ls10(device, nvlipt_instance, link);
nvswitch_clear_flags(&unhandled, bit);
device->hal.nvswitch_reset_and_drain_links(device, NVBIT64(link));
@@ -7244,7 +7244,7 @@ nvswitch_service_minion_link_ls10
}
unhandled = pending;
FOR_EACH_INDEX_IN_MASK(32, localLinkIdx, pending)
{
link = (instance * NVSWITCH_LINKS_PER_NVLIPT_LS10) + localLinkIdx;

89
src/common/nvswitch/kernel/ls10/therm_ls10.c
View File

@@ -30,6 +30,11 @@
#include "soe/soeiftherm.h"
#include "rmflcncmdif_nvswitch.h"
#include "flcn/flcnable_nvswitch.h"
#include "flcn/flcn_nvswitch.h"
#include "rmflcncmdif_nvswitch.h"
#include "soe/soeifcmn.h"
#include "nvswitch/ls10/dev_therm.h"
//
@@ -454,3 +459,87 @@ nvswitch_therm_soe_callback_ls10
}
}
//
// nvswitch_therm_read_voltage
//
// Temperature and voltage are only available on SKUs which have thermal and
// voltage sensors.
//
NvlStatus
nvswitch_ctrl_therm_read_voltage_ls10
(
nvswitch_device *device,
NVSWITCH_CTRL_GET_VOLTAGE_PARAMS *pParams
)
{
FLCN *pFlcn;
NvU32 cmdSeqDesc;
NV_STATUS status;
NvU8 flcnStatus;
RM_FLCN_CMD_SOE cmd;
RM_FLCN_MSG_SOE msg;
RM_SOE_CORE_CMD_GET_VOLTAGE *pGetVoltageCmd;
NVSWITCH_TIMEOUT timeout;
if (!nvswitch_is_soe_supported(device))
{
return -NVL_ERR_NOT_SUPPORTED;
}
if (pParams == NULL)
{
return -NVL_BAD_ARGS;
}
pFlcn = device->pSoe->pFlcn;
nvswitch_os_memset(pParams, 0, sizeof(NVSWITCH_CTRL_GET_VOLTAGE_PARAMS));
nvswitch_os_memset(&cmd, 0, sizeof(RM_FLCN_CMD_SOE));
nvswitch_os_memset(&msg, 0, sizeof(RM_FLCN_MSG_SOE));
cmd.hdr.unitId = RM_SOE_UNIT_CORE;
cmd.hdr.size = RM_SOE_CMD_SIZE(CORE, GET_VOLTAGE);
msg.hdr.unitId = RM_SOE_UNIT_CORE;
msg.hdr.size = RM_SOE_MSG_SIZE(CORE, GET_VOLTAGE);
pGetVoltageCmd = &cmd.cmd.core.getVoltage;
pGetVoltageCmd->cmdType = RM_SOE_CORE_CMD_GET_VOLTAGE_VALUES;
cmdSeqDesc = 0;
nvswitch_timeout_create(NVSWITCH_INTERVAL_1SEC_IN_NS * 5, &timeout);
status = flcnQueueCmdPostBlocking(device, pFlcn,
(PRM_FLCN_CMD)&cmd,
(PRM_FLCN_MSG)&msg, // pMsg
NULL, // pPayload
SOE_RM_CMDQ_LOG_ID,
&cmdSeqDesc,
&timeout);
if (status != NV_OK)
{
NVSWITCH_PRINT(device, ERROR, "%s: Failed to read VRs 0x%x\n",
__FUNCTION__, status);
return -NVL_ERR_INVALID_STATE;
}
flcnStatus = msg.msg.core.getVoltage.flcnStatus;
if (flcnStatus != FLCN_OK)
{
if (flcnStatus == FLCN_ERR_MORE_PROCESSING_REQUIRED)
{
return -NVL_MORE_PROCESSING_REQUIRED;
}
else
{
return -NVL_ERR_GENERIC;
}
}
pParams->vdd_mv = msg.msg.core.getVoltage.vdd_mv;
pParams->dvdd_mv = msg.msg.core.getVoltage.dvdd_mv;
pParams->hvdd_mv = msg.msg.core.getVoltage.hvdd_mv;
return NVL_SUCCESS;
}

13
src/common/nvswitch/kernel/nvswitch.c
View File

@@ -4722,6 +4722,16 @@ _nvswitch_ctrl_get_nvlink_error_threshold
return device->hal.nvswitch_ctrl_get_nvlink_error_threshold(device, pParams);
}
static NvlStatus
_nvswitch_ctrl_therm_read_voltage
(
nvswitch_device *device,
NVSWITCH_CTRL_GET_VOLTAGE_PARAMS *info
)
{
return device->hal.nvswitch_ctrl_therm_read_voltage(device, info);
}
NvlStatus
nvswitch_lib_ctrl
(
@@ -5058,6 +5068,9 @@ nvswitch_lib_ctrl
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_NVLINK_ERROR_THRESHOLD,
_nvswitch_ctrl_get_nvlink_error_threshold,
NVSWITCH_GET_NVLINK_ERROR_THRESHOLD_PARAMS);
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_VOLTAGE,
_nvswitch_ctrl_therm_read_voltage,
NVSWITCH_CTRL_GET_VOLTAGE_PARAMS);
default:
nvswitch_os_print(NVSWITCH_DBG_LEVEL_INFO, "unknown ioctl %x\n", cmd);

8
src/common/sdk/nvidia/inc/class/cl2080_notification.h
View File

@@ -200,7 +200,8 @@ extern "C" {
#define NV2080_NOTIFIERS_POSSIBLE_ERROR (164)
#define NV2080_NOTIFIERS_NVLINK_INFO_LINK_UP (165)
#define NV2080_NOTIFIERS_NVLINK_INFO_LINK_DOWN (176)
#define NV2080_NOTIFIERS_MAXCOUNT (177)
#define NV2080_NOTIFIERS_HDMI_FRL_RETRAINING_REQUEST (177)
#define NV2080_NOTIFIERS_MAXCOUNT (178)
// Indexed GR notifier reference
#define NV2080_NOTIFIERS_GR(x) ((x == 0) ? (NV2080_NOTIFIERS_GR0) : (NV2080_NOTIFIERS_GR1 + (x - 1)))
@@ -451,6 +452,11 @@ typedef struct Nv2080DstateHdaCodecNotificationRec {
NvU32 dstateHdaCodec;
} Nv2080DstateHdaCodecNotification;
/* HDMI FRL retraining request notification information */
typedef struct Nv2080HdmiFrlRequestNotificationRec {
NvU32 displayId;
} Nv2080HdmiFrlRequestNotification;
/*
* Platform Power Mode event information
*/

9
src/common/shared/msgq/inc/msgq/msgq.h
View File

@@ -177,7 +177,14 @@ int msgqTxSubmitBuffers(msgqHandle handle, unsigned n);
int msgqTxSync(msgqHandle handle);
/**
* @brief Get number of unread messages
* @brief Get number of unread messages in TX channel
* @param handle
* @return Number of messages. 0 if queue is empty or not linked.
*/
unsigned msgqTxGetPending(msgqHandle handle);
/**
* @brief Get number of unread messages in RX channel
* @param handle
* @return Number of messages. 0 if queue is empty or not linked.
*/

13
src/common/shared/msgq/msgq.c
View File

@@ -577,6 +577,19 @@ msgqTxSync(msgqHandle handle) // "transmit"
return msgqTxGetFreeSpace(handle);
}
sysSHARED_CODE unsigned
msgqTxGetPending(msgqHandle handle)
{
msgqMetadata *pQueue = (msgqMetadata*)handle;
if ((pQueue == NULL) || !pQueue->txLinked)
{
return 0;
}
return pQueue->tx.msgCount - msgqTxSync(handle) - 1;
}
/*
*
* Receive code (incoming messages)