570.133.20

This commit is contained in:
Bernhard Stoeckner
2025-04-17 17:56:49 +02:00
parent c5e439fea4
commit e89faf0aec
15 changed files with 47 additions and 105 deletions

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@@ -1,7 +1,7 @@
# NVIDIA Linux Open GPU Kernel Module Source # NVIDIA Linux Open GPU Kernel Module Source
This is the source release of the NVIDIA Linux open GPU kernel modules, This is the source release of the NVIDIA Linux open GPU kernel modules,
version 570.133.07. version 570.133.20.
## How to Build ## How to Build
@@ -17,7 +17,7 @@ as root:
Note that the kernel modules built here must be used with GSP Note that the kernel modules built here must be used with GSP
firmware and user-space NVIDIA GPU driver components from a corresponding firmware and user-space NVIDIA GPU driver components from a corresponding
570.133.07 driver release. This can be achieved by installing 570.133.20 driver release. This can be achieved by installing
the NVIDIA GPU driver from the .run file using the `--no-kernel-modules` the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
option. E.g., option. E.g.,
@@ -185,7 +185,7 @@ table below).
For details on feature support and limitations, see the NVIDIA GPU driver For details on feature support and limitations, see the NVIDIA GPU driver
end user README here: end user README here:
https://us.download.nvidia.com/XFree86/Linux-x86_64/570.133.07/README/kernel_open.html https://us.download.nvidia.com/XFree86/Linux-x86_64/570.133.20/README/kernel_open.html
For vGPU support, please refer to the README.vgpu packaged in the vGPU Host For vGPU support, please refer to the README.vgpu packaged in the vGPU Host
Package for more details. Package for more details.
@@ -943,11 +943,11 @@ Subsystem Device ID.
| NVIDIA B200 | 2901 10DE 1999 | | NVIDIA B200 | 2901 10DE 1999 |
| NVIDIA B200 | 2901 10DE 199B | | NVIDIA B200 | 2901 10DE 199B |
| NVIDIA B200 | 2901 10DE 20DA | | NVIDIA B200 | 2901 10DE 20DA |
| NVIDIA HGX GB200 | 2941 10DE 2046 | | NVIDIA GB200 | 2941 10DE 2046 |
| NVIDIA HGX GB200 | 2941 10DE 20CA | | NVIDIA GB200 | 2941 10DE 20CA |
| NVIDIA HGX GB200 | 2941 10DE 20D5 | | NVIDIA GB200 | 2941 10DE 20D5 |
| NVIDIA HGX GB200 | 2941 10DE 21C9 | | NVIDIA GB200 | 2941 10DE 21C9 |
| NVIDIA HGX GB200 | 2941 10DE 21CA | | NVIDIA GB200 | 2941 10DE 21CA |
| NVIDIA GeForce RTX 5090 | 2B85 | | NVIDIA GeForce RTX 5090 | 2B85 |
| NVIDIA GeForce RTX 5090 D | 2B87 | | NVIDIA GeForce RTX 5090 D | 2B87 |
| NVIDIA RTX PRO 6000 Blackwell Workstation Edition | 2BB1 1028 204B | | NVIDIA RTX PRO 6000 Blackwell Workstation Edition | 2BB1 1028 204B |

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@@ -86,7 +86,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc
EXTRA_CFLAGS += -I$(src) EXTRA_CFLAGS += -I$(src)
EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args
EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
EXTRA_CFLAGS += -DNV_VERSION_STRING=\"570.133.07\" EXTRA_CFLAGS += -DNV_VERSION_STRING=\"570.133.20\"
ifneq ($(SYSSRCHOST1X),) ifneq ($(SYSSRCHOST1X),)
EXTRA_CFLAGS += -I$(SYSSRCHOST1X) EXTRA_CFLAGS += -I$(SYSSRCHOST1X)

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@@ -345,8 +345,6 @@ extern int nv_pat_mode;
#define NV_PAGE_COUNT(page) \ #define NV_PAGE_COUNT(page) \
((unsigned int)page_count(page)) ((unsigned int)page_count(page))
#define NV_GET_PAGE_COUNT(page_ptr) \
(NV_PAGE_COUNT(NV_GET_PAGE_STRUCT(page_ptr->phys_addr)))
#define NV_GET_PAGE_FLAGS(page_ptr) \ #define NV_GET_PAGE_FLAGS(page_ptr) \
(NV_GET_PAGE_STRUCT(page_ptr->phys_addr)->flags) (NV_GET_PAGE_STRUCT(page_ptr->phys_addr)->flags)
@@ -1161,10 +1159,6 @@ typedef struct nvidia_pte_s {
NvU64 phys_addr; NvU64 phys_addr;
unsigned long virt_addr; unsigned long virt_addr;
NvU64 dma_addr; NvU64 dma_addr;
#ifdef CONFIG_XEN
unsigned int guest_pfn;
#endif
unsigned int page_count;
} nvidia_pte_t; } nvidia_pte_t;
#if defined(CONFIG_DMA_SHARED_BUFFER) #if defined(CONFIG_DMA_SHARED_BUFFER)

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@@ -183,7 +183,7 @@ static inline const struct cpumask *uvm_cpumask_of_node(int node)
printk(fmt, ##__VA_ARGS__); \ printk(fmt, ##__VA_ARGS__); \
} while (0) } while (0)
#define NV_UVM_GFP_FLAGS (GFP_KERNEL) #define NV_UVM_GFP_FLAGS (GFP_KERNEL | __GFP_NOMEMALLOC)
#if defined(NVCPU_X86) #if defined(NVCPU_X86)
/* Some old IA32 kernels don't have 64/64 division routines, /* Some old IA32 kernels don't have 64/64 division routines,

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@@ -1569,7 +1569,7 @@ static NV_STATUS block_alloc_cpu_chunk(uvm_va_block_t *block,
if (status == NV_OK) if (status == NV_OK)
break; break;
if (flags & UVM_CPU_CHUNK_ALLOC_FLAGS_STRICT) { if ((flags & UVM_CPU_CHUNK_ALLOC_FLAGS_STRICT) && (num_possible_nodes() > 1)) {
flags &= ~UVM_CPU_CHUNK_ALLOC_FLAGS_STRICT; flags &= ~UVM_CPU_CHUNK_ALLOC_FLAGS_STRICT;
numa_fallback = true; numa_fallback = true;
status = uvm_cpu_chunk_alloc(alloc_size, flags, NUMA_NO_NODE, chunk); status = uvm_cpu_chunk_alloc(alloc_size, flags, NUMA_NO_NODE, chunk);

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@@ -431,7 +431,6 @@ NV_STATUS nv_alloc_contig_pages(
page_ptr = at->page_table[i]; page_ptr = at->page_table[i];
page_ptr->phys_addr = phys_addr; page_ptr->phys_addr = phys_addr;
page_ptr->page_count = NV_GET_PAGE_COUNT(page_ptr);
page_ptr->virt_addr = virt_addr; page_ptr->virt_addr = virt_addr;
page_ptr->dma_addr = nv_phys_to_dma(dev, page_ptr->phys_addr); page_ptr->dma_addr = nv_phys_to_dma(dev, page_ptr->phys_addr);
@@ -486,17 +485,6 @@ void nv_free_contig_pages(
{ {
page_ptr = at->page_table[i]; page_ptr = at->page_table[i];
if (NV_GET_PAGE_COUNT(page_ptr) != page_ptr->page_count)
{
static int count = 0;
if (count++ < NV_MAX_RECURRING_WARNING_MESSAGES)
{
nv_printf(NV_DBG_ERRORS,
"NVRM: VM: %s: page count != initial page count (%u,%u)\n",
__FUNCTION__, NV_GET_PAGE_COUNT(page_ptr),
page_ptr->page_count);
}
}
NV_MAYBE_UNRESERVE_PAGE(page_ptr); NV_MAYBE_UNRESERVE_PAGE(page_ptr);
} }
@@ -600,7 +588,6 @@ NV_STATUS nv_alloc_system_pages(
page_ptr = at->page_table[(i * os_pages_in_page) + sub_page_idx]; page_ptr = at->page_table[(i * os_pages_in_page) + sub_page_idx];
page_ptr->phys_addr = phys_addr; page_ptr->phys_addr = phys_addr;
page_ptr->page_count = NV_GET_PAGE_COUNT(page_ptr);
page_ptr->virt_addr = sub_page_virt_addr; page_ptr->virt_addr = sub_page_virt_addr;
// //
@@ -667,18 +654,6 @@ void nv_free_system_pages(
{ {
page_ptr = at->page_table[i]; page_ptr = at->page_table[i];
if (NV_GET_PAGE_COUNT(page_ptr) != page_ptr->page_count)
{
static int count = 0;
if (count++ < NV_MAX_RECURRING_WARNING_MESSAGES)
{
nv_printf(NV_DBG_ERRORS,
"NVRM: VM: %s: page count != initial page count (%u,%u)\n",
__FUNCTION__, NV_GET_PAGE_COUNT(page_ptr),
page_ptr->page_count);
}
}
NV_MAYBE_UNRESERVE_PAGE(page_ptr); NV_MAYBE_UNRESERVE_PAGE(page_ptr);
} }

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@@ -43,18 +43,18 @@
#endif #endif
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS)
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r570/r572_77-376" #define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r570/r572_77-389"
#define NV_BUILD_CHANGELIST_NUM (35688848) #define NV_BUILD_CHANGELIST_NUM (35826456)
#define NV_BUILD_TYPE "Official" #define NV_BUILD_TYPE "Official"
#define NV_BUILD_NAME "rel/gpu_drv/r570/r572_77-376" #define NV_BUILD_NAME "rel/gpu_drv/r570/r572_77-389"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (35688848) #define NV_LAST_OFFICIAL_CHANGELIST_NUM (35826456)
#else /* Windows builds */ #else /* Windows builds */
#define NV_BUILD_BRANCH_VERSION "r572_77-2" #define NV_BUILD_BRANCH_VERSION "r572_77-4"
#define NV_BUILD_CHANGELIST_NUM (35681611) #define NV_BUILD_CHANGELIST_NUM (35784913)
#define NV_BUILD_TYPE "Official" #define NV_BUILD_TYPE "Official"
#define NV_BUILD_NAME "572.80" #define NV_BUILD_NAME "572.95"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (35681611) #define NV_LAST_OFFICIAL_CHANGELIST_NUM (35784913)
#define NV_BUILD_BRANCH_BASE_VERSION R570 #define NV_BUILD_BRANCH_BASE_VERSION R570
#endif #endif
// End buildmeister python edited section // End buildmeister python edited section

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@@ -4,7 +4,7 @@
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \ #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
(defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1) (defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
#define NV_VERSION_STRING "570.133.07" #define NV_VERSION_STRING "570.133.20"
#else #else

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@@ -157,6 +157,9 @@ struct PCIECONFIGSPACEBASE
#define CL_AER_ERROR_SOURCE (CL_AER_BEGIN + 0x34) #define CL_AER_ERROR_SOURCE (CL_AER_BEGIN + 0x34)
#define CL_AER_END (CL_AER_BEGIN + 0x34) #define CL_AER_END (CL_AER_BEGIN + 0x34)
// Advanced Error Reporting Root Error Status ERR_COR Subclass Capable Mask
#define CL_AER_ROOT_ERROR_STATUS_ERR_COR_SUBCLASS_MASK (NVBIT32(7) | NVBIT32(8))
// PCI Express Device Capabilities 2 // PCI Express Device Capabilities 2
#define CL_PCIE_DEV_CAP_2_ATOMICS_SUPPORTED_BIT NVBIT(6) #define CL_PCIE_DEV_CAP_2_ATOMICS_SUPPORTED_BIT NVBIT(6)
#define CL_PCIE_DEV_CAP_2_ATOMIC_32BIT NVBIT(7) #define CL_PCIE_DEV_CAP_2_ATOMIC_32BIT NVBIT(7)

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@@ -49,7 +49,6 @@ extern "C" {
#include "ctrl/ctrl0000/ctrl0000gpuacct.h" #include "ctrl/ctrl0000/ctrl0000gpuacct.h"
#include "ctrl/ctrl0000/ctrl0000gpu.h" // NV0000_CTRL_GPU_MAX_ATTACHED_GPUS #include "ctrl/ctrl0000/ctrl0000gpu.h" // NV0000_CTRL_GPU_MAX_ATTACHED_GPUS
#include "ctrl/ctrl2080/ctrl2080perf.h" // NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS #include "ctrl/ctrl2080/ctrl2080perf.h" // NV2080_CTRL_PERF_GET_GPUMON_PERFMON_UTIL_SAMPLES_V2_PARAMS
#include "rmapi/client.h"
typedef struct TMR_EVENT TMR_EVENT; typedef struct TMR_EVENT TMR_EVENT;
@@ -75,7 +74,6 @@ typedef struct
{ {
NvU32 procId; // Pid of the process. NvU32 procId; // Pid of the process.
NvU32 procType; // Type of the process. NvU32 procType; // Type of the process.
struct RmClient *pClient; // Process' RmClient.
NvU32 gpuUtil; // Process's average GR engine utilization. NvU32 gpuUtil; // Process's average GR engine utilization.
NvU64 sumUtil; // Running sum of process's GR engine utilization. NvU64 sumUtil; // Running sum of process's GR engine utilization.
NvU32 fbUtil; // Process's average FB bandwidth utilization. NvU32 fbUtil; // Process's average FB bandwidth utilization.
@@ -242,15 +240,15 @@ static inline NV_STATUS gpuacctClearAccountingData(struct GpuAccounting *arg1, N
#define gpuacctClearAccountingData(arg1, arg2, arg3) gpuacctClearAccountingData_IMPL(arg1, arg2, arg3) #define gpuacctClearAccountingData(arg1, arg2, arg3) gpuacctClearAccountingData_IMPL(arg1, arg2, arg3)
#endif //__nvoc_gpu_acct_h_disabled #endif //__nvoc_gpu_acct_h_disabled
NV_STATUS gpuacctStartGpuAccounting_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4, struct RmClient *arg5); NV_STATUS gpuacctStartGpuAccounting_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4);
#ifdef __nvoc_gpu_acct_h_disabled #ifdef __nvoc_gpu_acct_h_disabled
static inline NV_STATUS gpuacctStartGpuAccounting(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4, struct RmClient *arg5) { static inline NV_STATUS gpuacctStartGpuAccounting(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4) {
NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!"); NV_ASSERT_FAILED_PRECOMP("GpuAccounting was disabled!");
return NV_ERR_NOT_SUPPORTED; return NV_ERR_NOT_SUPPORTED;
} }
#else //__nvoc_gpu_acct_h_disabled #else //__nvoc_gpu_acct_h_disabled
#define gpuacctStartGpuAccounting(arg1, arg2, arg3, arg4, arg5) gpuacctStartGpuAccounting_IMPL(arg1, arg2, arg3, arg4, arg5) #define gpuacctStartGpuAccounting(arg1, arg2, arg3, arg4) gpuacctStartGpuAccounting_IMPL(arg1, arg2, arg3, arg4)
#endif //__nvoc_gpu_acct_h_disabled #endif //__nvoc_gpu_acct_h_disabled
NV_STATUS gpuacctStopGpuAccounting_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4); NV_STATUS gpuacctStopGpuAccounting_IMPL(struct GpuAccounting *arg1, NvU32 arg2, NvU32 arg3, NvU32 arg4);

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@@ -5409,11 +5409,11 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2901, 0x1999, 0x10de, "NVIDIA B200" }, { 0x2901, 0x1999, 0x10de, "NVIDIA B200" },
{ 0x2901, 0x199b, 0x10de, "NVIDIA B200" }, { 0x2901, 0x199b, 0x10de, "NVIDIA B200" },
{ 0x2901, 0x20da, 0x10de, "NVIDIA B200" }, { 0x2901, 0x20da, 0x10de, "NVIDIA B200" },
{ 0x2941, 0x2046, 0x10de, "NVIDIA HGX GB200" }, { 0x2941, 0x2046, 0x10de, "NVIDIA GB200" },
{ 0x2941, 0x20ca, 0x10de, "NVIDIA HGX GB200" }, { 0x2941, 0x20ca, 0x10de, "NVIDIA GB200" },
{ 0x2941, 0x20d5, 0x10de, "NVIDIA HGX GB200" }, { 0x2941, 0x20d5, 0x10de, "NVIDIA GB200" },
{ 0x2941, 0x21c9, 0x10de, "NVIDIA HGX GB200" }, { 0x2941, 0x21c9, 0x10de, "NVIDIA GB200" },
{ 0x2941, 0x21ca, 0x10de, "NVIDIA HGX GB200" }, { 0x2941, 0x21ca, 0x10de, "NVIDIA GB200" },
{ 0x2B85, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090" }, { 0x2B85, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090" },
{ 0x2B87, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 D" }, { 0x2B87, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 D" },
{ 0x2BB1, 0x204b, 0x1028, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" }, { 0x2BB1, 0x204b, 0x1028, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" },

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@@ -38,7 +38,7 @@ static NvU64 gpuacctGetCurrTime(void);
static NV_STATUS gpuacctAddProcEntry(GPU_ACCT_PROC_DATA_STORE *, GPUACCT_PROC_ENTRY *, NvBool); static NV_STATUS gpuacctAddProcEntry(GPU_ACCT_PROC_DATA_STORE *, GPUACCT_PROC_ENTRY *, NvBool);
static NV_STATUS gpuacctRemoveProcEntry(GPU_ACCT_PROC_DATA_STORE *, GPUACCT_PROC_ENTRY *); static NV_STATUS gpuacctRemoveProcEntry(GPU_ACCT_PROC_DATA_STORE *, GPUACCT_PROC_ENTRY *);
static NV_STATUS gpuacctLookupProcEntry(GPU_ACCT_PROC_DATA_STORE *, NvU32, GPUACCT_PROC_ENTRY **); static NV_STATUS gpuacctLookupProcEntry(GPU_ACCT_PROC_DATA_STORE *, NvU32, GPUACCT_PROC_ENTRY **);
static NV_STATUS gpuacctAllocProcEntry(GPU_ACCT_PROC_DATA_STORE *, NvU32, NvU32, RmClient *, GPUACCT_PROC_ENTRY **); static NV_STATUS gpuacctAllocProcEntry(GPU_ACCT_PROC_DATA_STORE *, NvU32, NvU32, GPUACCT_PROC_ENTRY **);
static NV_STATUS gpuacctFreeProcEntry(GPU_ACCT_PROC_DATA_STORE *, GPUACCT_PROC_ENTRY *); static NV_STATUS gpuacctFreeProcEntry(GPU_ACCT_PROC_DATA_STORE *, GPUACCT_PROC_ENTRY *);
static NV_STATUS gpuacctCleanupDataStore(GPU_ACCT_PROC_DATA_STORE *); static NV_STATUS gpuacctCleanupDataStore(GPU_ACCT_PROC_DATA_STORE *);
static NV_STATUS gpuacctDestroyDataStore(GPU_ACCT_PROC_DATA_STORE *); static NV_STATUS gpuacctDestroyDataStore(GPU_ACCT_PROC_DATA_STORE *);
@@ -218,7 +218,6 @@ void gpuacctDestruct_IMPL
* @param[in] pDS Pointer to data store where process entry is to be added. * @param[in] pDS Pointer to data store where process entry is to be added.
* @param[in] pid PID of the process. * @param[in] pid PID of the process.
* @param[in] procType Type of the process. * @param[in] procType Type of the process.
* @param[in] pClient Process RmClient
* @param[out] ppEntry Pointer to process entry. * @param[out] ppEntry Pointer to process entry.
* *
* @return NV_OK * @return NV_OK
@@ -233,7 +232,6 @@ gpuacctAllocProcEntry
GPU_ACCT_PROC_DATA_STORE *pDS, GPU_ACCT_PROC_DATA_STORE *pDS,
NvU32 pid, NvU32 pid,
NvU32 procType, NvU32 procType,
RmClient *pClient,
GPUACCT_PROC_ENTRY **ppEntry GPUACCT_PROC_ENTRY **ppEntry
) )
{ {
@@ -252,7 +250,6 @@ gpuacctAllocProcEntry
pEntry->procId = pid; pEntry->procId = pid;
pEntry->procType = procType; pEntry->procType = procType;
pEntry->pClient = pClient;
status = gpuacctAddProcEntry(pDS, pEntry, NV_TRUE); status = gpuacctAddProcEntry(pDS, pEntry, NV_TRUE);
if (status != NV_OK) if (status != NV_OK)
@@ -653,8 +650,7 @@ gpuacctStartGpuAccounting_IMPL
GpuAccounting *pGpuAcct, GpuAccounting *pGpuAcct,
NvU32 gpuInstance, NvU32 gpuInstance,
NvU32 pid, NvU32 pid,
NvU32 subPid, NvU32 subPid
RmClient *pClient
) )
{ {
OBJGPU *pGpu; OBJGPU *pGpu;
@@ -713,7 +709,7 @@ gpuacctStartGpuAccounting_IMPL
// Create entry for the incoming pid. // Create entry for the incoming pid.
status = gpuacctAllocProcEntry(pDS, searchPid, status = gpuacctAllocProcEntry(pDS, searchPid,
NV_GPUACCT_PROC_TYPE_CPU, pClient, &pEntry); NV_GPUACCT_PROC_TYPE_CPU, &pEntry);
NV_ASSERT_OR_RETURN(status == NV_OK, status); NV_ASSERT_OR_RETURN(status == NV_OK, status);
NV_ASSERT_OR_RETURN(pEntry != NULL, NV_ERR_NO_MEMORY); NV_ASSERT_OR_RETURN(pEntry != NULL, NV_ERR_NO_MEMORY);
@@ -866,7 +862,6 @@ gpuacctStopGpuAccounting_IMPL
} }
// Move the entry to dead procs data store // Move the entry to dead procs data store
pEntry->pClient = NULL;
status = gpuacctRemoveProcEntry(pLiveDS, pEntry); status = gpuacctRemoveProcEntry(pLiveDS, pEntry);
if (status != NV_OK) if (status != NV_OK)
{ {
@@ -1201,25 +1196,6 @@ gpuacctGetProcAcctInfo_IMPL
return NV_OK; return NV_OK;
} }
static NV_STATUS _gpuAcctGetPidValue(GPUACCT_PROC_ENTRY *pEntry, NvU32 vmIndex, NvU32 *nsPid)
{
if ((vmIndex != NV_INVALID_VM_INDEX) ||
(pEntry->pClient == NULL) ||
(pEntry->pClient->pOsPidInfo == NULL))
{
*nsPid = pEntry->procId;
}
else
{
if (osFindNsPid(pEntry->pClient->pOsPidInfo, nsPid) != NV_OK)
{
return NV_ERR_OBJECT_NOT_FOUND;
}
}
return NV_OK;
}
/*! /*!
* Gets all the pids for which accounting data is available. * Gets all the pids for which accounting data is available.
* *
@@ -1239,7 +1215,6 @@ gpuacctGetAcctPids_IMPL
{ {
GPUACCT_PROC_ENTRY *pEntry; GPUACCT_PROC_ENTRY *pEntry;
GPU_ACCT_PROC_LIST *pList; GPU_ACCT_PROC_LIST *pList;
NV_STATUS status;
OBJGPU *pGpu; OBJGPU *pGpu;
NvU32 count; NvU32 count;
NvU32 vmPid; NvU32 vmPid;
@@ -1292,7 +1267,7 @@ gpuacctGetAcctPids_IMPL
if (vmIndex == NV_INVALID_VM_INDEX) if (vmIndex == NV_INVALID_VM_INDEX)
{ {
// Skip dead info if the request is for baremetal and from container. // Skip dead info if the requester is not from root namespace.
if (osIsInitNs() != NV_TRUE) if (osIsInitNs() != NV_TRUE)
{ {
goto addLiveProc; goto addLiveProc;
@@ -1333,11 +1308,7 @@ addLiveProc:
pEntry = iter.pValue; pEntry = iter.pValue;
if (pEntry && pEntry->procType == NV_GPUACCT_PROC_TYPE_GPU) if (pEntry && pEntry->procType == NV_GPUACCT_PROC_TYPE_GPU)
{ {
status = _gpuAcctGetPidValue(pEntry, vmIndex, &pParams->pidTbl[count]); pParams->pidTbl[count++] = pEntry->procId;
if (status == NV_OK)
{
count++;
}
} }
} }

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@@ -431,7 +431,7 @@ _deviceInit
// If gpuacctStartGpuAccounting() fails, just assert and print error. // If gpuacctStartGpuAccounting() fails, just assert and print error.
// gpuacctStartGpuAccounting() is not a major failure, we will continue with deviceInit() as normal. // gpuacctStartGpuAccounting() is not a major failure, we will continue with deviceInit() as normal.
if ((pRsClient->type == CLIENT_TYPE_USER) && (gpuacctStartGpuAccounting(pGpuAcct, if ((pRsClient->type == CLIENT_TYPE_USER) && (gpuacctStartGpuAccounting(pGpuAcct,
pGpu->gpuInstance, pClient->ProcID, pClient->SubProcessID, pClient) != NV_OK)) pGpu->gpuInstance, pClient->ProcID, pClient->SubProcessID) != NV_OK))
{ {
NV_ASSERT(0); NV_ASSERT(0);
NV_PRINTF(LEVEL_ERROR, NV_PRINTF(LEVEL_ERROR,

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@@ -448,8 +448,8 @@ krcCheckBusError_KERNEL
&clDevCtrlStatus) == NV_OK && &clDevCtrlStatus) == NV_OK &&
clDevCtrlStatusFlags != 0) clDevCtrlStatusFlags != 0)
{ {
NV_PRINTF(LEVEL_ERROR, NV_PRINTF(LEVEL_INFO,
"PCI-E corelogic status has pending errors (CL_PCIE_DEV_CTRL_STATUS = %08X):\n", "PCI-E corelogic: Pending errors in DEV_CTRL_STATUS = %08X\n",
clDevCtrlStatus); clDevCtrlStatus);
clDevCtrlStatusFlags_Org = clDevCtrlStatusFlags; clDevCtrlStatusFlags_Org = clDevCtrlStatusFlags;
@@ -457,7 +457,7 @@ krcCheckBusError_KERNEL
if (clDevCtrlStatusFlags & if (clDevCtrlStatusFlags &
NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_CORR_ERROR) NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_CORR_ERROR)
{ {
NV_PRINTF(LEVEL_ERROR, " _CORR_ERROR_DETECTED\n"); NV_PRINTF(LEVEL_INFO, "PCI-E corelogic: CORR_ERROR_DETECTED\n");
// not much interested in this one // not much interested in this one
clDevCtrlStatusFlags &= clDevCtrlStatusFlags &=
~NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_CORR_ERROR; ~NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_CORR_ERROR;
@@ -465,26 +465,27 @@ krcCheckBusError_KERNEL
if (clDevCtrlStatusFlags & if (clDevCtrlStatusFlags &
NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_NON_FATAL_ERROR) NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_NON_FATAL_ERROR)
{ {
NV_PRINTF(LEVEL_ERROR, " _NON_FATAL_ERROR_DETECTED\n"); NV_PRINTF(LEVEL_INFO, "PCI-E corelogic: NON_FATAL_ERROR_DETECTED\n");
} }
if (clDevCtrlStatusFlags & if (clDevCtrlStatusFlags &
NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_FATAL_ERROR) NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_FATAL_ERROR)
{ {
NV_PRINTF(LEVEL_ERROR, " _FATAL_ERROR_DETECTED\n"); NV_PRINTF(LEVEL_ERROR, "PCI-E corelogic: FATAL_ERROR_DETECTED\n");
} }
if (clDevCtrlStatusFlags & if (clDevCtrlStatusFlags &
NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_UNSUPP_REQUEST) NV2080_CTRL_BUS_INFO_PCIE_LINK_ERRORS_UNSUPP_REQUEST)
{ {
NV_PRINTF(LEVEL_ERROR, " _UNSUPP_REQUEST_DETECTED\n"); NV_PRINTF(LEVEL_INFO, "PCI-E corelogic: UNSUPP_REQUEST_DETECTED\n");
} }
} }
// Corelogic AER // Corelogic AER
if (pCl != NULL && clPcieReadAerCapability(pGpu, pCl, &clAer) == NV_OK && if (pCl != NULL && clPcieReadAerCapability(pGpu, pCl, &clAer) == NV_OK &&
(clAer.UncorrErrStatusReg != 0 || clAer.RooErrStatus != 0)) (clAer.UncorrErrStatusReg != 0 ||
(clAer.RooErrStatus & ~CL_AER_ROOT_ERROR_STATUS_ERR_COR_SUBCLASS_MASK) != 0))
{ {
NV_PRINTF(LEVEL_ERROR, NV_PRINTF(LEVEL_ERROR,
"PCE-I Advanced Error Reporting Corelogic Info:\n"); "PCI-E Advanced Error Reporting Corelogic Info:\n");
NV_PRINTF(LEVEL_ERROR, NV_PRINTF(LEVEL_ERROR,
" Uncorr Error Status Register : %08X\n", " Uncorr Error Status Register : %08X\n",
clAer.UncorrErrStatusReg); clAer.UncorrErrStatusReg);

View File

@@ -1,4 +1,4 @@
NVIDIA_VERSION = 570.133.07 NVIDIA_VERSION = 570.133.20
# This file. # This file.
VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST)) VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST))