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This commit is contained in:
Bernhard Stoeckner
2024-04-17 17:23:37 +02:00
parent 3bf16b890c
commit ea4c27fad6
103 changed files with 60736 additions and 56138 deletions
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6
src/nvidia/arch/nvalloc/common/inc/conf_compute/cc_keystore.h
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@@ -55,6 +55,8 @@ enum
CC_LKEYID_GSP_CPU_REPLAYABLE_FAULT,
CC_LKEYID_CPU_GSP_RESERVED2,
CC_LKEYID_GSP_CPU_NON_REPLAYABLE_FAULT,
CC_LKEYID_GSP_SEC2_LOCKED_RPC,
CC_LKEYID_SEC2_GSP_LOCKED_RPC,
CC_KEYSPACE_GSP_SIZE // This is always the last element.
};
// The fault buffers only support GPU-to-CPU encryption, so the CPU-to-GPU encryption slot
@@ -159,6 +161,10 @@ enum
// Get the local key ID from a global key ID.
#define CC_GKEYID_GET_LKEYID(a) (NvU16)((a) & 0xffff)
// Decrement/increment the local key ID portion of a global key ID.
#define CC_GKEYID_DEC_LKEYID(a) CC_GKEYID_GEN(CC_GKEYID_GET_KEYSPACE((a)), CC_GKEYID_GET_LKEYID((a)) - 1)
#define CC_GKEYID_INC_LKEYID(a) CC_GKEYID_GEN(CC_GKEYID_GET_KEYSPACE((a)), CC_GKEYID_GET_LKEYID((a)) + 1)
// Get the unqiue string from a global key ID.
#define CC_GKEYID_GET_STR(a) \
(CC_GKEYID_GET_KEYSPACE(a) == CC_KEYSPACE_GSP) ? \

5
src/nvidia/arch/nvalloc/common/inc/dev_ctrl_defines.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -77,6 +77,9 @@
#define NV_CTRL_INTR_GPU_VECTOR_TO_SUBTREE(i) \
((NV_CTRL_INTR_GPU_VECTOR_TO_LEAF_REG(i)) / 2)
// First index of doorbell which is controlled by VF
#define NV_CTRL_INTR_GPU_DOORBELL_INDEX_VF_START 2048
// The max number of leaf registers we expect
#define NV_MAX_INTR_LEAVES 16

78
src/nvidia/arch/nvalloc/common/inc/fsp/fsp_tnvl_rpc.h
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@@ -25,6 +25,9 @@
#define _FSP_TNVL_RPC_H_
#define TNVL_CAPS_SUBMESSAGE_ID 0xFF
#define TNVL_GET_ATT_CERTS_SUBMESSAGE_ID 0x0
#define TNVL_GET_ATT_REPORT_SUBMESSAGE_ID 0x1
#define TNVL_LOCK_CONFIG_SUBMESSAGE_ID 0x2
#pragma pack(1)
@@ -46,6 +49,81 @@ typedef struct
NvU8 rspPayload[40];
} TNVL_RPC_CAPS_RSP_PAYLOAD;
/*!
* @brief TNVL payload to query attestation cert chain
*/
typedef struct
{
NvU8 subMessageId;
NvU8 rsvd;
NvU8 minorVersion;
NvU8 majorVersion;
} TNVL_GET_ATT_CERTS_CMD_PAYLOAD;
/*!
* @brief TNVL response payload for attestation cert chain
*/
typedef struct
{
NVDM_PAYLOAD_COMMAND_RESPONSE cmdResponse;
NvU8 subMessageId;
NvU8 rsvd0;
NvU8 minorVersion;
NvU8 majorVersion;
NvU16 certChainLength;
NvU16 rsvd1;
NvU8 certChain[NVSWITCH_ATTESTATION_CERT_CHAIN_MAX_SIZE];
} TNVL_GET_ATT_CERTS_RSP_PAYLOAD;
/*!
* @brief TNVL payload to query attestation report
*/
typedef struct
{
NvU8 subMessageId;
NvU8 rsvd;
NvU8 minorVersion;
NvU8 majorVersion;
NvU8 nonce[NVSWITCH_NONCE_SIZE];
} TNVL_GET_ATT_REPORT_CMD_PAYLOAD;
/*!
* @brief TNVL response payload for attestation report
*/
typedef struct
{
NVDM_PAYLOAD_COMMAND_RESPONSE cmdResponse;
NvU8 subMessageId;
NvU8 rsvd0;
NvU8 minorVersion;
NvU8 majorVersion;
NvU32 measurementSize;
NvU8 measurementBuffer[NVSWITCH_ATTESTATION_REPORT_MAX_SIZE];
} TNVL_GET_ATT_REPORT_RSP_PAYLOAD;
/*!
* @brief TNVL payload to send lock config
*/
typedef struct
{
NvU8 subMessageId;
NvU8 rsvd;
NvU8 minorVersion;
NvU8 majorVersion;
} TNVL_LOCK_CONFIG_CMD_PAYLOAD;
/*!
* @brief TNVL response payload for lock config
*/
typedef struct
{
NVDM_PAYLOAD_COMMAND_RESPONSE cmdResponse;
NvU8 subMessageId;
NvU8 rsvd0;
NvU8 minorVersion;
NvU8 majorVersion;
} TNVL_LOCK_CONFIG_RSP_PAYLOAD;
#pragma pack()
#endif // _FSP_TNVL_RPC_H_

3
src/nvidia/arch/nvalloc/common/inc/nvcst.h
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@@ -249,7 +249,8 @@ CSINFO chipsetInfo[] =
{PCI_VENDOR_ID_MELLANOX, 0xA2D0, CS_MELLANOX_BLUEFIELD, "Mellanox BlueField", Mellanox_BlueField_setupFunc},
{PCI_VENDOR_ID_MELLANOX, 0xA2D4, CS_MELLANOX_BLUEFIELD2, "Mellanox BlueField 2", NULL},
{PCI_VENDOR_ID_MELLANOX, 0xA2D5, CS_MELLANOX_BLUEFIELD2, "Mellanox BlueField 2 Crypto disabled", NULL},
{PCI_VENDOR_ID_MELLANOX, 0xA2DB, CS_MELLANOX_BLUEFIELD3, "Mellanox BlueField 3", Mellanox_BlueField3_setupFunc},
{PCI_VENDOR_ID_MELLANOX, 0xA2DA, CS_MELLANOX_BLUEFIELD3, "Mellanox BlueField 3 Crypto enabled", Mellanox_BlueField3_setupFunc},
{PCI_VENDOR_ID_MELLANOX, 0xA2DB, CS_MELLANOX_BLUEFIELD3, "Mellanox BlueField 3 Crypto disabled", Mellanox_BlueField3_setupFunc},
{PCI_VENDOR_ID_AMAZON, 0x0200, CS_AMAZON_GRAVITRON2, "Amazon Gravitron2", Amazon_Gravitron2_setupFunc},
{PCI_VENDOR_ID_FUJITSU, 0x1952, CS_FUJITSU_A64FX, "Fujitsu A64FX", Fujitsu_A64FX_setupFunc},
{PCI_VENDOR_ID_CADENCE, 0xDC01, CS_PHYTIUM_S2500, "Phytium S2500", NULL},