535.43.02

src/common/sdk/nvidia/inc/alloc/alloc_access_counter_buffer.h

@@ -0,0 +1,51 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include <nvtypes.h>
+
+//
+// This file was generated with FINN, an NVIDIA coding tool.
+// Source file:      alloc/alloc_access_counter_buffer.finn
+//
+
+#include "class/clc365.h"
+
+
+/*
+ * NV_ACCESS_COUNTER_NOTIFY_BUFFER_ALLOC_PARAMS
+ *
+ * Allocation params for ACCESS_COUNTER_NOTIFY_BUFFER.
+ * This class provides an interface to access counter buffers.
+
+ *    accessCounterIndex [IN]
+ *       This parameter specifies index of access counter to which the object should be assigned
+ *
+ */
+#define NV_ACCESS_COUNTER_NOTIFY_BUFFER_ALLOC_PARAMS_MESSAGE_ID (0xC365U)
+
+typedef struct NV_ACCESS_COUNTER_NOTIFY_BUFFER_ALLOC_PARAMS {
+    NvU32 accessCounterIndex;
+} NV_ACCESS_COUNTER_NOTIFY_BUFFER_ALLOC_PARAMS;
+

src/common/sdk/nvidia/inc/alloc/alloc_channel.h

@@ -28,7 +28,7 @@
 
 //
 // This file was generated with FINN, an NVIDIA coding tool.
-// Source file: alloc/alloc_channel.finn
+// Source file:      alloc/alloc_channel.finn
 //
 
 #include "nvlimits.h"
@@ -83,6 +83,25 @@ typedef struct NV_MEMORY_DESC_PARAMS {
 #define NVOS04_FLAGS_VPR_FALSE                                     0x00000000
 #define NVOS04_FLAGS_VPR_TRUE                                      0x00000001
 
+/*
+ *    NVOS04_FLAGS_CC_SECURE:
+ *     This flag specifies if channel is intended to be used for
+ *     encryption/decryption of data between SYSMEM <-> VIDMEM. Only CE
+ *     & SEC2 Channels are capable of handling encrypted content and this
+ *     flag will be ignored when CC is disabled or for chips that are not CC
+ *     Capable.
+ *     Reusing VPR index since VPR & CC are mutually exclusive.
+ *
+ *       NVOS04_FLAGS_CC_SECURE_TRUE:
+ *         The channel will support CC Encryption/Decryption
+ *
+ *       NVOS04_FLAGS_CC_SECURE_FALSE:
+ *         The channel will not support CC Encryption/Decryption
+ */
+#define NVOS04_FLAGS_CC_SECURE                                     2:2
+#define NVOS04_FLAGS_CC_SECURE_FALSE                               0x00000000
+#define NVOS04_FLAGS_CC_SECURE_TRUE                                0x00000001
+
 
 
 /*
@@ -300,8 +319,6 @@ typedef struct NV_CHANNEL_ALLOC_PARAMS {
     NvU32    subDeviceId;
     NvHandle hObjectEccError; // ECC error context DMA
 
-
-
     NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS instanceMem, 8);
     NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS userdMem, 8);
     NV_DECLARE_ALIGNED(NV_MEMORY_DESC_PARAMS ramfcMem, 8);