mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-24 00:43:57 +00:00
535.43.02
This commit is contained in:
Andy Ritger
@@ -27,7 +27,7 @@
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//
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// This file was generated with FINN, an NVIDIA coding tool.
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// Source file: ctrl/ctrl2080/ctrl2080fb.finn
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// Source file: ctrl/ctrl2080/ctrl2080fb.finn
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//
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#include "ctrl/ctrl2080/ctrl2080base.h"
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@@ -419,27 +419,6 @@ typedef struct NV2080_CTRL_FB_GET_INFO_V2_PARAMS {
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NV2080_CTRL_FB_INFO fbInfoList[NV2080_CTRL_FB_INFO_MAX_LIST_SIZE];
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} NV2080_CTRL_FB_GET_INFO_V2_PARAMS;
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/*
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* NV2080_CTRL_CMD_FB_GET_TILE_ADDRESS_INFO
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*
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* This command returns tile addressing information.
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*
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* StartAddr
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* This parameter returns BAR1 plus the size of the local FB.
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* SpaceSize
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* This parameter returns the BAR1 aperture size less the size of the
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* local FB.
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*
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* Note that both parameters will contain zero if there is no system tile
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* address space.
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*/
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#define NV2080_CTRL_CMD_FB_GET_TILE_ADDRESS_INFO (0x20801302U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x2" */
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typedef struct NV2080_CTRL_FB_GET_SYSTEM_TILE_ADDRESS_SPACE_INFO {
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NV_DECLARE_ALIGNED(NvU64 StartAddr, 8);
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NV_DECLARE_ALIGNED(NvU64 SpaceSize, 8);
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} NV2080_CTRL_FB_GET_SYSTEM_TILE_ADDRESS_SPACE_INFO;
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/*
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* NV2080_CTRL_CMD_FB_GET_BAR1_OFFSET
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*
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@@ -537,53 +516,8 @@ typedef struct NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS {
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} NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS;
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/* valid flags parameter values */
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#define NV2080_CTRL_CMD_FB_GET_CAL_FLAG_NONE (0x00000000U)
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#define NV2080_CTRL_CMD_FB_GET_CAL_FLAG_RESET (0x00000001U)
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/*
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* NV2080_CTRL_CMD_FB_SET_SCANOUT_COMPACTION_ALLOWED
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*
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* This command specifies to RM if scanout compaction feature is allowed or
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* not in the current configuration. In hybrid mode when dGPU is rendering the
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* image, the dGPU blit to the scanout surface happens without mGPU's
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* knowledge (directly to system memory), which results in stale compacted
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* data resulting in corruption.
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*
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* This control call can be used to disable the compaction whenever the KMD
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* (client) is switching to the pref mode in Hybrid i.e., whenever there is a
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* possibility of dGPU doing a blit to mGpu scanout surface. Compaction can
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* be enabled when system is back in hybrid power mode as mGpu will be
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* rendering the image.
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*
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* allowCompaction
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* This parameter specifies if the display compaction feature is allowed
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* or not allowed.
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* immediate
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* This parameter specifies whether compaction has to be enabled or
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* disabled immediately (based on the value of allowCompaction field) or
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* during the next modeset.
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*
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* Possible status values returned are:
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* NV_OK
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* NVOS_STATUS_INVALID_PARAM_STRUCT
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* NVOS_STATUS_NOT_SUPPORTED
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* NV_ERR_INVALID_ARGUMENT
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*/
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#define NV2080_CTRL_CMD_FB_SET_SCANOUT_COMPACTION_ALLOWED (0x2080130dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0xD" */ // Deprecated, removed form RM
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typedef struct NV2080_CTRL_FB_SET_SCANOUT_COMPACTION_ALLOWED_PARAMS {
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NvU32 allowCompaction;
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NvU32 immediate;
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} NV2080_CTRL_FB_SET_SCANOUT_COMPACTION_ALLOWED_PARAMS;
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/* valid allowCompaction values */
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#define NV2080_CTRL_CMD_FB_SET_SCANOUT_COMPACTION_ALLOW (0x00000001U)
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#define NV2080_CTRL_CMD_FB_SET_SCANOUT_COMPACTION_DISALLOW (0x00000000U)
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/* valid immediate values */
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#define NV2080_CTRL_CMD_FB_SET_SCANOUT_COMPACTION_IMMEDIATE (000000001U)
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#define NV2080_CTRL_CMD_FB_SET_SCANOUT_COMPACTION_NOT_IMMEDIATE (000000000U)
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#define NV2080_CTRL_CMD_FB_GET_CAL_FLAG_NONE (0x00000000U)
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#define NV2080_CTRL_CMD_FB_GET_CAL_FLAG_RESET (0x00000001U)
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/*
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* NV2080_CTRL_CMD_FB_FLUSH_GPU_CACHE
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@@ -628,9 +562,9 @@ typedef struct NV2080_CTRL_FB_SET_SCANOUT_COMPACTION_ALLOWED_PARAMS {
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* supports it. Use this call if you want to flush a single allocation and
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* you have a memory object describing the physical memory.
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*/
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#define NV2080_CTRL_CMD_FB_FLUSH_GPU_CACHE (0x2080130eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS_MESSAGE_ID" */
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#define NV2080_CTRL_CMD_FB_FLUSH_GPU_CACHE (0x2080130eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS_MESSAGE_ID" */
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#define NV2080_CTRL_FB_FLUSH_GPU_CACHE_MAX_ADDRESSES 500U
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#define NV2080_CTRL_FB_FLUSH_GPU_CACHE_MAX_ADDRESSES 500U
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#define NV2080_CTRL_FB_FLUSH_GPU_CACHE_PARAMS_MESSAGE_ID (0xEU)
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@@ -1615,239 +1549,6 @@ typedef struct NV2080_CTRL_CMD_FB_COMPBITCOPY_WRITE_COMPBITS64KB_PARAMS {
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NvBool upper64KBCompbitSel;
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} NV2080_CTRL_CMD_FB_COMPBITCOPY_WRITE_COMPBITS64KB_PARAMS;
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/*!
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* NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_COMPBITSPS < Deprecated >
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*
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* The PS (Performance Path, or Optimized path, or Per Slice version)
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* of PutCompBits.
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*
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* @params[out] NvU32 *fcbits;
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* Buffer to receive Fast Clear Bits.
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* @params[out] NvU32 *compbits;
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* Buffer to receive Compression Bits.
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* @params[out] NvU32 *compCacheLine;
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* Buffer to receive Comp Cache Line data.
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* @params[in] NvU64 dataPhysicalStart;
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* Start Address of Data
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* @params[in] NvU64 surfaceOffset;
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* Offset in the surface
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* @params[in] NvU32 comptagLine;
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* Compression Tag Line Number
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* @params[in] NvU32 ROPTile_offset;
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* Offset in the surface of the ROP tile.
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* @params[in] NvBool upper64KBCompbitSel;
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* Selects Upper or Lower 64K
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* @params[in] NvBool getFcBits;
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* Indicates if fast clear bits should be returned.
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* @params[in] NvP64 derivedParams
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* Actually a CompBitDerivedParams structure.
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*
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* Possible status values returned are:
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* NV_OK
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* NV_ERR_NOT_SUPPORTED
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*/
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#define NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_COMPBITSPS (0x2080132eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x2E" */
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typedef struct NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_COMPBITSPS_PARAMS {
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NV_DECLARE_ALIGNED(NvU32 *fcbits, 8);
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NV_DECLARE_ALIGNED(NvU32 *compbits, 8);
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NV_DECLARE_ALIGNED(NvU32 *compCacheLine, 8);
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NV_DECLARE_ALIGNED(NvU64 dataPhysicalStart, 8);
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NV_DECLARE_ALIGNED(NvU64 surfaceOffset, 8);
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NvU32 comptagLine;
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NvU32 ROPTile_offset;
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NvBool upper64KBCompbitSel;
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NvBool getFcBits;
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NV_DECLARE_ALIGNED(NvP64 derivedParams, 8);
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} NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_COMPBITSPS_PARAMS;
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/*!
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* NV2080_CTRL_CMD_FB_COMPBITCOPY_PUT_COMPBITSPS < Deprecated >
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*
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* The PS (Performance Path, or Optimized path, or Per Slice version)
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* of GetCompBits.
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*
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* @params[in] NvU32 fcbits;
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* Buffer with Fast Clear Bits to write.
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* @params[in] NvU32 compbits;
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* Buffer to receive Compression Bits.
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* @params[in] NvBool writeFc
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* Indicates of Fast Clear Bits should be written.
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* @params[in] NvU32 *compCacheLine;
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* Buffer to receive Comp Cache Line data.
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* @params[in] NvU64 dataPhysicalStart;
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* Start Address of Data
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* @params[in] NvU64 surfaceOffset;
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* Offset in the surface
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* @params[in] NvU32 comptagLine;
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* Compression Tag Line Number
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* @params[in] NvU32 ROPTile_offset;
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* Offset in the surface of the ROP tile.
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* @params[in] NvBool upper64KBCompbitSel;
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* Selects Upper or Lower 64K
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* @params[in] NvP64 derivedParams
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* Actually a CompBitDerivedParams structure.
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*
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* Possible status values returned are:
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* NV_OK
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* NV_ERR_NOT_SUPPORTED
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*/
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#define NV2080_CTRL_CMD_FB_COMPBITCOPY_PUT_COMPBITSPS (0x2080132fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x2F" */
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typedef struct NV2080_CTRL_CMD_FB_COMPBITCOPY_PUT_COMPBITSPS_PARAMS {
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NvU32 fcbits;
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NvU32 compbits;
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NvBool writeFc;
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NV_DECLARE_ALIGNED(NvU32 *compCacheLine, 8);
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NV_DECLARE_ALIGNED(NvU64 dataPhysicalStart, 8);
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NV_DECLARE_ALIGNED(NvU64 surfaceOffset, 8);
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NvU32 comptagLine;
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NvU32 ROPTile_offset;
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NvBool upper64KBCompbitSel;
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NV_DECLARE_ALIGNED(NvP64 derivedParams, 8);
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} NV2080_CTRL_CMD_FB_COMPBITCOPY_PUT_COMPBITSPS_PARAMS;
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/*!
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* NV2080_CTRL_CMD_FB_COMPBITCOPY_READ_COMPCACHELINEPS < Deprecated >
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*
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* The PS (Performance Path, or Optimized path, or Per Slice version)
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* of ReadCompCacheLine.
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*
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* @paramsNvU32 *compCacheLine;
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* Buffer for Comp Cache Line Read
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* @paramsNvU32 comptagLine;
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* Comp Tag Line Number to read
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* @paramsNvU32 partition;
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* FB Partition of the desired Comp Cache Line
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* @paramsNvU32 slice;
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* Slice of the desired Comp Cache Line
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*
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* Possible status values returned are:
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* NV_OK
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* NV_ERR_NOT_SUPPORTED
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*/
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#define NV2080_CTRL_CMD_FB_COMPBITCOPY_READ_COMPCACHELINEPS (0x20801330U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x30" */
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typedef struct NV2080_CTRL_CMD_FB_COMPBITCOPY_READ_COMPCACHELINEPS_PARAMS {
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NV_DECLARE_ALIGNED(NvU32 *compCacheLine, 8);
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NvU32 comptagLine;
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NvU32 partition;
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NvU32 slice;
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} NV2080_CTRL_CMD_FB_COMPBITCOPY_READ_COMPCACHELINEPS_PARAMS;
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/*!
|
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* NV2080_CTRL_CMD_FB_COMPBITCOPY_WRITE_COMPCACHELINEPS < Deprecated >
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*
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* The PS (Performance Path, or Optimized path, or Per Slice version)
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* of WriteCompCacheLine.
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*
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* @params[in] NvU32 *compCacheLine;
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* Buffer for Comp Cache Line to Write
|
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* @params[in] NvU32 comptagLine;
|
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* Comp Tag Line Number to Write
|
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* @params[in] NvU32 partition;
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* FB Partition of the desired Comp Cache Line
|
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* @params[in] NvU32 slice;
|
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* Slice of the desired Comp Cache Line
|
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*
|
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* Possible status values returned are:
|
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* NV_OK
|
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* NV_ERR_NOT_SUPPORTED
|
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*/
|
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#define NV2080_CTRL_CMD_FB_COMPBITCOPY_WRITE_COMPCACHELINEPS (0x20801331U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x31" */
|
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|
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typedef struct NV2080_CTRL_CMD_FB_COMPBITCOPY_WRITE_COMPCACHELINEPS_PARAMS {
|
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NV_DECLARE_ALIGNED(NvU32 *compCacheLine, 8);
|
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NvU32 comptagLine;
|
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NvU32 partition;
|
||||
NvU32 slice;
|
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} NV2080_CTRL_CMD_FB_COMPBITCOPY_WRITE_COMPCACHELINEPS_PARAMS;
|
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|
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/*!
|
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* NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_COMPCACHELINE_BOUNDS < Deprecated >
|
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*
|
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* Used by PS (Performance Path, or Optimized path, or Per Slice version)
|
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* to retrieve upper and lower Address of the CompCacheLine.
|
||||
*
|
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* @params[out] NvU64 *minCPUAddress;
|
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* Minimum (lower bound) of the ComCacheLine.
|
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* @params[out] NvU64 *minCPUAddress;
|
||||
* Minimum (lower bound) of the ComCacheLine.
|
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* @params[in] NvU32 comptagLine;
|
||||
* CompTagLine to fetch the bounds of.
|
||||
*
|
||||
* Possible status values returned are:
|
||||
* NV_OK
|
||||
* NV_ERR_NOT_SUPPORTED
|
||||
*/
|
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#define NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_COMPCACHELINE_BOUNDS (0x20801332U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x32" */
|
||||
|
||||
typedef struct NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_COMPCACHELINE_BOUNDS_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NvU64 *minCPUAddress, 8);
|
||||
NV_DECLARE_ALIGNED(NvU64 *maxCPUAddress, 8);
|
||||
NvU32 comptagLine;
|
||||
} NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_COMPCACHELINE_BOUNDS_PARAMS;
|
||||
|
||||
/*!
|
||||
* NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_PART_SLICE_OFFSET < Deprecated >
|
||||
*
|
||||
* Used by PS (Performance Path, or Optimized path, or Per Slice version)
|
||||
* to retrieve partition, slice and ROP Tile Offset of the passed in
|
||||
* surface location.
|
||||
*
|
||||
* @params[out] NvU64 *part;
|
||||
* Partition in which the target part of the surface resides.
|
||||
* @params[out] NvU64 *slice;
|
||||
* Slice in which the target part of the surface resides.
|
||||
* @params[out] NvU64 *ropTileoffset;
|
||||
* Offset to the start of the ROP Tile in which the target part of
|
||||
* the surface resides.
|
||||
* @params[in] NvU64 *dataPhysicalStart;
|
||||
* Start address of data for which part/slice/offset is desired.
|
||||
* @params[in] NvU64 surfaceOffset;
|
||||
* Byte offset of data for which part/slice/offset is desired.
|
||||
*
|
||||
* Possible status values returned are:
|
||||
* NV_OK
|
||||
* NV_ERR_NOT_SUPPORTED
|
||||
*/
|
||||
#define NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_PART_SLICE_OFFSET (0x20801333U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x33" */
|
||||
|
||||
typedef struct NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_PART_SLICE_OFFSET_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NvU64 *part, 8);
|
||||
NV_DECLARE_ALIGNED(NvU64 *slice, 8);
|
||||
NV_DECLARE_ALIGNED(NvU64 *ropTileoffset, 8);
|
||||
NV_DECLARE_ALIGNED(NvU64 dataPhysicalStart, 8);
|
||||
NV_DECLARE_ALIGNED(NvU64 surfaceOffset, 8);
|
||||
} NV2080_CTRL_CMD_FB_COMPBITCOPY_GET_PART_SLICE_OFFSET_PARAMS;
|
||||
|
||||
/*!
|
||||
* NV2080_CTRL_CMD_FB_COMPBITCOPY_ALLOC_AND_INIT_DERIVEDPARAMS < Deprecated >
|
||||
*
|
||||
* Used by PS (Performance Path, or Optimized path, or Per Slice version)
|
||||
* to create a CompBitCopy::CompBitDerivedParams object
|
||||
*
|
||||
* @params[out] NvP64 derivedParams
|
||||
* Actually a CompBitDerivedParams structure.
|
||||
* @params[in] NvU32 comptagLine;
|
||||
* Compression Tag Line Number
|
||||
* @params[in] NvU32 ROPTile_offset;
|
||||
* Offset in the surface of the ROP tile.
|
||||
* @params[in] NvBool upper64KBCompbitSel;
|
||||
* Selects Upper or Lower 64K
|
||||
*
|
||||
* Possible status values returned are:
|
||||
* NV_OK
|
||||
* NV_ERR_NOT_SUPPORTED
|
||||
*/
|
||||
#define NV2080_CTRL_CMD_FB_COMPBITCOPY_ALLOC_AND_INIT_DERIVEDPARAMS (0x20801334U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | 0x34" */
|
||||
|
||||
typedef struct NV2080_CTRL_CMD_FB_COMPBITCOPY_ALLOC_AND_INIT_DERIVEDPARAMS_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NvP64 derivedParams, 8);
|
||||
NvU32 comptagLine;
|
||||
NvBool upper64KBCompbitSel;
|
||||
} NV2080_CTRL_CMD_FB_COMPBITCOPY_ALLOC_AND_INIT_DERIVEDPARAMS_PARAMS;
|
||||
|
||||
/*!
|
||||
* NV2080_CTRL_CMD_FB_COMPBITCOPY_SET_FORCE_BAR1 < Deprecated >
|
||||
*
|
||||
@@ -2876,8 +2577,9 @@ typedef struct NV2080_CTRL_FB_UPDATE_NUMA_STATUS_PARAMS {
|
||||
/*
|
||||
* NV2080_CTRL_CMD_FB_GET_NUMA_INFO
|
||||
*
|
||||
* This control command is used by clients to get per-subdevice NUMA memory
|
||||
* information as assigned by the system.
|
||||
* This control command is used by clients to get per-subdevice or
|
||||
* subscribed MIG partition(when MIG is enabled) NUMA memory information as
|
||||
* assigned by the system.
|
||||
*
|
||||
* numaNodeId[OUT]
|
||||
* - Specifies the NUMA node ID.
|
||||
@@ -2916,4 +2618,37 @@ typedef struct NV2080_CTRL_FB_GET_NUMA_INFO_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NvU64 numaOfflineAddresses[NV2080_CTRL_FB_NUMA_INFO_MAX_OFFLINE_ADDRESSES], 8);
|
||||
} NV2080_CTRL_FB_GET_NUMA_INFO_PARAMS;
|
||||
|
||||
/*
|
||||
* NV2080_CTRL_CMD_FB_GET_SEMAPHORE_SURFACE_LAYOUT
|
||||
*
|
||||
* This control command is used by clients to get NV_SEMAPHORE_SURFACE layout/caps before allocation.
|
||||
* A semaphore surface can be viewed as an array of independent semaphore entries.
|
||||
*
|
||||
* maxSubmittedSemaphoreValueOffset[OUT]
|
||||
* - An offset of the max submitted value, relative to the semaphore surface entry start, if used.
|
||||
* Used to emulate 64-bit semaphore values on chips where 64-bit semaphores are not supported.
|
||||
*
|
||||
* monitoredFenceThresholdOffset[OUT]
|
||||
* - An offset of the monitored fence memory, relative to the semaphore surface entry start, if supported.
|
||||
*
|
||||
* size[OUT]
|
||||
* - A size of a single semaphore surface entry.
|
||||
*
|
||||
* caps[OUT]
|
||||
* - A mask of NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_CAPS_* values.
|
||||
*/
|
||||
#define NV2080_CTRL_CMD_FB_GET_SEMAPHORE_SURFACE_LAYOUT (0x20801352U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_CAPS_MONITORED_FENCE_SUPPORTED (0x00000001U)
|
||||
#define NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_CAPS_64BIT_SEMAPHORES_SUPPORTED (0x00000002U)
|
||||
|
||||
#define NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS_MESSAGE_ID (0x52U)
|
||||
|
||||
typedef struct NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NvU64 maxSubmittedSemaphoreValueOffset, 8);
|
||||
NV_DECLARE_ALIGNED(NvU64 monitoredFenceThresholdOffset, 8);
|
||||
NV_DECLARE_ALIGNED(NvU64 size, 8);
|
||||
NvU32 caps;
|
||||
} NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS;
|
||||
|
||||
/* _ctrl2080fb_h_ */
|
||||
|
||||
Reference in New Issue
Block a user