535.43.02

src/common/unix/nvidia-push/interface/nvidia-push-init.h

@@ -131,6 +131,7 @@ typedef struct _NvPushAllocDeviceParams {
     NvU32           numClasses;
     const NvU32    *supportedClasses;
 
+    NvPushConfidentialComputeMode confidentialComputeMode;
 } NvPushAllocDeviceParams;
 
 NvBool nvPushAllocDevice(
@@ -173,6 +174,13 @@ typedef struct _NvPushAllocChannelParams {
      */
     NvBool          ignoreChannelErrors;
 
+    /*
+     * This flag specifies if channel is intended to be used for
+     * encryption/decryption of data between SYSMEM <-> VIDMEM. Only CE
+     * & SEC2 Channels are capable of handling encrypted content.
+     */
+    NvBool          secureChannel;
+
     /*
      * DIFR stands for Display Idle Frame Refresh in which a CE is used to
      * prefetch framebuffer pixels into the GPU's L2 cache. The prefetch

src/common/unix/nvidia-push/interface/nvidia-push-types.h

@@ -69,6 +69,17 @@ typedef union _NvPushChannelUnion
 #endif
 } NvPushChannelUnion;
 
+typedef enum _NvPushConfidentialComputeMode {
+    /* Confidential computing is not in use. */
+    NV_PUSH_CONFIDENTIAL_COMPUTE_MODE_NONE,
+
+    /*
+     * The confidential compute mode of operation is Hopper Confidential
+     * Compute (HCC).
+     */
+    NV_PUSH_CONFIDENTIAL_COMPUTE_MODE_HCC,
+} NvPushConfidentialComputeMode;
+
 typedef struct _NvPushChannelRec NvPushChannelRec;
 typedef struct _NvPushChannelRec *NvPushChannelPtr;
 
@@ -121,6 +132,8 @@ typedef struct _NvPushDeviceRec {
     NvPushHal hal;
     const struct _NvPushImports *pImports;
 
+    /* Provided by the host driver */
+    NvPushConfidentialComputeMode confidentialComputeMode;
 } NvPushDeviceRec, *NvPushDevicePtr;