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560.35.03

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This commit is contained in:
Gaurav Juvekar
2024-08-19 10:46:21 -07:00
parent 315fd96d2d
commit ed4be64962
25 changed files with 156 additions and 51 deletions
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6
kernel-open/nvidia-uvm/uvm_common.h
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@@ -1,5 +1,5 @@
/*******************************************************************************
Copyright (c) 2013-2023 NVIDIA Corporation
Copyright (c) 2013-2024 NVIDIA Corporation
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to
@@ -423,7 +423,9 @@ static void uvm_get_unaddressable_range(NvU32 num_va_bits, NvU64 *first, NvU64 *
UVM_ASSERT(first);
UVM_ASSERT(outer);
if (uvm_platform_uses_canonical_form_address()) {
// Maxwell GPUs (num_va_bits == 40b) do not support canonical form address
// even when plugged into platforms using it.
if (uvm_platform_uses_canonical_form_address() && num_va_bits > 40) {
*first = 1ULL << (num_va_bits - 1);
*outer = (NvU64)((NvS64)(1ULL << 63) >> (64 - num_va_bits));
}

9
kernel-open/nvidia-uvm/uvm_populate_pageable.c
View File

@@ -137,6 +137,15 @@ NV_STATUS uvm_populate_pageable_vma(struct vm_area_struct *vma,
if (status != NV_OK)
goto out;
// Kernel v6.6 introduced a bug in set_pte_range() around the handling of AF
// bit. Instead of setting the AF bit, the bit is incorrectly being cleared
// in set_pte_range() during first-touch fault handling. Calling
// handle_mm_fault() again takes a different code path which correctly sets
// the AF bit.
status = handle_fault(vma, start, vma_num_pages, !!(gup_flags & FOLL_WRITE));
if (status != NV_OK)
goto out;
if (touch)
ret = NV_PIN_USER_PAGES_REMOTE(mm, start, vma_num_pages, gup_flags, pages, NULL);
else