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125 lines
5.4 KiB
C
125 lines
5.4 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2020-2012 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _RMIFRIF_H_
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#define _RMIFRIF_H_
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/*!
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* @file rmifrif.h
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* @brief Defines structures and interfaces common between RM and
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* Init-From-Rom (IFR).
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*
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* For systems supporting GC6 that have on-board VBIOS ROMs, IFR is used
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* to expedite several parts of GC6 exit in parallel with PEX init.
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*
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* After running devinit using a PMU ucode image loaded from the ROM itself,
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* parts of RM stateLoad can be done using RM's ucode image. This is
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* achieved by loading RM PMU ucode directly from FB. The primary difficulties
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* are how to find RM's PMU ucode and how to bootstrap it.
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*
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* We use the simple approach of allocating a fixed buffer near the
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* top of FB that contains the information required to bootstrap RM's PMU
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* image. This buffer is called the RM_IFR_GC6_CTX.
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*
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* The buffer is allocated within RM's reserved memory space, directly before
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* the VBIOS workspace (if any is present). Since the VBIOS workspace is
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* always a multiple of 64K, RM enforces that the offset between top of memory
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* and the end of the buffer is 64K. This way the IFR code can start
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* from the top of memory and search downwards in 64K decrements.
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*
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* A small header is placed at the end of the buffer which contains a
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* string signature identifying the buffer and other data needed to find the
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* remaining context data.
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*
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* Top_Of-FB /---------------------\ <-
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* | | \
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* | (VBIOS_Workspace) | | END_OFFSET
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* | | /
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* |---------------------| <-
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| | \
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* | GSP FW (if present) | | pFbHalPvtInfo->gspFwSizeBytes
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* | | /
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* |---------------------| <-
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* | RM_IFR_GC6_CTX_HDR | \
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* |---------------------| |
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* | (Padding) | | RM_IFR_GC6_CTX_HDR.bufferSize
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* |---------------------| |
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* | Sequence Data | /
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* |---------------------| <-
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* | |
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* | |
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* | |
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* | |
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* 0x00000000 \---------------------/
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*
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* To simplify the RM PMU bootstrap process and decrease IFR maintainence
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* cost, the bootstrap process is encoded as a sequence script, leveraging
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* a small subset of RM's PMU_SEQ_INST interface (see pmuseqinst.h).
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* Register writes are captured during the initial (CPU-driven) RM PMU bootstrap
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* and saved into a sequence for replay during GC6 exit.
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*
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* Only the following opcodes are supported currently:
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* NV_PMU_SEQ_WRITE_REG_OPC - (multi-)register write
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* NV_PMU_SEQ_EXIT_OPC - sequence done
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*
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*/
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/*!
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* Header structure which identifies the GC6 context buffer.
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*/
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typedef struct
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{
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NvU8 signature[12]; // RM_IFR_GC6_CTX_SIGNATURE
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NvU32 bufferSize; // Size of the entire context buffer in bytes
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NvU32 seqSizeWords; // Number of 32-bit words of sequence data
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NvU32 checksum; // 32-bit chunk checksum of the sequence data
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} RM_IFR_GC6_CTX_HDR, *PRM_IFR_GC6_CTX_HDR;
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/*!
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* String signature that IFR searches for to find the GC6 context buffer.
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*/
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#define RM_IFR_GC6_CTX_SIGNATURE "GC6_CTX_HDR" // 12 bytes
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/*!
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* Alignment of the offset between top of memory and the end of the
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* GC6 context buffer (which is also the end of the header).
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*/
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#define RM_IFR_GC6_CTX_END_OFFSET_ALIGNMENT 0x10000 // 64KB
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/*!
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* Maximum offset between top of memory and the end of the
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* GC6 context buffer. This is meant to be a loose upper bound preventing
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* scanning of the whole of memory (e.g. when something goes wrong).
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*/
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#define RM_IFR_GC6_CTX_END_OFFSET_MAX 0x1000000 // 16MB
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#define RM_IFR_GC6_CTX_END_OFFSET_MAX_WITH_GSP 0x10000000 // 256MB
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/*!
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* Maximum size of the context data in bytes.
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* This is limited by FECS falcon DMEM size (4K on Kepler).
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* The buffer must fit within DMEM together with stack and other global data.
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*/
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#define RM_IFR_GC6_CTX_DATA_MAX_SIZE 2048 // 2KB
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#endif // _RMIFRIF_H_
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