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209 lines
8.5 KiB
C
209 lines
8.5 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#pragma once
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#include <nvtypes.h>
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//
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// This file was generated with FINN, an NVIDIA coding tool.
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// Source file: ctrl/ctrl0050.finn
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//
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#include "ctrl/ctrlxxxx.h"
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#define NV0050_CTRL_CMD(cat, idx) NVXXXX_CTRL_CMD(0x0050, NV0050_CTRL_##cat, idx)
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#define NV0050_CTRL_RESERVED (0x00U)
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#define NV0050_CTRL_MEMORY (0x01U)
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#define NV0050_CTRL_CMD_NULL (0x5000U) /* finn: Evaluated from "(FINN_NV_CE_UTILS_RESERVED_INTERFACE_ID << 8) | 0x0" */
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/*
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* NV0050_CTRL_CMD_MEMSET
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*
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* Memsets a memory allocation and releases a semaphore on completion.
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*
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* hMemory [IN]
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* Memory handle of the memory descriptor that needs to be memset.
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* This is only available for verification purposes.
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*
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* offset [IN]
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* Offset into the memory descriptor.
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*
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* length [IN]
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* Length of physical memory to be memset.
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* Must be less than or equal to memory size.
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*
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* pattern [IN]
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* The pattern to memset to
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*
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* flags [IN]
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* Can be any of the NV0050_CTRL_MEMSET_FLAGS_*
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* DEFAULT
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* By default, the memcopy operation will be synchronous and using
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* physical copies
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* ASYNC
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* This flag forces this memset to be asynchronous.
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* VIRTUAL
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* This flag forces the memset to use Virtual addresses which are
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* identity mapped. To use this feature, users need to pass in the
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* hVaspace with identity mapped addresses for the entire memory during
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* construct.
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* PIPELINED
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* This flag allows the copy/memset operation to be pipelined with previous dma operations on the same channel
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* It means that its reads/writes are allowed happen before writes of preceding operations are tlb-acked
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* The flag can be useful when dealing with non-inersecting async operations,
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* but it can result in races when 2 async CE operations target the same allocation, and the second operation uses the flag
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* Race example:
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* 1. async copy A -> B
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* 2. pipelined copy B -> C
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* Here copy 2 can read B before copy finishes writing it, which will result in C containing invalid data
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* Technical details:
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* By default, first _LAUNCH_DMA method of a CE operation is marked has _TRANSFER_TYPE_NON_PIPELINED, which the flag overrides
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* Subsequent _LAUNCH_DMA methods belonging to the same operation use _TRANSFER_TYPE_PIPELINED, as each of these methods should
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* target different addresses
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*
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* submittedWorkId [OUT]
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* The work submission token users can poll on to wait for work
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* completed by CE. Only valid in case of ASYNC mode.
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*/
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#define NV0050_CTRL_MEMSET_FLAGS_DEFAULT 0
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#define NV0050_CTRL_MEMSET_FLAGS_ASYNC NVBIT(0)
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#define NV0050_CTRL_MEMSET_FLAGS_VIRTUAL NVBIT(1)
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#define NV0050_CTRL_MEMSET_FLAGS_PIPELINED NVBIT(2)
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#define NV0050_CTRL_CMD_MEMSET (0x500101U) /* finn: Evaluated from "(FINN_NV_CE_UTILS_UTILS_INTERFACE_ID << 8) | NV0050_CTRL_MEMSET_PARAMS_MESSAGE_ID" */
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#define NV0050_CTRL_MEMSET_PARAMS_MESSAGE_ID (0x1U)
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typedef struct NV0050_CTRL_MEMSET_PARAMS {
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NvHandle hMemory;
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NV_DECLARE_ALIGNED(NvU64 offset, 8);
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NV_DECLARE_ALIGNED(NvU64 length, 8);
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NvU32 pattern;
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NV_DECLARE_ALIGNED(NvU64 flags, 8);
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NV_DECLARE_ALIGNED(NvU64 submittedWorkId, 8);
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} NV0050_CTRL_MEMSET_PARAMS;
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/*
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* NV0050_CTRL_CMD_MEMCOPY
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*
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* Copies from a source memoryto ssdestination memory and releases a semaphore
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* on completion
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*
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* hDstMemory [IN]
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* Memory handle of the memory descriptor to which data will be copied.
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* This is only available for verification purposes.
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*
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* hSrcMemory [IN]
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* Memory handle of the memory descriptor from which data will be copied.
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* This is only available for verification purposes.
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*
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* dstOfffset [IN]
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* Offset into the destination memory descriptor.
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*
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* srcOffset [IN]
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* Offset into the source memory descriptor.
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*
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* length [IN]
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* Length of physical memory to be copied.
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* Must be less than or equal to both destination and source memory size.
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*
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* flags [IN]
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* Can be any of the NV0050_CTRL_MEMCOPY_FLAGS_*
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* DEFAULT
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* By default, the memcopy operation will be synchronous and using
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* physical copies
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* ASYNC
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* This flag forces this memset to be asynchronous.
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* VIRTUAL
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* This flag forces the memset to use Virtual addresses which are
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* identity mapped. To use this feature, users need to pass in the
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* hVaspace with identity mapped addresses for the entire memory during
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* construct.
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* PIPELINED
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* This flag allows the copy/memset operation to be pipelined with previous dma operations on the same channel
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* It means that its reads/writes are allowed happen before writes of preceding operations are tlb-acked
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* The flag can be useful when dealing with non-inersecting async operations,
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* but it can result in races when 2 async CE operations target the same allocation, and the second operation uses the flag
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* Race example:
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* 1. async copy A -> B
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* 2. pipelined copy B -> C
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* Here copy 2 can read B before copy finishes writing it, which will result in C containing invalid data
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* Technical details:
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* By default, first _LAUNCH_DMA method of a CE operation is marked has _TRANSFER_TYPE_NON_PIPELINED, which the flag overrides
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* Subsequent _LAUNCH_DMA methods belonging to the same operation use _TRANSFER_TYPE_PIPELINED, as each of these methods should
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* target different addresses
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*
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* submittedWorkId [OUT]
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* The work submission token users can poll on to wait for work
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* completed by CE. Only valid in case of ASYNC mode.
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*/
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#define NV0050_CTRL_MEMCOPY_FLAGS_DEFAULT 0
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#define NV0050_CTRL_MEMCOPY_FLAGS_ASYNC NVBIT(0)
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#define NV0050_CTRL_MEMCOPY_FLAGS_VIRTUAL NVBIT(1)
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#define NV0050_CTRL_MEMCOPY_FLAGS_PIPELINED NVBIT(2)
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#define NV0050_CTRL_CMD_MEMCOPY (0x500102U) /* finn: Evaluated from "(FINN_NV_CE_UTILS_UTILS_INTERFACE_ID << 8 | NV0050_CTRL_MEMCOPY_PARAMS_MESSAGE_ID)" */
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#define NV0050_CTRL_MEMCOPY_PARAMS_MESSAGE_ID (0x2U)
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typedef struct NV0050_CTRL_MEMCOPY_PARAMS {
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NvHandle hDstMemory;
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NvHandle hSrcMemory;
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NV_DECLARE_ALIGNED(NvU64 dstOffset, 8);
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NV_DECLARE_ALIGNED(NvU64 srcOffset, 8);
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NV_DECLARE_ALIGNED(NvU64 length, 8);
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NV_DECLARE_ALIGNED(NvU64 flags, 8);
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NV_DECLARE_ALIGNED(NvU64 submittedWorkId, 8);
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} NV0050_CTRL_MEMCOPY_PARAMS;
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/*
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* NV0050_CTRL_CMD_CHECK_PROGRESS
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*
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* Check if a previously submitted work item has been completed by HW.
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*
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* submittedWorkId [IN]
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* The work submission token users can poll on to wait for work
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* completed by CE.
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*
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*/
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#define NV0050_CTRL_CHECK_PROGRESS_RESULT_DEFAULT 0
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#define NV0050_CTRL_CHECK_PROGRESS_RESULT_FINISHED NVBIT(1)
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#define NV0050_CTRL_CMD_CHECK_PROGRESS (0x500103U) /* finn: Evaluated from "(FINN_NV_CE_UTILS_UTILS_INTERFACE_ID << 8 | NV0050_CTRL_CHECK_PROGRESS_PARAMS_MESSAGE_ID)" */
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#define NV0050_CTRL_CHECK_PROGRESS_PARAMS_MESSAGE_ID (0x3U)
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typedef struct NV0050_CTRL_CHECK_PROGRESS_PARAMS {
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NV_DECLARE_ALIGNED(NvU64 submittedWorkId, 8);
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NvU32 result;
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} NV0050_CTRL_CHECK_PROGRESS_PARAMS;
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/* _ctrl0050_h_ */
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