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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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118 lines
3.8 KiB
C++
118 lines
3.8 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "g_ce_utils_nvoc.h"
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#ifndef CE_UTILS_H
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#define CE_UTILS_H
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#include "gpu/gpu_resource.h" // GpuResource
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#include "class/cl0050.h"
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#include "ctrl/ctrl0050.h"
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#include "kernel/gpu/mem_mgr/channel_utils.h"
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typedef struct
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{
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MEMORY_DESCRIPTOR *pMemDesc;
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NvU64 offset;
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NvU64 length;
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NvU32 pattern;
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NvU64 flags;
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NvU64 submittedWorkId; // Payload to poll for async completion
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} CEUTILS_MEMSET_PARAMS;
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typedef struct
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{
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MEMORY_DESCRIPTOR *pSrcMemDesc;
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MEMORY_DESCRIPTOR *pDstMemDesc;
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NvU64 dstOffset;
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NvU64 srcOffset;
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NvU64 length;
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NvU64 flags;
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NvU64 submittedWorkId; // Payload to poll for async completion
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} CEUTILS_MEMCOPY_PARAMS;
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NVOC_PREFIX(ceutils) class CeUtils : Object
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{
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public:
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NV_STATUS ceutilsConstruct(CeUtils *pCeUtils, OBJGPU *pGpu, KERNEL_MIG_GPU_INSTANCE *pKernelMIGGPUInstance,
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NV0050_ALLOCATION_PARAMETERS *pAllocParams);
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void ceutilsDestruct(CeUtils *pCeUtils);
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NV_STATUS ceutilsMemset(CeUtils *pCeUtils, CEUTILS_MEMSET_PARAMS *pParams);
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NV_STATUS ceutilsMemcopy(CeUtils *pCeUtils, CEUTILS_MEMCOPY_PARAMS *pParams);
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NvU64 ceutilsUpdateProgress(CeUtils *pCeUtils);
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void ceutilsServiceInterrupts(CeUtils *pCeUtils);
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//
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// Internal states
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//
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NvHandle hClient;
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NvHandle hDevice;
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NvHandle hSubdevice;
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OBJCHANNEL *pChannel;
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OBJGPU *pGpu;
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KernelCE *pKCe;
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NvBool bUseVasForCeCopy;
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NvU32 hTdCopyClass;
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NvU64 lastSubmittedPayload;
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NvU64 lastCompletedPayload;
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};
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#if defined(DEBUG) || defined (DEVELOP)
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NVOC_PREFIX(ceutilsapi) class CeUtilsApi : GpuResource
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{
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public:
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NV_STATUS ceutilsapiConstruct(CeUtilsApi *pCeUtilsApi, CALL_CONTEXT *pCallContext,
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RS_RES_ALLOC_PARAMS_INTERNAL *pParams)
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: GpuResource(pCallContext, pParams);
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void ceutilsapiDestruct(CeUtilsApi *pCeUtilsApi);
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//
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// Below APIs are only provided for SRT testing, thus only available for debug or
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// develop driver builds
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//
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//
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RMCTRL_EXPORT(NV0050_CTRL_CMD_MEMSET, RMCTRL_FLAGS(PRIVILEGED, API_LOCK_READONLY))
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NV_STATUS ceutilsapiCtrlCmdMemset(CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMSET_PARAMS *pParams);
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RMCTRL_EXPORT(NV0050_CTRL_CMD_MEMCOPY, RMCTRL_FLAGS(PRIVILEGED, API_LOCK_READONLY))
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NV_STATUS ceutilsapiCtrlCmdMemcopy(CeUtilsApi *pCeUtilsApi, NV0050_CTRL_MEMCOPY_PARAMS *pParams);
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RMCTRL_EXPORT(NV0050_CTRL_CMD_CHECK_PROGRESS, RMCTRL_FLAGS(PRIVILEGED, API_LOCK_READONLY))
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NV_STATUS ceutilsapiCtrlCmdCheckProgress(CeUtilsApi *pCeUtilsApi, NV0050_CTRL_CHECK_PROGRESS_PARAMS *pParams);
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CeUtils *pCeUtils;
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};
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#endif
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#endif // CE_UTILS_H
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