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199 lines
6.7 KiB
C
199 lines
6.7 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#pragma once
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#include <nvtypes.h>
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//
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// This file was generated with FINN, an NVIDIA coding tool.
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// Source file: ctrl/ctrlb0cc/ctrlb0ccinternal.finn
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//
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#include "ctrl/ctrlb0cc/ctrlb0ccbase.h"
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#include "ctrl/ctrlb0cc/ctrlb0ccprofiler.h" /* Some controls derivative of b0ccprofiler */
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/*!
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* @ref NVB0CC_CTRL_CMD_ALLOC_PMA_STREAM
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*/
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#define NVB0CC_CTRL_CMD_INTERNAL_ALLOC_PMA_STREAM (0xb0cc0204) /* finn: Evaluated from "(FINN_MAXWELL_PROFILER_INTERNAL_INTERFACE_ID << 8) | NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS_MESSAGE_ID" */
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// FINN PORT: The below type was generated by the FINN port to
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// ensure that all API's have a unique structure associated
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// with them!
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#define NVB0CC_CTRL_CMD_INTERNAL_ALLOC_PMA_STREAM_FINN_PARAMS_MESSAGE_ID (0x0U)
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typedef struct NVB0CC_CTRL_CMD_INTERNAL_ALLOC_PMA_STREAM_FINN_PARAMS {
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NV_DECLARE_ALIGNED(NVB0CC_CTRL_ALLOC_PMA_STREAM_PARAMS params, 8);
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} NVB0CC_CTRL_CMD_INTERNAL_ALLOC_PMA_STREAM_FINN_PARAMS;
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/*!
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* NVB0CC_CTRL_CMD_INTERNAL_PERMISSIONS_INIT
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*
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* This command is used to convey the client permissions for appropriate
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* profiling capability initialization
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*/
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#define NVB0CC_CTRL_CMD_INTERNAL_PERMISSIONS_INIT (0xb0cc0203) /* finn: Evaluated from "(FINN_MAXWELL_PROFILER_INTERNAL_INTERFACE_ID << 8) | NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS_MESSAGE_ID" */
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#define NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS_MESSAGE_ID (0x3U)
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typedef struct NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS {
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/*!
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* [in] Is Admin profiling permitted
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*/
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NvBool bAdminProfilingPermitted;
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/*!
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* [in] Is Device profiling permitted
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*/
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NvBool bDevProfilingPermitted;
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/*!
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* [in] Is Memory profiling permitted
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*/
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NvBool bMemoryProfilingPermitted;
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} NVB0CC_CTRL_INTERNAL_PERMISSIONS_INIT_PARAMS;
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#define NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS_MESSAGE_ID (0x4U)
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typedef struct NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS {
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/*!
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* [in] Memory handle (RW memory) for streaming records.
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* Size of this must be >= @ref pmaBufferOffset + @ref pmaBufferSize.
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*/
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NvHandle hMemPmaBuffer;
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/*!
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* [in] Start offset of PMA buffer (offset in @ref hMemPmaBuffer).
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*/
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NV_DECLARE_ALIGNED(NvU64 pmaBufferOffset, 8);
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/*!
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* [in] size of the buffer. This must be <= NVB0CC_PMA_BUFFER_SIZE_MAX.
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*/
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NV_DECLARE_ALIGNED(NvU64 pmaBufferSize, 8);
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/*!
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* [in] Memory handle (RO memory) for streaming number of bytes available.
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* Size of this must be of at least @ref pmaBytesAvailableOffset +
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* @ref NVB0CC_PMA_BYTES_AVAILABLE_SIZE.
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*/
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NvHandle hMemPmaBytesAvailable;
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/*!
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* [in] Start offset of PMA bytes available buffer (offset in @ref hMemPmaBytesAvailable).
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*/
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NV_DECLARE_ALIGNED(NvU64 pmaBytesAvailableOffset, 8);
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/*!
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* [in] Enable ctxsw for PMA stream.
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*/
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NvBool ctxsw;
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/*!
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* [in/out] The PMA Channel Index associated with a given PMA stream.
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* This parameter is input when bInputPmaChIdx is true, else it's output parameter.
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*/
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NvU32 pmaChannelIdx;
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/*!
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* [out] PMA buffer VA. Note that this is a HWPM Virtual address.
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*/
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NV_DECLARE_ALIGNED(NvU64 pmaBufferVA, 8);
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/*!
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* [In] This field must be specified by the client to indicate whether the
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* pmaChannelIdx is input parameter or output parameter.
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*/
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NvBool bInputPmaChIdx;
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} NVB0CC_CTRL_INTERNAL_ALLOC_PMA_STREAM_PARAMS;
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/*!
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* NVB0CC_CTRL_CMD_INTERNAL_FREE_PMA_STREAM
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*
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* Internal logic for PMA Stream Free
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*/
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#define NVB0CC_CTRL_CMD_INTERNAL_FREE_PMA_STREAM (0xb0cc0206) /* finn: Evaluated from "(FINN_MAXWELL_PROFILER_INTERNAL_INTERFACE_ID << 8) | NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS_MESSAGE_ID" */
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#define NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS_MESSAGE_ID (0x6U)
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typedef struct NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS {
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/*!
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* [in] The PMA channel index associated with a given PMA stream.
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*/
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NvU32 pmaChannelIdx;
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} NVB0CC_CTRL_INTERNAL_FREE_PMA_STREAM_PARAMS;
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/*!
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* NVB0CC_CTRL_CMD_INTERNAL_GET_MAX_PMAS
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*
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* Get the maximum number of PMA channels
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*/
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#define NVB0CC_CTRL_CMD_INTERNAL_GET_MAX_PMAS (0xb0cc0207) /* finn: Evaluated from "(FINN_MAXWELL_PROFILER_INTERNAL_INTERFACE_ID << 8) | NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS_MESSAGE_ID" */
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#define NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS_MESSAGE_ID (0x7U)
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typedef struct NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS {
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/*!
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* [out] Max number of PMA channels
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*/
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NvU32 maxPmaChannels;
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} NVB0CC_CTRL_INTERNAL_GET_MAX_PMAS_PARAMS;
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/*!
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* NVB0CC_CTRL_CMD_INTERNAL_BIND_PM_RESOURCES
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*
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* Internally bind PM resources.
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*/
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#define NVB0CC_CTRL_CMD_INTERNAL_BIND_PM_RESOURCES (0xb0cc0208) /* finn: Evaluated from "(FINN_MAXWELL_PROFILER_INTERNAL_INTERFACE_ID << 8) | 0x8" */
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/*!
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* NVB0CC_CTRL_CMD_INTERNAL_UNBIND_PM_RESOURCES
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*
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* Internally unbind PM resources.
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*/
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#define NVB0CC_CTRL_CMD_INTERNAL_UNBIND_PM_RESOURCES (0xb0cc0209) /* finn: Evaluated from "(FINN_MAXWELL_PROFILER_INTERNAL_INTERFACE_ID << 8) | 0x9" */
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/*!
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* NVB0CC_CTRL_CMD_INTERNAL_RESERVE_HWPM_LEGACY
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*
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* Reserve legacy HWPM resources
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*/
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#define NVB0CC_CTRL_CMD_INTERNAL_RESERVE_HWPM_LEGACY (0xb0cc020a) /* finn: Evaluated from "(FINN_MAXWELL_PROFILER_INTERNAL_INTERFACE_ID << 8) | NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS_MESSAGE_ID" */
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#define NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS_MESSAGE_ID (0xaU)
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typedef struct NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS {
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/*!
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* [in] Enable ctxsw for HWPM.
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*/
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NvBool ctxsw;
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} NVB0CC_CTRL_INTERNAL_RESERVE_HWPM_LEGACY_PARAMS;
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/* _ctrlb0ccinternal_h_ */
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