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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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57 lines
6.4 KiB
C
57 lines
6.4 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __gb202_dev_boot_h__
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#define __gb202_dev_boot_h__
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#define NV_SYSCTRL_SEC_FAULT 0x3:0x0 /* R---M */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_FUSE_POD 0:0 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_FUSE_SCPM 1:1 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_IFF_SEQUENCE_TOO_BIG 2:2 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_IFF_PRE_IFF_CRC_CHECK_FAILED 3:3 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_IFF_POST_IFF_CRC_CHECK_FAILED 4:4 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_IFF_ECC_UNCORRECTABLE_ERROR 5:5 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_IFF_CMD_FORMAT_ERROR 6:6 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_IFF_PRI_ERROR 7:7 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_FSP_SCPM 10:10 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_FSP_DCLS 11:11 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_FSP_EMP 12:12 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_FSP_UNCORRECTABLE_ERROR 13:13 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_FSP_L5_WDT 14:14 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_SEC2_SCPM 15:15 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_SEC2_DCLS 16:16 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_SEC2_L5_WDT 17:17 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_GSP_DCLS 18:18 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_GSP_L5_WDT 19:19 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_PMU_DCLS 20:20 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_PMU_L5_WDT 21:21 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_XTAL_CTFDC 22:22 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_CLOCK_XTAL_FMON 23:23 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_CLOCK_GPC_FMON 24:24 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_DEVICE_LOCKDOWN 30:30 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_FUNCTION_LOCKDOWN 31:31 /* R-XUF */
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#define NV_SYSCTRL_SEC_FAULT_BIT_POSITION_INTERRUPT 32:32 /* R-XUF */
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#endif // __gb202_dev_boot_h__
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