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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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52 lines
3.5 KiB
C
52 lines
3.5 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __gb202_dev_mmu_h__
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#define __gb202_dev_mmu_h__
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#define NV_MMU_PTE_KIND_INVALID 0x07 /* R---V */
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#define NV_MMU_PTE_KIND_PITCH 0x00 /* R---V */
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#define NV_MMU_PTE_KIND_GENERIC_MEMORY 0x6 /* R---V */
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#define NV_MMU_PTE_KIND_Z16 0x1 /* R---V */
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#define NV_MMU_PTE_KIND_S8 0x2 /* R---V */
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#define NV_MMU_PTE_KIND_S8Z24 0x3 /* R---V */
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#define NV_MMU_PTE_KIND_ZF32_X24S8 0x4 /* R---V */
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#define NV_MMU_PTE_KIND_Z24S8 0x5 /* R---V */
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#define NV_MMU_PTE_KIND_GENERIC_MEMORY_COMPRESSIBLE 0x8 /* R---V */
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#define NV_MMU_PTE_KIND_GENERIC_MEMORY_COMPRESSIBLE_DISABLE_PLC 0x9 /* R---V */
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#define NV_MMU_PTE_KIND_S8_COMPRESSIBLE_DISABLE_PLC 0xA /* R---V */
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#define NV_MMU_PTE_KIND_Z16_COMPRESSIBLE_DISABLE_PLC 0xB /* R---V */
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#define NV_MMU_PTE_KIND_S8Z24_COMPRESSIBLE_DISABLE_PLC 0xC /* R---V */
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#define NV_MMU_PTE_KIND_ZF32_X24S8_COMPRESSIBLE_DISABLE_PLC 0xD /* R---V */
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#define NV_MMU_PTE_KIND_Z24S8_COMPRESSIBLE_DISABLE_PLC 0xE /* R---V */
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#define NV_MMU_PTE_KIND_SMSKED_MESSAGE 0xF /* R---V */
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#define NV_MMU_CLIENT_KIND 2:0 /* RWXVF */
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#define NV_MMU_CLIENT_KIND_Z16 0x1 /* R---V */
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#define NV_MMU_CLIENT_KIND_S8 0x2 /* R---V */
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#define NV_MMU_CLIENT_KIND_S8Z24 0x3 /* R---V */
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#define NV_MMU_CLIENT_KIND_ZF32_X24S8 0x4 /* R---V */
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#define NV_MMU_CLIENT_KIND_Z24S8 0x5 /* R---V */
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#define NV_MMU_CLIENT_KIND_GENERIC_MEMORY 0x6 /* R---V */
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#define NV_MMU_CLIENT_KIND_INVALID 0x7 /* R---V */
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#define NV_MMU_PTE_APERTURE_VIDEO_MEMORY 0x00000000 /* RW--V */
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#endif // __gb202_dev_mmu_h__
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