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https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-07 00:29:58 +00:00
101 lines
3.4 KiB
C
101 lines
3.4 KiB
C
#define NVOC_GPU_HALSPEC_H_PRIVATE_ACCESS_ALLOWED
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#include "nvoc/runtime.h"
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#include "nvoc/rtti.h"
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#include "nvtypes.h"
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#include "nvport/nvport.h"
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#include "nvport/inline/util_valist.h"
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#include "utils/nvassert.h"
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#include "g_gpu_halspec_nvoc.h"
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#ifdef DEBUG
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char __nvoc_class_id_uniqueness_check_0x34a6d6 = 1;
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#endif
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner;
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void __nvoc_init_RmHalspecOwner(RmHalspecOwner*,
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NvU32 ChipHal_arch, NvU32 ChipHal_impl, NvU32 ChipHal_hidrev,
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RM_RUNTIME_VARIANT RmVariantHal_rmVariant,
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TEGRA_CHIP_TYPE TegraChipHal_tegraType,
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NvU32 DispIpHal_ipver);
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void __nvoc_init_funcTable_RmHalspecOwner(RmHalspecOwner*);
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NV_STATUS __nvoc_ctor_RmHalspecOwner(RmHalspecOwner*);
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void __nvoc_init_dataField_RmHalspecOwner(RmHalspecOwner*);
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void __nvoc_dtor_RmHalspecOwner(RmHalspecOwner*);
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extern const struct NVOC_EXPORT_INFO __nvoc_export_info_RmHalspecOwner;
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static const struct NVOC_RTTI __nvoc_rtti_RmHalspecOwner_RmHalspecOwner = {
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/*pClassDef=*/ &__nvoc_class_def_RmHalspecOwner,
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/*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_RmHalspecOwner,
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/*offset=*/ 0,
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};
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static const struct NVOC_CASTINFO __nvoc_castinfo_RmHalspecOwner = {
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/*numRelatives=*/ 1,
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/*relatives=*/ {
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&__nvoc_rtti_RmHalspecOwner_RmHalspecOwner,
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},
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};
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// Not instantiable because it's not derived from class "Object"
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const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner =
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{
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/*classInfo=*/ {
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/*size=*/ sizeof(RmHalspecOwner),
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/*classId=*/ classId(RmHalspecOwner),
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/*providerId=*/ &__nvoc_rtti_provider,
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#if NV_PRINTF_STRINGS_ALLOWED
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/*name=*/ "RmHalspecOwner",
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#endif
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},
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/*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) NULL,
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/*pCastInfo=*/ &__nvoc_castinfo_RmHalspecOwner,
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/*pExportInfo=*/ &__nvoc_export_info_RmHalspecOwner
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};
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const struct NVOC_EXPORT_INFO __nvoc_export_info_RmHalspecOwner =
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{
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/*numEntries=*/ 0,
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/*pExportEntries=*/ 0
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};
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void __nvoc_dtor_RmHalspecOwner(RmHalspecOwner *pThis) {
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PORT_UNREFERENCED_VARIABLE(pThis);
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}
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void __nvoc_init_dataField_RmHalspecOwner(RmHalspecOwner *pThis) {
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PORT_UNREFERENCED_VARIABLE(pThis);
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}
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NV_STATUS __nvoc_ctor_RmHalspecOwner(RmHalspecOwner *pThis) {
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NV_STATUS status = NV_OK;
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__nvoc_init_dataField_RmHalspecOwner(pThis);
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goto __nvoc_ctor_RmHalspecOwner_exit; // Success
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__nvoc_ctor_RmHalspecOwner_exit:
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return status;
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}
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static void __nvoc_init_funcTable_RmHalspecOwner_1(RmHalspecOwner *pThis) {
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PORT_UNREFERENCED_VARIABLE(pThis);
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}
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void __nvoc_init_funcTable_RmHalspecOwner(RmHalspecOwner *pThis) {
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__nvoc_init_funcTable_RmHalspecOwner_1(pThis);
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}
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void __nvoc_init_RmHalspecOwner(RmHalspecOwner *pThis,
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NvU32 ChipHal_arch, NvU32 ChipHal_impl, NvU32 ChipHal_hidrev,
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RM_RUNTIME_VARIANT RmVariantHal_rmVariant,
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TEGRA_CHIP_TYPE TegraChipHal_tegraType,
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NvU32 DispIpHal_ipver) {
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pThis->__nvoc_pbase_RmHalspecOwner = pThis;
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__nvoc_init_halspec_ChipHal(&pThis->chipHal, ChipHal_arch, ChipHal_impl, ChipHal_hidrev);
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__nvoc_init_halspec_RmVariantHal(&pThis->rmVariantHal, RmVariantHal_rmVariant);
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__nvoc_init_halspec_TegraChipHal(&pThis->tegraChipHal, TegraChipHal_tegraType);
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__nvoc_init_halspec_DispIpHal(&pThis->dispIpHal, DispIpHal_ipver);
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__nvoc_init_funcTable_RmHalspecOwner(pThis);
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}
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