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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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100 lines
3.7 KiB
C
100 lines
3.7 KiB
C
#ifndef _G_GPU_HALSPEC_NVOC_H_
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#define _G_GPU_HALSPEC_NVOC_H_
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#include "nvoc/runtime.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "g_gpu_halspec_nvoc.h"
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#ifndef GPU_HALSPEC_H
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#define GPU_HALSPEC_H
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#include "g_chips2halspec.h" // NVOC halspec, generated by rmconfig.pl
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// Private field names are wrapped in PRIVATE_FIELD, which does nothing for
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// the matching C source file, but causes diagnostics to be issued if another
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// source file references the field.
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#ifdef NVOC_GPU_HALSPEC_H_PRIVATE_ACCESS_ALLOWED
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#define PRIVATE_FIELD(x) x
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#else
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#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
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#endif
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struct RmHalspecOwner {
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const struct NVOC_RTTI *__nvoc_rtti;
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struct RmHalspecOwner *__nvoc_pbase_RmHalspecOwner;
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struct ChipHal chipHal;
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struct RmVariantHal rmVariantHal;
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struct TegraChipHal tegraChipHal;
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struct DispIpHal dispIpHal;
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};
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#ifndef __NVOC_CLASS_RmHalspecOwner_TYPEDEF__
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#define __NVOC_CLASS_RmHalspecOwner_TYPEDEF__
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typedef struct RmHalspecOwner RmHalspecOwner;
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#endif /* __NVOC_CLASS_RmHalspecOwner_TYPEDEF__ */
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#ifndef __nvoc_class_id_RmHalspecOwner
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#define __nvoc_class_id_RmHalspecOwner 0x34a6d6
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#endif /* __nvoc_class_id_RmHalspecOwner */
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner;
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#define __staticCast_RmHalspecOwner(pThis) \
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((pThis)->__nvoc_pbase_RmHalspecOwner)
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#ifdef __nvoc_gpu_halspec_h_disabled
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#define __dynamicCast_RmHalspecOwner(pThis) ((RmHalspecOwner*)NULL)
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#else //__nvoc_gpu_halspec_h_disabled
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#define __dynamicCast_RmHalspecOwner(pThis) \
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((RmHalspecOwner*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RmHalspecOwner)))
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#endif //__nvoc_gpu_halspec_h_disabled
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NV_STATUS __nvoc_objCreateDynamic_RmHalspecOwner(RmHalspecOwner**, Dynamic*, NvU32, va_list);
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NV_STATUS __nvoc_objCreate_RmHalspecOwner(RmHalspecOwner**, Dynamic*, NvU32,
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NvU32 ChipHal_arch, NvU32 ChipHal_impl, NvU32 ChipHal_hidrev,
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RM_RUNTIME_VARIANT RmVariantHal_rmVariant,
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TEGRA_CHIP_TYPE TegraChipHal_tegraType,
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NvU32 DispIpHal_ipver);
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#define __objCreate_RmHalspecOwner(ppNewObj, pParent, createFlags, ChipHal_arch, ChipHal_impl, ChipHal_hidrev, RmVariantHal_rmVariant, TegraChipHal_tegraType, DispIpHal_ipver) \
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__nvoc_objCreate_RmHalspecOwner((ppNewObj), staticCast((pParent), Dynamic), (createFlags), ChipHal_arch, ChipHal_impl, ChipHal_hidrev, RmVariantHal_rmVariant, TegraChipHal_tegraType, DispIpHal_ipver)
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#undef PRIVATE_FIELD
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#endif // GPU_HALSPEC_H
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _G_GPU_HALSPEC_NVOC_H_
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