mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-06 16:19:58 +00:00
443 lines
24 KiB
C
443 lines
24 KiB
C
#define NVOC_KERNEL_NVDEC_CTX_H_PRIVATE_ACCESS_ALLOWED
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#include "nvoc/runtime.h"
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#include "nvoc/rtti.h"
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#include "nvtypes.h"
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#include "nvport/nvport.h"
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#include "nvport/inline/util_valist.h"
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#include "utils/nvassert.h"
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#include "g_kernel_nvdec_ctx_nvoc.h"
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#ifdef DEBUG
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char __nvoc_class_id_uniqueness_check_0x70d2be = 1;
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#endif
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_NvdecContext;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsResource;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResourceCommon;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_GpuResource;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_INotifier;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_Notifier;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_ChannelDescendant;
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void __nvoc_init_NvdecContext(NvdecContext*, RmHalspecOwner* );
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void __nvoc_init_funcTable_NvdecContext(NvdecContext*, RmHalspecOwner* );
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NV_STATUS __nvoc_ctor_NvdecContext(NvdecContext*, RmHalspecOwner* , struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams);
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void __nvoc_init_dataField_NvdecContext(NvdecContext*, RmHalspecOwner* );
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void __nvoc_dtor_NvdecContext(NvdecContext*);
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extern const struct NVOC_EXPORT_INFO __nvoc_export_info_NvdecContext;
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_NvdecContext = {
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/*pClassDef=*/ &__nvoc_class_def_NvdecContext,
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/*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_NvdecContext,
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/*offset=*/ 0,
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};
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_Object = {
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/*pClassDef=*/ &__nvoc_class_def_Object,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(NvdecContext, __nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object),
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};
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_RsResource = {
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/*pClassDef=*/ &__nvoc_class_def_RsResource,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(NvdecContext, __nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource),
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};
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_RmResourceCommon = {
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/*pClassDef=*/ &__nvoc_class_def_RmResourceCommon,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(NvdecContext, __nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon),
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};
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_RmResource = {
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/*pClassDef=*/ &__nvoc_class_def_RmResource,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(NvdecContext, __nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource),
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};
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_GpuResource = {
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/*pClassDef=*/ &__nvoc_class_def_GpuResource,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(NvdecContext, __nvoc_base_ChannelDescendant.__nvoc_base_GpuResource),
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};
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_INotifier = {
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/*pClassDef=*/ &__nvoc_class_def_INotifier,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(NvdecContext, __nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier),
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};
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_Notifier = {
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/*pClassDef=*/ &__nvoc_class_def_Notifier,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(NvdecContext, __nvoc_base_ChannelDescendant.__nvoc_base_Notifier),
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};
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static const struct NVOC_RTTI __nvoc_rtti_NvdecContext_ChannelDescendant = {
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/*pClassDef=*/ &__nvoc_class_def_ChannelDescendant,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(NvdecContext, __nvoc_base_ChannelDescendant),
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};
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static const struct NVOC_CASTINFO __nvoc_castinfo_NvdecContext = {
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/*numRelatives=*/ 9,
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/*relatives=*/ {
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&__nvoc_rtti_NvdecContext_NvdecContext,
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&__nvoc_rtti_NvdecContext_ChannelDescendant,
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&__nvoc_rtti_NvdecContext_Notifier,
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&__nvoc_rtti_NvdecContext_INotifier,
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&__nvoc_rtti_NvdecContext_GpuResource,
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&__nvoc_rtti_NvdecContext_RmResource,
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&__nvoc_rtti_NvdecContext_RmResourceCommon,
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&__nvoc_rtti_NvdecContext_RsResource,
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&__nvoc_rtti_NvdecContext_Object,
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},
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};
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const struct NVOC_CLASS_DEF __nvoc_class_def_NvdecContext =
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{
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/*classInfo=*/ {
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/*size=*/ sizeof(NvdecContext),
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/*classId=*/ classId(NvdecContext),
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/*providerId=*/ &__nvoc_rtti_provider,
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#if NV_PRINTF_STRINGS_ALLOWED
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/*name=*/ "NvdecContext",
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#endif
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},
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/*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_NvdecContext,
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/*pCastInfo=*/ &__nvoc_castinfo_NvdecContext,
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/*pExportInfo=*/ &__nvoc_export_info_NvdecContext
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};
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static NV_STATUS __nvoc_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap(struct NvdecContext *pChannelDescendant, NvBool bSubdeviceHandleProvided) {
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return chandesCheckMemInterUnmap((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), bSubdeviceHandleProvided);
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}
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static NvBool __nvoc_thunk_GpuResource_nvdecctxShareCallback(struct NvdecContext *pGpuResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) {
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return gpuresShareCallback((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pInvokingClient, pParentRef, pSharePolicy);
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}
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static NvBool __nvoc_thunk_RmResource_nvdecctxAccessCallback(struct NvdecContext *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) {
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return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pInvokingClient, pAllocParams, accessRight);
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}
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static NV_STATUS __nvoc_thunk_RsResource_nvdecctxMapTo(struct NvdecContext *pResource, RS_RES_MAP_TO_PARAMS *pParams) {
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return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams);
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}
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static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxGetMapAddrSpace(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) {
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return gpuresGetMapAddrSpace((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, mapFlags, pAddrSpace);
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}
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static void __nvoc_thunk_Notifier_nvdecctxSetNotificationShare(struct NvdecContext *pNotifier, struct NotifShare *pNotifShare) {
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notifySetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), pNotifShare);
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}
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static NvU32 __nvoc_thunk_RsResource_nvdecctxGetRefCount(struct NvdecContext *pResource) {
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return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset));
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}
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static void __nvoc_thunk_RsResource_nvdecctxAddAdditionalDependants(struct RsClient *pClient, struct NvdecContext *pResource, RsResourceRef *pReference) {
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resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pReference);
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}
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static NV_STATUS __nvoc_thunk_RmResource_nvdecctxControl_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
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return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams);
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}
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static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize(struct NvdecContext *pGpuResource, struct OBJGPU *pGpu, NvU32 *pOffset, NvU32 *pSize) {
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return gpuresGetRegBaseOffsetAndSize((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pGpu, pOffset, pSize);
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}
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static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxInternalControlForward(struct NvdecContext *pGpuResource, NvU32 command, void *pParams, NvU32 size) {
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return gpuresInternalControlForward((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), command, pParams, size);
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}
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static NV_STATUS __nvoc_thunk_RsResource_nvdecctxUnmapFrom(struct NvdecContext *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) {
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return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams);
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}
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static void __nvoc_thunk_RmResource_nvdecctxControl_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
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rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams);
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}
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static NV_STATUS __nvoc_thunk_RsResource_nvdecctxControlLookup(struct NvdecContext *pResource, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams, const struct NVOC_EXPORTED_METHOD_DEF **ppEntry) {
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return resControlLookup((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pParams, ppEntry);
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}
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static NV_STATUS __nvoc_thunk_ChannelDescendant_nvdecctxGetSwMethods(struct NvdecContext *pChannelDescendant, const METHOD **ppMethods, NvU32 *pNumMethods) {
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return chandesGetSwMethods((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), ppMethods, pNumMethods);
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}
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static NvHandle __nvoc_thunk_GpuResource_nvdecctxGetInternalObjectHandle(struct NvdecContext *pGpuResource) {
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return gpuresGetInternalObjectHandle((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset));
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}
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static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxControl(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
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return gpuresControl((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pParams);
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}
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static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxUnmap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RsCpuMapping *pCpuMapping) {
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return gpuresUnmap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pCpuMapping);
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}
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static NV_STATUS __nvoc_thunk_RmResource_nvdecctxGetMemInterMapParams(struct NvdecContext *pRmResource, RMRES_MEM_INTER_MAP_PARAMS *pParams) {
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return rmresGetMemInterMapParams((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pParams);
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}
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static NV_STATUS __nvoc_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor(struct NvdecContext *pRmResource, struct MEMORY_DESCRIPTOR **ppMemDesc) {
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return rmresGetMemoryMappingDescriptor((struct RmResource *)(((unsigned char *)pRmResource) + __nvoc_rtti_NvdecContext_RmResource.offset), ppMemDesc);
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}
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static NvBool __nvoc_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling(struct NvdecContext *pChannelDescendant, NvU32 hHandle) {
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return chandesIsSwMethodStalling((struct ChannelDescendant *)(((unsigned char *)pChannelDescendant) + __nvoc_rtti_NvdecContext_ChannelDescendant.offset), hHandle);
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}
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static NV_STATUS __nvoc_thunk_RsResource_nvdecctxControlFilter(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
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return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), pCallContext, pParams);
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}
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static NV_STATUS __nvoc_thunk_Notifier_nvdecctxUnregisterEvent(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, NvHandle hEventClient, NvHandle hEvent) {
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return notifyUnregisterEvent((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), hNotifierClient, hNotifierResource, hEventClient, hEvent);
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}
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static NV_STATUS __nvoc_thunk_RmResource_nvdecctxControlSerialization_Prologue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
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return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams);
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}
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static NvBool __nvoc_thunk_RsResource_nvdecctxCanCopy(struct NvdecContext *pResource) {
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return resCanCopy((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset));
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}
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static void __nvoc_thunk_RsResource_nvdecctxPreDestruct(struct NvdecContext *pResource) {
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resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset));
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}
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static NV_STATUS __nvoc_thunk_RsResource_nvdecctxIsDuplicate(struct NvdecContext *pResource, NvHandle hMemory, NvBool *pDuplicate) {
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return resIsDuplicate((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RsResource.offset), hMemory, pDuplicate);
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}
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static void __nvoc_thunk_RmResource_nvdecctxControlSerialization_Epilogue(struct NvdecContext *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
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rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_NvdecContext_RmResource.offset), pCallContext, pParams);
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}
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static PEVENTNOTIFICATION *__nvoc_thunk_Notifier_nvdecctxGetNotificationListPtr(struct NvdecContext *pNotifier) {
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return notifyGetNotificationListPtr((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset));
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}
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static struct NotifShare *__nvoc_thunk_Notifier_nvdecctxGetNotificationShare(struct NvdecContext *pNotifier) {
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return notifyGetNotificationShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset));
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}
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static NV_STATUS __nvoc_thunk_GpuResource_nvdecctxMap(struct NvdecContext *pGpuResource, struct CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, struct RsCpuMapping *pCpuMapping) {
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return gpuresMap((struct GpuResource *)(((unsigned char *)pGpuResource) + __nvoc_rtti_NvdecContext_GpuResource.offset), pCallContext, pParams, pCpuMapping);
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}
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static NV_STATUS __nvoc_thunk_Notifier_nvdecctxGetOrAllocNotifShare(struct NvdecContext *pNotifier, NvHandle hNotifierClient, NvHandle hNotifierResource, struct NotifShare **ppNotifShare) {
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return notifyGetOrAllocNotifShare((struct Notifier *)(((unsigned char *)pNotifier) + __nvoc_rtti_NvdecContext_Notifier.offset), hNotifierClient, hNotifierResource, ppNotifShare);
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}
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const struct NVOC_EXPORT_INFO __nvoc_export_info_NvdecContext =
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{
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/*numEntries=*/ 0,
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/*pExportEntries=*/ 0
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};
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void __nvoc_dtor_ChannelDescendant(ChannelDescendant*);
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void __nvoc_dtor_NvdecContext(NvdecContext *pThis) {
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__nvoc_nvdecctxDestruct(pThis);
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__nvoc_dtor_ChannelDescendant(&pThis->__nvoc_base_ChannelDescendant);
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PORT_UNREFERENCED_VARIABLE(pThis);
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}
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void __nvoc_init_dataField_NvdecContext(NvdecContext *pThis, RmHalspecOwner *pRmhalspecowner) {
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RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
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const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
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PORT_UNREFERENCED_VARIABLE(pThis);
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PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
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PORT_UNREFERENCED_VARIABLE(rmVariantHal);
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PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
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}
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NV_STATUS __nvoc_ctor_ChannelDescendant(ChannelDescendant* , RmHalspecOwner* , struct CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *, ENGDESCRIPTOR (*)(struct OBJGPU *, NvU32, void *));
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NV_STATUS __nvoc_ctor_NvdecContext(NvdecContext *pThis, RmHalspecOwner *pRmhalspecowner, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) {
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NV_STATUS status = NV_OK;
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status = __nvoc_ctor_ChannelDescendant(&pThis->__nvoc_base_ChannelDescendant, pRmhalspecowner, arg_pCallContext, arg_pParams, nvdecGetEngineDescFromAllocParams);
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if (status != NV_OK) goto __nvoc_ctor_NvdecContext_fail_ChannelDescendant;
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__nvoc_init_dataField_NvdecContext(pThis, pRmhalspecowner);
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status = __nvoc_nvdecctxConstruct(pThis, arg_pCallContext, arg_pParams);
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if (status != NV_OK) goto __nvoc_ctor_NvdecContext_fail__init;
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goto __nvoc_ctor_NvdecContext_exit; // Success
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__nvoc_ctor_NvdecContext_fail__init:
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__nvoc_dtor_ChannelDescendant(&pThis->__nvoc_base_ChannelDescendant);
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__nvoc_ctor_NvdecContext_fail_ChannelDescendant:
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__nvoc_ctor_NvdecContext_exit:
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return status;
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}
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static void __nvoc_init_funcTable_NvdecContext_1(NvdecContext *pThis, RmHalspecOwner *pRmhalspecowner) {
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RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
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const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
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PORT_UNREFERENCED_VARIABLE(pThis);
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PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
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PORT_UNREFERENCED_VARIABLE(rmVariantHal);
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PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
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pThis->__nvdecctxCheckMemInterUnmap__ = &__nvoc_thunk_ChannelDescendant_nvdecctxCheckMemInterUnmap;
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pThis->__nvdecctxShareCallback__ = &__nvoc_thunk_GpuResource_nvdecctxShareCallback;
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pThis->__nvdecctxAccessCallback__ = &__nvoc_thunk_RmResource_nvdecctxAccessCallback;
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pThis->__nvdecctxMapTo__ = &__nvoc_thunk_RsResource_nvdecctxMapTo;
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pThis->__nvdecctxGetMapAddrSpace__ = &__nvoc_thunk_GpuResource_nvdecctxGetMapAddrSpace;
|
|
|
|
pThis->__nvdecctxSetNotificationShare__ = &__nvoc_thunk_Notifier_nvdecctxSetNotificationShare;
|
|
|
|
pThis->__nvdecctxGetRefCount__ = &__nvoc_thunk_RsResource_nvdecctxGetRefCount;
|
|
|
|
pThis->__nvdecctxAddAdditionalDependants__ = &__nvoc_thunk_RsResource_nvdecctxAddAdditionalDependants;
|
|
|
|
pThis->__nvdecctxControl_Prologue__ = &__nvoc_thunk_RmResource_nvdecctxControl_Prologue;
|
|
|
|
pThis->__nvdecctxGetRegBaseOffsetAndSize__ = &__nvoc_thunk_GpuResource_nvdecctxGetRegBaseOffsetAndSize;
|
|
|
|
pThis->__nvdecctxInternalControlForward__ = &__nvoc_thunk_GpuResource_nvdecctxInternalControlForward;
|
|
|
|
pThis->__nvdecctxUnmapFrom__ = &__nvoc_thunk_RsResource_nvdecctxUnmapFrom;
|
|
|
|
pThis->__nvdecctxControl_Epilogue__ = &__nvoc_thunk_RmResource_nvdecctxControl_Epilogue;
|
|
|
|
pThis->__nvdecctxControlLookup__ = &__nvoc_thunk_RsResource_nvdecctxControlLookup;
|
|
|
|
pThis->__nvdecctxGetSwMethods__ = &__nvoc_thunk_ChannelDescendant_nvdecctxGetSwMethods;
|
|
|
|
pThis->__nvdecctxGetInternalObjectHandle__ = &__nvoc_thunk_GpuResource_nvdecctxGetInternalObjectHandle;
|
|
|
|
pThis->__nvdecctxControl__ = &__nvoc_thunk_GpuResource_nvdecctxControl;
|
|
|
|
pThis->__nvdecctxUnmap__ = &__nvoc_thunk_GpuResource_nvdecctxUnmap;
|
|
|
|
pThis->__nvdecctxGetMemInterMapParams__ = &__nvoc_thunk_RmResource_nvdecctxGetMemInterMapParams;
|
|
|
|
pThis->__nvdecctxGetMemoryMappingDescriptor__ = &__nvoc_thunk_RmResource_nvdecctxGetMemoryMappingDescriptor;
|
|
|
|
pThis->__nvdecctxIsSwMethodStalling__ = &__nvoc_thunk_ChannelDescendant_nvdecctxIsSwMethodStalling;
|
|
|
|
pThis->__nvdecctxControlFilter__ = &__nvoc_thunk_RsResource_nvdecctxControlFilter;
|
|
|
|
pThis->__nvdecctxUnregisterEvent__ = &__nvoc_thunk_Notifier_nvdecctxUnregisterEvent;
|
|
|
|
pThis->__nvdecctxControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_nvdecctxControlSerialization_Prologue;
|
|
|
|
pThis->__nvdecctxCanCopy__ = &__nvoc_thunk_RsResource_nvdecctxCanCopy;
|
|
|
|
pThis->__nvdecctxPreDestruct__ = &__nvoc_thunk_RsResource_nvdecctxPreDestruct;
|
|
|
|
pThis->__nvdecctxIsDuplicate__ = &__nvoc_thunk_RsResource_nvdecctxIsDuplicate;
|
|
|
|
pThis->__nvdecctxControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_nvdecctxControlSerialization_Epilogue;
|
|
|
|
pThis->__nvdecctxGetNotificationListPtr__ = &__nvoc_thunk_Notifier_nvdecctxGetNotificationListPtr;
|
|
|
|
pThis->__nvdecctxGetNotificationShare__ = &__nvoc_thunk_Notifier_nvdecctxGetNotificationShare;
|
|
|
|
pThis->__nvdecctxMap__ = &__nvoc_thunk_GpuResource_nvdecctxMap;
|
|
|
|
pThis->__nvdecctxGetOrAllocNotifShare__ = &__nvoc_thunk_Notifier_nvdecctxGetOrAllocNotifShare;
|
|
}
|
|
|
|
void __nvoc_init_funcTable_NvdecContext(NvdecContext *pThis, RmHalspecOwner *pRmhalspecowner) {
|
|
__nvoc_init_funcTable_NvdecContext_1(pThis, pRmhalspecowner);
|
|
}
|
|
|
|
void __nvoc_init_ChannelDescendant(ChannelDescendant*, RmHalspecOwner* );
|
|
void __nvoc_init_NvdecContext(NvdecContext *pThis, RmHalspecOwner *pRmhalspecowner) {
|
|
pThis->__nvoc_pbase_NvdecContext = pThis;
|
|
pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object;
|
|
pThis->__nvoc_pbase_RsResource = &pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource;
|
|
pThis->__nvoc_pbase_RmResourceCommon = &pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon;
|
|
pThis->__nvoc_pbase_RmResource = &pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource;
|
|
pThis->__nvoc_pbase_GpuResource = &pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource;
|
|
pThis->__nvoc_pbase_INotifier = &pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier.__nvoc_base_INotifier;
|
|
pThis->__nvoc_pbase_Notifier = &pThis->__nvoc_base_ChannelDescendant.__nvoc_base_Notifier;
|
|
pThis->__nvoc_pbase_ChannelDescendant = &pThis->__nvoc_base_ChannelDescendant;
|
|
__nvoc_init_ChannelDescendant(&pThis->__nvoc_base_ChannelDescendant, pRmhalspecowner);
|
|
__nvoc_init_funcTable_NvdecContext(pThis, pRmhalspecowner);
|
|
}
|
|
|
|
NV_STATUS __nvoc_objCreate_NvdecContext(NvdecContext **ppThis, Dynamic *pParent, NvU32 createFlags, struct CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) {
|
|
NV_STATUS status;
|
|
Object *pParentObj;
|
|
NvdecContext *pThis;
|
|
RmHalspecOwner *pRmhalspecowner;
|
|
|
|
status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(NvdecContext), (void**)&pThis, (void**)ppThis);
|
|
if (status != NV_OK)
|
|
return status;
|
|
|
|
portMemSet(pThis, 0, sizeof(NvdecContext));
|
|
|
|
__nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_NvdecContext);
|
|
|
|
pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.createFlags = createFlags;
|
|
|
|
if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
|
|
{
|
|
pParentObj = dynamicCast(pParent, Object);
|
|
objAddChild(pParentObj, &pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object);
|
|
}
|
|
else
|
|
{
|
|
pThis->__nvoc_base_ChannelDescendant.__nvoc_base_GpuResource.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.pParent = NULL;
|
|
}
|
|
|
|
if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL)
|
|
pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent);
|
|
NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT);
|
|
|
|
__nvoc_init_NvdecContext(pThis, pRmhalspecowner);
|
|
status = __nvoc_ctor_NvdecContext(pThis, pRmhalspecowner, arg_pCallContext, arg_pParams);
|
|
if (status != NV_OK) goto __nvoc_objCreate_NvdecContext_cleanup;
|
|
|
|
*ppThis = pThis;
|
|
|
|
return NV_OK;
|
|
|
|
__nvoc_objCreate_NvdecContext_cleanup:
|
|
// do not call destructors here since the constructor already called them
|
|
if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
|
|
portMemSet(pThis, 0, sizeof(NvdecContext));
|
|
else
|
|
portMemFree(pThis);
|
|
|
|
// coverity[leaked_storage:FALSE]
|
|
return status;
|
|
}
|
|
|
|
NV_STATUS __nvoc_objCreateDynamic_NvdecContext(NvdecContext **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
|
|
NV_STATUS status;
|
|
struct CALL_CONTEXT * arg_pCallContext = va_arg(args, struct CALL_CONTEXT *);
|
|
struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams = va_arg(args, struct RS_RES_ALLOC_PARAMS_INTERNAL *);
|
|
|
|
status = __nvoc_objCreate_NvdecContext(ppThis, pParent, createFlags, arg_pCallContext, arg_pParams);
|
|
|
|
return status;
|
|
}
|
|
|