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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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81 lines
3.9 KiB
C
81 lines
3.9 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the Software),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _MINION_LS10_H_
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#define _MINION_LS10_H_
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#include "ls10.h"
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#include "nvlink_inband_drv_header.h"
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#define FALCON_IMEM_BLK_SIZE_BYTES_LS10 256
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#define FALCON_CODE_HDR_OS_CODE_OFFSET_LS10 0
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#define FALCON_CODE_HDR_OS_CODE_SIZE_LS10 1
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#define FALCON_CODE_HDR_OS_DATA_OFFSET_LS10 2
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#define FALCON_CODE_HDR_OS_DATA_SIZE_LS10 3
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#define FALCON_CODE_HDR_NUM_APPS_LS10 4
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#define FALCON_CODE_HDR_APP_CODE_START_LS10 5
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#define FALCON_CODE_HDR_APP_DATA_START_LS10 ( FALCON_CODE_HDR_APP_CODE_START_LS10 + (FALCON_CODE_HDR_NUM_APPS_LS10 * 2))
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#define FALCON_CODE_HDR_CODE_OFFSET_LS10 0
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#define FALCON_CODE_HDR_CODE_SIZE_LS10 1
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#define FALCON_CODE_HDR_DATA_OFFSET_LS10 0
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#define FALCON_CODE_HDR_DATA_SIZE_LS10 1
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#define NV_MINION_NVLINK_DL_STAT_ARGS_LANEID 15:12
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#define NV_MINION_NVLINK_DL_STAT_ARGS_ADDRS 11:0
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//
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// Inband data structure
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//
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typedef struct inband_send_data
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{
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// Inband buffer at sender Minion
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NvU8 *sendBuffer;
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// Number of bytes of data to be sent
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NvU32 bufferSize;
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// Header
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nvlink_inband_drv_hdr_t hdr;
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} nvswitch_inband_send_data;
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//
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// Internal function declarations
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//
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NvlStatus nvswitch_minion_get_dl_status_ls10(nvswitch_device *device, NvU32 linkId, NvU32 statusIdx, NvU32 statusArgs, NvU32 *statusData);
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NvlStatus nvswitch_set_minion_initialized_ls10(nvswitch_device *device, NvU32 idx_minion, NvBool initialized);
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NvBool nvswitch_is_minion_initialized_ls10(nvswitch_device *device, NvU32 idx_minion);
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NvlStatus nvswitch_init_minion_ls10(nvswitch_device *device);
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NvlStatus nvswitch_minion_send_command_ls10(nvswitch_device *device, NvU32 linkNumber, NvU32 command, NvU32 scratch0);
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NvlStatus nvswitch_minion_riscv_get_physical_address_ls10(nvswitch_device *device,NvU32 idx_minion, NvU32 target, NvLength offset, NvU64 *pRiscvPa);
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NvlStatus nvswitch_minion_set_sim_mode_ls10(nvswitch_device *device, nvlink_link *link);
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NvlStatus nvswitch_minion_set_smf_settings_ls10(nvswitch_device *device, nvlink_link *link);
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NvlStatus nvswitch_minion_select_uphy_tables_ls10(nvswitch_device *device, nvlink_link *link);
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NvBool nvswitch_minion_is_riscv_active_ls10(nvswitch_device *device, NvU32 idx_minion);
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NvlStatus nvswitch_minion_clear_dl_error_counters_ls10(nvswitch_device *device, NvU32 linkId);
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NvlStatus nvswitch_minion_send_inband_data_ls10(nvswitch_device *device, NvU32 linkId, nvswitch_inband_send_data *inBandData);
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void nvswitch_minion_receive_inband_data_ls10(nvswitch_device *device, NvU32 linkId);
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NvlStatus nvswitch_minion_log_ali_debug_registers_ls10(nvswitch_device *device, nvlink_link *link);
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#endif //_MINION_LS10_H_
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