mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-05 23:59:59 +00:00
2320 lines
80 KiB
C
2320 lines
80 KiB
C
// This file is automatically generated by rmconfig - DO NOT EDIT!
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//
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// HAL stubs, generated by rmconfig.
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//
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// Profile: shipping-gpus-openrm
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// Template: templates/gt_hal_stubs.h
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//
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// Chips: TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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//
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#ifndef _G_RMCFG_HAL_STUBS_H_
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#define _G_RMCFG_HAL_STUBS_H_
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// pull in private headers for each engine
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#include "g_rpc_private.h"
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#include "g_rpcstructurecopy_private.h"
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#include "g_hal.h"
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// HACK: a global var unique to the ipVersions _UNASSIGNED routines to ensure this function
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// is not aliased by link-time-optimizations with a _STUB fn that might actually
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// be assigned to a hal method as that would break the <ENG>_HAL_VERIFY_INTERFACE
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// test.
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NV_STATUS iGrp_ipVersions_UNIQUIFIER;
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// the "_UNASSIGNED" function for all IP_VERSIONS dynamic interfaces
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NV_STATUS iGrp_ipVersions_UNASSIGNED(void)
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{
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NV_ASSERT_PRECOMP(0 && "iGrp_ipVersions_UNASSIGNED");
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return NV_ERR_NOT_SUPPORTED +
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iGrp_ipVersions_UNIQUIFIER; // will be 0
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}
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//
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// generated _STUB functions
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//
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// DISP:hal:IGRP_IP_VERSIONS_GET_INFO - DISP disabled
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NV_STATUS disp_iGrp_ipVersions_getInfo_STUB(
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IGRP_IP_VERSIONS_TABLE_INFO *pArg1
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)
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{
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return NV_ERR_NOT_SUPPORTED;
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}
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// DPU:hal:IGRP_IP_VERSIONS_GET_INFO - DPU disabled
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NV_STATUS dpu_iGrp_ipVersions_getInfo_STUB(
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IGRP_IP_VERSIONS_TABLE_INFO *pArg1
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)
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{
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return NV_ERR_NOT_SUPPORTED;
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}
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// RPC:hal:CTRL_FIFO_SETUP_VF_ZOMBIE_SUBCTX_PDB - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlFifoSetupVfZombieSubctxPdb_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:VGPU_PF_REG_READ32 - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcVgpuPfRegRead32_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvU64 arg3,
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NvU32 *pArg4,
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NvU32 arg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_BUS_UNSET_P2P_MAPPING - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlBusUnsetP2pMapping_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:DUMP_PROTOBUF_COMPONENT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcDumpProtobufComponent_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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PRB_ENCODER *pPrbEnc,
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NVD_STATE *pNvDumpState,
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NVDUMP_COMPONENT component
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:ECC_NOTIFIER_WRITE_ACK - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcEccNotifierWriteAck_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:ALLOC_MEMORY - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcAllocMemory_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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NvHandle arg5,
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NvU32 arg6,
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NvU32 arg7,
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MEMORY_DESCRIPTOR *pArg8
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_DBG_READ_SINGLE_SM_ERROR_STATE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlDbgReadSingleSmErrorState_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:DISABLE_CHANNELS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcDisableChannels_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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void *pArg3
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:GPU_EXEC_REG_OPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcGpuExecRegOps_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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NV2080_CTRL_GPU_EXEC_REG_OPS_PARAMS *pArg5,
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NV2080_CTRL_GPU_REG_OP *pArg6
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_GPU_PROMOTE_CTX - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlGpuPromoteCtx_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_DBG_SET_NEXT_STOP_TRIGGER_TYPE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlDbgSetNextStopTriggerType_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:ALLOC_SHARE_DEVICE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcAllocShareDevice_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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NvHandle arg5,
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NvHandle arg6,
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NvHandle arg7,
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NvU32 arg8,
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NvU32 arg9,
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NvU64 arg10,
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NvU32 arg11
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_PREEMPT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlPreempt_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_GPU_INITIALIZE_CTX - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlGpuInitializeCtx_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_RESERVE_PM_AREA_SMPC - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlReservePmAreaSmpc_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_GPU_MIGRATABLE_OPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlGpuMigratableOps_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_DBG_SET_MODE_ERRBAR_DEBUG - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlDbgSetModeErrbarDebug_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_PMA_STREAM_UPDATE_GET_PUT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlPmaStreamUpdateGetPut_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_FABRIC_MEMORY_DESCRIBE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlFabricMemoryDescribe_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:ALLOC_CHANNEL_DMA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcAllocChannelDma_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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NvHandle arg5,
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NvU32 arg6,
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NV_CHANNEL_ALLOC_PARAMS *pArg7,
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NvU32 *pArg8
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_SET_ZBC_DEPTH_CLEAR - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlSetZbcDepthClear_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_RESET_ISOLATED_CHANNEL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlResetIsolatedChannel_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_DMA_SET_DEFAULT_VASPACE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlDmaSetDefaultVaspace_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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void *pArg5
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:ALLOC_SUBDEVICE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcAllocSubdevice_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
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NvHandle arg5,
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NvU32 arg6,
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NvU32 arg7
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)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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// RPC:hal:CTRL_EXEC_PARTITIONS_EXPORT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcCtrlExecPartitionsExport_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
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NvHandle arg3,
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NvHandle arg4,
|
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void *pArg5
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|
)
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
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}
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|
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|
// RPC:hal:FREE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcFree_STUB(
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POBJGPU pGpu,
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POBJRPC pRpc,
|
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NvHandle arg3,
|
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NvHandle arg4,
|
|
NvHandle arg5
|
|
)
|
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
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|
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// RPC:hal:DMA_CONTROL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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NV_STATUS rpcDmaControl_STUB(
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POBJGPU pGpu,
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|
POBJRPC pRpc,
|
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NvHandle arg3,
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NvHandle arg4,
|
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NvU32 arg5,
|
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void *pArg6,
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NvU32 arg7
|
|
)
|
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{
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return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_CLEAR_SINGLE_SM_ERROR_STATE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
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NV_STATUS rpcCtrlDbgClearSingleSmErrorState_STUB(
|
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POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:UNSET_PAGE_DIRECTORY - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
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|
NV_STATUS rpcUnsetPageDirectory_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NV0080_CTRL_DMA_UNSET_PAGE_DIRECTORY_PARAMS *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_RESERVE_CCU_PROF - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlReserveCcuProf_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:GET_GSP_STATIC_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcGetGspStaticInfo_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:SAVE_HIBERNATION_DATA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcSaveHibernationData_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:DUP_OBJECT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcDupObject_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvHandle arg5,
|
|
NvHandle arg6,
|
|
NvHandle arg7,
|
|
NvU32 arg8
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:GSP_SET_SYSTEM_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcGspSetSystemInfo_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_PM_AREA_PC_SAMPLER - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlPmAreaPcSampler_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvU32 arg5,
|
|
void *pArg6
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SUBDEVICE_GET_LIBOS_HEAP_STATS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSubdeviceGetLibosHeapStats_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
void *pArg3
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_SET_EXCEPTION_MASK - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgSetExceptionMask_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SET_ZBC_STENCIL_CLEAR - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSetZbcStencilClear_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_VASPACE_COPY_SERVER_RESERVED_PDES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlVaspaceCopyServerReservedPdes_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_CMD_GET_CHIPLET_HS_CREDIT_POOL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlCmdGetChipletHsCreditPool_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GR_CTXSW_PREEMPTION_BIND - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGrCtxswPreemptionBind_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_ALLOC_PMA_STREAM - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlAllocPmaStream_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_CMD_GET_HS_CREDITS_MAPPING - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlCmdGetHsCreditsMapping_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_RELEASE_HES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlReleaseHes_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_RESERVE_HWPM_LEGACY - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlReserveHwpmLegacy_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_PERF_RATED_TDP_GET_STATUS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlPerfRatedTdpGetStatus_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_INTERNAL_QUIESCE_PMA_CHANNEL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlInternalQuiescePmaChannel_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SUBDEVICE_GET_VGPU_HEAP_STATS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSubdeviceGetVgpuHeapStats_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
void *pArg3
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_BUS_SET_P2P_MAPPING - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlBusSetP2pMapping_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GPU_GET_INFO_V2 - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGpuGetInfoV2_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_HS_CREDITS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetHsCredits_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GR_SET_CTXSW_PREEMPTION_MODE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGrSetCtxswPreemptionMode_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_B0CC_EXEC_REG_OPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlB0ccExecRegOps_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GRMGR_GET_GR_FS_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGrmgrGetGrFsInfo_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_ZBC_CLEAR_TABLE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetZbcClearTable_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CLEANUP_SURFACE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCleanupSurface_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NVA080_CTRL_VGPU_DISPLAY_CLEANUP_SURFACE_PARAMS *pArg4
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SET_TIMESLICE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSetTimeslice_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GPU_QUERY_ECC_STATUS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGpuQueryEccStatus_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_GET_MODE_MMU_DEBUG - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgGetModeMmuDebug_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_CLEAR_ALL_SM_ERROR_STATES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgClearAllSmErrorStates_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:VGPU_GSP_RING_DOORBELL - TU10X, GA100
|
|
NV_STATUS rpcVgpuGspRingDoorbell_STUB(
|
|
POBJGPU pGpu,
|
|
NvU32 arg2
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GR_SET_TPC_PARTITION_MODE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGrSetTpcPartitionMode_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_TOTAL_HS_CREDITS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetTotalHsCredits_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_INTERNAL_PROMOTE_FAULT_METHOD_BUFFERS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlInternalPromoteFaultMethodBuffers_STUB(
|
|
OBJGPU *pArg1,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_FB_GET_INFO_V2 - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlFbGetInfoV2_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:VGPU_GSP_WRITE_SCRATCH_REGISTER - TU10X, GA100
|
|
NV_STATUS rpcVgpuGspWriteScratchRegister_STUB(
|
|
POBJGPU pGpu,
|
|
NvU64 arg2
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:SET_PAGE_DIRECTORY - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcSetPageDirectory_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NV0080_CTRL_DMA_SET_PAGE_DIRECTORY_PARAMS *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_P2P_CAPS_V2 - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetP2pCapsV2_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
void *pArg3
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_NVLINK_GET_INBAND_RECEIVED_DATA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlNvlinkGetInbandReceivedData_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS *pArg3,
|
|
NvU16 arg4,
|
|
NvBool *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_CE_PCE_MASK - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetCePceMask_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GPU_EVICT_CTX - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGpuEvictCtx_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_MMU_DEBUG_MODE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetMmuDebugMode_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:INVALIDATE_TLB - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcInvalidateTlb_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvU64 arg3,
|
|
NvU32 arg4
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_SET_SINGLE_SM_SINGLE_STEP - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgSetSingleSmSingleStep_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:UNLOADING_GUEST_DRIVER - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcUnloadingGuestDriver_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvBool arg3,
|
|
NvBool arg4,
|
|
NvU32 arg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:GET_CONSOLIDATED_GR_STATIC_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcGetConsolidatedGrStaticInfo_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:SWITCH_TO_VGA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcSwitchToVga_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_RESET_CHANNEL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlResetChannel_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GPFIFO_SCHEDULE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGpfifoSchedule_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvU32 arg5,
|
|
void *pArg6
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:SET_REGISTRY - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcSetRegistry_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_SET_MODE_MMU_GCC_DEBUG - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgSetModeMmuGccDebug_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_NVLINK_STATUS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetNvlinkStatus_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:GET_STATIC_DATA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcGetStaticData_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GR_GET_TPC_PARTITION_MODE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGrGetTpcPartitionMode_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_STOP_CHANNEL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlStopChannel_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlCmdInternalControlGspTrace_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NV2080_CTRL_CMD_INTERNAL_CONTROL_GSP_TRACE_PARAMS *pArg3
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:SET_SURFACE_PROPERTIES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcSetSurfaceProperties_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NVA080_CTRL_VGPU_DISPLAY_SET_SURFACE_PROPERTIES *pArg4,
|
|
NvBool arg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_RELEASE_CCU_PROF - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlReleaseCcuProf_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_TIMER_SET_GR_TICK_FREQ - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlTimerSetGrTickFreq_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGpfifoSetWorkSubmitTokenNotifIndex_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:ALLOC_EVENT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcAllocEvent_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvHandle arg5,
|
|
NvHandle arg6,
|
|
NvHandle arg7,
|
|
NvU32 arg8,
|
|
NvU32 arg9
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GR_PC_SAMPLING_MODE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGrPcSamplingMode_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_MC_SERVICE_INTERRUPTS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlMcServiceInterrupts_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_READ_ALL_SM_ERROR_STATES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgReadAllSmErrorStates_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SET_ZBC_COLOR_CLEAR - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSetZbcColorClear_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:GET_ENCODER_CAPACITY - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcGetEncoderCapacity_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvU32 *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_P2P_CAPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetP2pCaps_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:PERF_GET_LEVEL_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcPerfGetLevelInfo_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NV2080_CTRL_PERF_GET_LEVEL_INFO_PARAMS *pArg5,
|
|
NV2080_CTRL_PERF_GET_CLK_INFO *pArg6
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:ALLOC_OBJECT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcAllocObject_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvHandle arg5,
|
|
NvU32 arg6,
|
|
void *pArg7
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GPU_HANDLE_VF_PRI_FAULT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGpuHandleVfPriFault_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:RM_API_CONTROL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcRmApiControl_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvU32 arg5,
|
|
void *pArg6,
|
|
NvU32 arg7
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_FABRIC_MEM_STATS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlFabricMemStats_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_CMD_NVLINK_INBAND_SEND_DATA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlCmdNvlinkInbandSendData_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS *pArg3
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GR_CTXSW_ZCULL_BIND - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGrCtxswZcullBind_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_INTERNAL_MEMSYS_SET_ZBC_REFERENCED - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlInternalMemsysSetZbcReferenced_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_PERF_RATED_TDP_SET_CONTROL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlPerfRatedTdpSetControl_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_EXEC_PARTITIONS_CREATE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlExecPartitionsCreate_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GPFIFO_GET_WORK_SUBMIT_TOKEN - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGpfifoGetWorkSubmitToken_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:IDLE_CHANNELS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcIdleChannels_STUB(
|
|
OBJGPU *pArg1,
|
|
POBJRPC pRpc,
|
|
NvHandle *phclients,
|
|
NvHandle *phdevices,
|
|
NvHandle *phchannels,
|
|
NvU32 nentries,
|
|
NvU32 flags,
|
|
NvU32 timeout
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_CMD_INTERNAL_GPU_START_FABRIC_PROBE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlCmdInternalGpuStartFabricProbe_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NV2080_CTRL_CMD_INTERNAL_START_GPU_FABRIC_PROBE_INFO_PARAMS *pArg3
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:GET_BRAND_CAPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcGetBrandCaps_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvU32 arg5,
|
|
void *pArg6,
|
|
NvU32 arg7
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:RESTORE_HIBERNATION_DATA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcRestoreHibernationData_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlFlaSetupInstanceMemBlock_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_INTERNAL_SRIOV_PROMOTE_PMA_STREAM - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlInternalSriovPromotePmaStream_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_FB_GET_FS_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlFbGetFsInfo_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SET_CHANNEL_INTERLEAVE_LEVEL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSetChannelInterleaveLevel_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_RESUME_CONTEXT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgResumeContext_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:ALLOC_ROOT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcAllocRoot_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_FIFO_DISABLE_CHANNELS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlFifoDisableChannels_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SET_HS_CREDITS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSetHsCredits_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:GET_ENGINE_UTILIZATION - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcGetEngineUtilization_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvU32 arg5,
|
|
void *pArg6,
|
|
NvU32 arg7
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_ZBC_CLEAR_TABLE_ENTRY - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetZbcClearTableEntry_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_NVENC_SW_SESSION_UPDATE_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlNvencSwSessionUpdateInfo_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_SUSPEND_CONTEXT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgSuspendContext_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_GET_P2P_CAPS_MATRIX - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlGetP2pCapsMatrix_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_EXEC_REG_OPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgExecRegOps_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_FREE_PMA_STREAM - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlFreePmaStream_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SET_TSG_INTERLEAVE_LEVEL - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSetTsgInterleaveLevel_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlMasterGetVirtualFunctionErrorContIntrMask_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_RESERVE_HES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlReserveHes_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:LOG - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcLog_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
const char *pArg3,
|
|
NvU32 arg4
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_GET_MODE_MMU_GCC_DEBUG - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgGetModeMmuGccDebug_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_EXEC_PARTITIONS_DELETE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlExecPartitionsDelete_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_PERF_BOOST - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlPerfBoost_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_DBG_SET_MODE_MMU_DEBUG - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlDbgSetModeMmuDebug_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_FIFO_SET_CHANNEL_PROPERTIES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlFifoSetChannelProperties_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SUBDEVICE_GET_P2P_CAPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSubdeviceGetP2pCaps_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
void *pArg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:UPDATE_BAR_PDE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcUpdateBarPde_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NV_RPC_UPDATE_PDE_BAR_TYPE arg3,
|
|
NvU64 arg4,
|
|
NvU64 arg5
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_BIND_PM_RESOURCES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlBindPmResources_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:MAP_MEMORY_DMA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcMapMemoryDma_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvHandle arg5,
|
|
NvHandle arg6,
|
|
NvU64 arg7,
|
|
NvU64 arg8,
|
|
NvU32 arg9,
|
|
NvU64 *pArg10
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:UPDATE_GPM_GUEST_BUFFER_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcUpdateGpmGuestBufferInfo_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvU64 arg3,
|
|
NvU32 arg4,
|
|
NvU32 arg5,
|
|
NvU32 arg6,
|
|
NvBool arg7
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:CTRL_SET_VGPU_FB_USAGE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcCtrlSetVgpuFbUsage_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
void *pArg3
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:UNMAP_MEMORY_DMA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcUnmapMemoryDma_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc,
|
|
NvHandle arg3,
|
|
NvHandle arg4,
|
|
NvHandle arg5,
|
|
NvHandle arg6,
|
|
NvU32 arg7,
|
|
NvU64 arg8
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPC:hal:SET_GUEST_SYSTEM_INFO_EXT - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS rpcSetGuestSystemInfoExt_STUB(
|
|
POBJGPU pGpu,
|
|
POBJRPC pRpc
|
|
)
|
|
{
|
|
return NV_VGPU_MSG_RESULT_RPC_UNKNOWN_FUNCTION;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_MEMSYS_GET_STATIC_CONFIG_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS_STUB(
|
|
NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_P2P_CAPABILITY_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_P2P_CAPABILITY_PARAMS_STUB(
|
|
VGPU_P2P_CAPABILITY_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NVA080_CTRL_VGPU_GET_CONFIG_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NVA080_CTRL_VGPU_GET_CONFIG_PARAMS_STUB(
|
|
NVA080_CTRL_VGPU_GET_CONFIG_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS_STUB(
|
|
NV2080_CTRL_FB_GET_LTC_INFO_FOR_FBP_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_GLOBAL_SM_ORDER_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_GET_DEVICE_INFO_TABLE_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_GPU_GET_GID_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_GPU_GET_GID_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_GPU_GET_GID_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS_STUB(
|
|
NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_CCU_SAMPLE_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS_STUB(
|
|
NVC637_CTRL_EXEC_PARTITIONS_GET_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_FB_GET_DYNAMIC_BLACKLISTED_PAGES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_FB_GET_DYNAMIC_BLACKLISTED_PAGES_STUB(
|
|
VGPU_FB_GET_DYNAMIC_BLACKLISTED_PAGES *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_FB_GET_LTC_INFO_FOR_FBP - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_FB_GET_LTC_INFO_FOR_FBP_STUB(
|
|
VGPU_FB_GET_LTC_INFO_FOR_FBP *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_STATIC_DATA - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_STATIC_DATA_STUB(
|
|
VGPU_STATIC_DATA *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_PDB_PROPERTIES_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS_STUB(
|
|
NV2080_CTRL_CMD_BUS_GET_PCIE_REQ_ATOMICS_CAPS_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_TRACE_DEFINES_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_PPC_MASKS_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS_STUB(
|
|
NV0000_CTRL_SYSTEM_GET_VGX_SYSTEM_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_FLOORSWEEPING_MASKS_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_ZCULL_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_FIFO_GET_DEVICE_INFO_TABLE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_FIFO_GET_DEVICE_INFO_TABLE_STUB(
|
|
VGPU_FIFO_GET_DEVICE_INFO_TABLE *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS_STUB(
|
|
NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:GPU_EXEC_SYSPIPE_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_GPU_EXEC_SYSPIPE_INFO_STUB(
|
|
GPU_EXEC_SYSPIPE_INFO *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_BSP_GET_CAPS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_BSP_GET_CAPS_STUB(
|
|
VGPU_BSP_GET_CAPS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS_STUB(
|
|
NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:GPU_PARTITION_INFO - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_GPU_PARTITION_INFO_STUB(
|
|
GPU_PARTITION_INFO *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS_STUB(
|
|
NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS_STUB(
|
|
NV2080_CTRL_MC_GET_ENGINE_NOTIFICATION_INTR_VECTORS_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_ROP_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS_STUB(
|
|
NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_FECS_RECORD_SIZE_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS_STUB(
|
|
NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_STATIC_PROPERTIES - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_STATIC_PROPERTIES_STUB(
|
|
VGPU_STATIC_PROPERTIES *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_BUS_GET_INFO_V2_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_BUS_GET_INFO_V2_PARAMS_STUB(
|
|
NV2080_CTRL_BUS_GET_INFO_V2_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_GPU_GET_CONSTRUCTED_FALCON_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS_STUB(
|
|
NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_FLA_GET_RANGE_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_FLA_GET_RANGE_PARAMS_STUB(
|
|
NV2080_CTRL_FLA_GET_RANGE_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS_STUB(
|
|
NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_STUB(
|
|
NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_CE_GET_CAPS_V2 - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_CE_GET_CAPS_V2_STUB(
|
|
VGPU_CE_GET_CAPS_V2 *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:VGPU_GET_LATENCY_BUFFER_SIZE - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
|
NV_STATUS deserialize_VGPU_GET_LATENCY_BUFFER_SIZE_STUB(
|
|
VGPU_GET_LATENCY_BUFFER_SIZE *data,
|
|
NvU8 *stream,
|
|
NvU32 streamSize,
|
|
NvU32 *offset
|
|
)
|
|
{
|
|
return NV_OK;
|
|
}
|
|
|
|
// RPCSTRUCTURECOPY:hal:NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS - TU10X, GA100, GA102, GA103, GA104, GA106, GA107, AD102, AD103, AD104, AD106, AD107, GH10X, GB100, GB102, GB10B, GB202, GB203, GB205, GB206, GB207
|
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NV_STATUS deserialize_NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS_STUB(
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NV0080_CTRL_MSENC_GET_CAPS_V2_PARAMS *data,
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NvU8 *stream,
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NvU32 streamSize,
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NvU32 *offset
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)
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{
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return NV_OK;
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}
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#endif // _G_RMCFG_HAL_STUBS_H_
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