mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-23 16:34:00 +00:00
946 lines
44 KiB
C
946 lines
44 KiB
C
#define NVOC_KERNEL_GSP_H_PRIVATE_ACCESS_ALLOWED
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#include "nvoc/runtime.h"
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#include "nvoc/rtti.h"
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#include "nvtypes.h"
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#include "nvport/nvport.h"
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#include "nvport/inline/util_valist.h"
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#include "utils/nvassert.h"
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#include "g_kernel_gsp_nvoc.h"
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#ifdef DEBUG
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char __nvoc_class_id_uniqueness_check_0x311d4e = 1;
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#endif
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGsp;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_IntrService;
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon;
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void __nvoc_init_KernelGsp(KernelGsp*, RmHalspecOwner* );
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void __nvoc_init_funcTable_KernelGsp(KernelGsp*, RmHalspecOwner* );
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NV_STATUS __nvoc_ctor_KernelGsp(KernelGsp*, RmHalspecOwner* );
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void __nvoc_init_dataField_KernelGsp(KernelGsp*, RmHalspecOwner* );
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void __nvoc_dtor_KernelGsp(KernelGsp*);
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extern const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGsp;
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static const struct NVOC_RTTI __nvoc_rtti_KernelGsp_KernelGsp = {
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/*pClassDef=*/ &__nvoc_class_def_KernelGsp,
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/*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_KernelGsp,
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/*offset=*/ 0,
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};
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static const struct NVOC_RTTI __nvoc_rtti_KernelGsp_Object = {
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/*pClassDef=*/ &__nvoc_class_def_Object,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(KernelGsp, __nvoc_base_OBJENGSTATE.__nvoc_base_Object),
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};
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static const struct NVOC_RTTI __nvoc_rtti_KernelGsp_OBJENGSTATE = {
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/*pClassDef=*/ &__nvoc_class_def_OBJENGSTATE,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(KernelGsp, __nvoc_base_OBJENGSTATE),
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};
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static const struct NVOC_RTTI __nvoc_rtti_KernelGsp_IntrService = {
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/*pClassDef=*/ &__nvoc_class_def_IntrService,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(KernelGsp, __nvoc_base_IntrService),
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};
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static const struct NVOC_RTTI __nvoc_rtti_KernelGsp_KernelFalcon = {
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/*pClassDef=*/ &__nvoc_class_def_KernelFalcon,
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/*dtor=*/ &__nvoc_destructFromBase,
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/*offset=*/ NV_OFFSETOF(KernelGsp, __nvoc_base_KernelFalcon),
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};
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static const struct NVOC_CASTINFO __nvoc_castinfo_KernelGsp = {
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/*numRelatives=*/ 5,
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/*relatives=*/ {
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&__nvoc_rtti_KernelGsp_KernelGsp,
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&__nvoc_rtti_KernelGsp_KernelFalcon,
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&__nvoc_rtti_KernelGsp_IntrService,
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&__nvoc_rtti_KernelGsp_OBJENGSTATE,
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&__nvoc_rtti_KernelGsp_Object,
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},
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};
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const struct NVOC_CLASS_DEF __nvoc_class_def_KernelGsp =
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{
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/*classInfo=*/ {
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/*size=*/ sizeof(KernelGsp),
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/*classId=*/ classId(KernelGsp),
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/*providerId=*/ &__nvoc_rtti_provider,
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#if NV_PRINTF_STRINGS_ALLOWED
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/*name=*/ "KernelGsp",
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#endif
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},
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/*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_KernelGsp,
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/*pCastInfo=*/ &__nvoc_castinfo_KernelGsp,
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/*pExportInfo=*/ &__nvoc_export_info_KernelGsp
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};
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static NV_STATUS __nvoc_thunk_KernelGsp_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelGsp, ENGDESCRIPTOR arg0) {
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return kgspConstructEngine(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0);
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}
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static void __nvoc_thunk_KernelGsp_intrservRegisterIntrService(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceRecord pRecords[155]) {
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kgspRegisterIntrService(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_IntrService.offset), pRecords);
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}
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static NvU32 __nvoc_thunk_KernelGsp_intrservServiceInterrupt(struct OBJGPU *pGpu, struct IntrService *pKernelGsp, IntrServiceServiceInterruptArguments *pParams) {
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return kgspServiceInterrupt(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_IntrService.offset), pParams);
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}
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static NV_STATUS __nvoc_thunk_KernelGsp_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pKernelGsp) {
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return kgspResetHw(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_KernelFalcon.offset));
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}
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static NvBool __nvoc_thunk_KernelGsp_kflcnIsEngineInReset(struct OBJGPU *pGpu, struct KernelFalcon *pKernelGsp) {
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return kgspIsEngineInReset(pGpu, (struct KernelGsp *)(((unsigned char *)pKernelGsp) - __nvoc_rtti_KernelGsp_KernelFalcon.offset));
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}
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static void __nvoc_thunk_OBJENGSTATE_kgspStateDestroy(POBJGPU pGpu, struct KernelGsp *pEngstate) {
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engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset));
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}
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static void __nvoc_thunk_OBJENGSTATE_kgspFreeTunableState(POBJGPU pGpu, struct KernelGsp *pEngstate, void *pTunableState) {
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engstateFreeTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), pTunableState);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspCompareTunableState(POBJGPU pGpu, struct KernelGsp *pEngstate, void *pTunables1, void *pTunables2) {
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return engstateCompareTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), pTunables1, pTunables2);
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}
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static NvBool __nvoc_thunk_IntrService_kgspClearInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceClearInterruptArguments *pParams) {
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return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelGsp_IntrService.offset), pParams);
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}
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static NvBool __nvoc_thunk_OBJENGSTATE_kgspIsPresent(POBJGPU pGpu, struct KernelGsp *pEngstate) {
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return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset));
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspReconcileTunableState(POBJGPU pGpu, struct KernelGsp *pEngstate, void *pTunableState) {
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return engstateReconcileTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), pTunableState);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStateLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) {
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return engstateStateLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStateUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) {
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return engstateStateUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0);
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}
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static NV_STATUS __nvoc_thunk_IntrService_kgspServiceNotificationInterrupt(struct OBJGPU *pGpu, struct KernelGsp *pIntrService, IntrServiceServiceNotificationInterruptArguments *pParams) {
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return intrservServiceNotificationInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelGsp_IntrService.offset), pParams);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStateInitLocked(POBJGPU pGpu, struct KernelGsp *pEngstate) {
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return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset));
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePreLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) {
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return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePostUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) {
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return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePreUnload(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) {
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return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspGetTunableState(POBJGPU pGpu, struct KernelGsp *pEngstate, void *pTunableState) {
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return engstateGetTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), pTunableState);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStateInitUnlocked(POBJGPU pGpu, struct KernelGsp *pEngstate) {
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return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset));
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}
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static void __nvoc_thunk_OBJENGSTATE_kgspInitMissing(POBJGPU pGpu, struct KernelGsp *pEngstate) {
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engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset));
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePreInitLocked(POBJGPU pGpu, struct KernelGsp *pEngstate) {
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return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset));
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePreInitUnlocked(POBJGPU pGpu, struct KernelGsp *pEngstate) {
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return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset));
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspStatePostLoad(POBJGPU pGpu, struct KernelGsp *pEngstate, NvU32 arg0) {
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return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), arg0);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspAllocTunableState(POBJGPU pGpu, struct KernelGsp *pEngstate, void **ppTunableState) {
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return engstateAllocTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), ppTunableState);
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}
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static NV_STATUS __nvoc_thunk_OBJENGSTATE_kgspSetTunableState(POBJGPU pGpu, struct KernelGsp *pEngstate, void *pTunableState) {
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return engstateSetTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelGsp_OBJENGSTATE.offset), pTunableState);
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}
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const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelGsp =
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{
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/*numEntries=*/ 0,
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/*pExportEntries=*/ 0
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};
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void __nvoc_dtor_OBJENGSTATE(OBJENGSTATE*);
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void __nvoc_dtor_IntrService(IntrService*);
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void __nvoc_dtor_KernelFalcon(KernelFalcon*);
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void __nvoc_dtor_KernelGsp(KernelGsp *pThis) {
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__nvoc_kgspDestruct(pThis);
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__nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
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__nvoc_dtor_IntrService(&pThis->__nvoc_base_IntrService);
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__nvoc_dtor_KernelFalcon(&pThis->__nvoc_base_KernelFalcon);
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PORT_UNREFERENCED_VARIABLE(pThis);
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}
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void __nvoc_init_dataField_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowner) {
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ChipHal *chipHal = &pRmhalspecowner->chipHal;
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const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
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RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
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const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
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PORT_UNREFERENCED_VARIABLE(pThis);
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PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
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PORT_UNREFERENCED_VARIABLE(chipHal);
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PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
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PORT_UNREFERENCED_VARIABLE(rmVariantHal);
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PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
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// Hal field -- bPartitionedFmc
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
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{
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pThis->bPartitionedFmc = ((NvBool)(0 == 0));
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}
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// default
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else
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{
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pThis->bPartitionedFmc = ((NvBool)(0 != 0));
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}
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}
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NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* , RmHalspecOwner* );
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NV_STATUS __nvoc_ctor_IntrService(IntrService* , RmHalspecOwner* );
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NV_STATUS __nvoc_ctor_KernelFalcon(KernelFalcon* , RmHalspecOwner* );
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NV_STATUS __nvoc_ctor_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowner) {
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NV_STATUS status = NV_OK;
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status = __nvoc_ctor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE, pRmhalspecowner);
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if (status != NV_OK) goto __nvoc_ctor_KernelGsp_fail_OBJENGSTATE;
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status = __nvoc_ctor_IntrService(&pThis->__nvoc_base_IntrService, pRmhalspecowner);
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if (status != NV_OK) goto __nvoc_ctor_KernelGsp_fail_IntrService;
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status = __nvoc_ctor_KernelFalcon(&pThis->__nvoc_base_KernelFalcon, pRmhalspecowner);
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if (status != NV_OK) goto __nvoc_ctor_KernelGsp_fail_KernelFalcon;
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__nvoc_init_dataField_KernelGsp(pThis, pRmhalspecowner);
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goto __nvoc_ctor_KernelGsp_exit; // Success
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__nvoc_ctor_KernelGsp_fail_KernelFalcon:
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__nvoc_dtor_IntrService(&pThis->__nvoc_base_IntrService);
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__nvoc_ctor_KernelGsp_fail_IntrService:
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__nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
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__nvoc_ctor_KernelGsp_fail_OBJENGSTATE:
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__nvoc_ctor_KernelGsp_exit:
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return status;
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}
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static void __nvoc_init_funcTable_KernelGsp_1(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowner) {
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ChipHal *chipHal = &pRmhalspecowner->chipHal;
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const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
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RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
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const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
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PORT_UNREFERENCED_VARIABLE(pThis);
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PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
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PORT_UNREFERENCED_VARIABLE(chipHal);
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PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
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PORT_UNREFERENCED_VARIABLE(rmVariantHal);
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PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
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pThis->__kgspConstructEngine__ = &kgspConstructEngine_IMPL;
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pThis->__kgspRegisterIntrService__ = &kgspRegisterIntrService_IMPL;
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pThis->__kgspServiceInterrupt__ = &kgspServiceInterrupt_IMPL;
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// Hal function -- kgspConfigureFalcon
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if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
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{
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
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{
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pThis->__kgspConfigureFalcon__ = &kgspConfigureFalcon_TU102;
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}
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else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0870f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | GH100 */
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{
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pThis->__kgspConfigureFalcon__ = &kgspConfigureFalcon_GA102;
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}
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else if (0)
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{
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}
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}
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else if (0)
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{
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}
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// Hal function -- kgspIsDebugModeEnabled
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if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
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{
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
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{
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pThis->__kgspIsDebugModeEnabled__ = &kgspIsDebugModeEnabled_TU102;
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}
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else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0870fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | GH100 */
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{
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pThis->__kgspIsDebugModeEnabled__ = &kgspIsDebugModeEnabled_GA100;
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}
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else if (0)
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{
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}
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}
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else if (0)
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{
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}
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// Hal function -- kgspAllocBootArgs
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if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
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{
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
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{
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pThis->__kgspAllocBootArgs__ = &kgspAllocBootArgs_TU102;
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}
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else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
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{
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pThis->__kgspAllocBootArgs__ = &kgspAllocBootArgs_GH100;
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}
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else if (0)
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|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspFreeBootArgs
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspFreeBootArgs__ = &kgspFreeBootArgs_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspFreeBootArgs__ = &kgspFreeBootArgs_GH100;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspBootstrapRiscvOSEarly
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
|
|
{
|
|
pThis->__kgspBootstrapRiscvOSEarly__ = &kgspBootstrapRiscvOSEarly_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspBootstrapRiscvOSEarly__ = &kgspBootstrapRiscvOSEarly_GA102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspBootstrapRiscvOSEarly__ = &kgspBootstrapRiscvOSEarly_GH100;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetGspRmBootUcodeStorage
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
|
|
{
|
|
pThis->__kgspGetGspRmBootUcodeStorage__ = &kgspGetGspRmBootUcodeStorage_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0870f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | GH100 */
|
|
{
|
|
pThis->__kgspGetGspRmBootUcodeStorage__ = &kgspGetGspRmBootUcodeStorage_GA102;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetBinArchiveGspRmBoot
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmBoot__ = &kgspGetBinArchiveGspRmBoot_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmBoot__ = &kgspGetBinArchiveGspRmBoot_GA100;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmBoot__ = &kgspGetBinArchiveGspRmBoot_GA102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmBoot__ = &kgspGetBinArchiveGspRmBoot_GH100;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00700000UL) )) /* ChipHal: AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmBoot__ = &kgspGetBinArchiveGspRmBoot_AD102;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetBinArchiveGspRmCcGfwDebugSigned
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmCcGfwDebugSigned__ = &kgspGetBinArchiveGspRmCcGfwDebugSigned_GH100;
|
|
}
|
|
// default
|
|
else
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmCcGfwDebugSigned__ = &kgspGetBinArchiveGspRmCcGfwDebugSigned_80f438;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetBinArchiveGspRmCcGfwProdSigned
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmCcGfwProdSigned__ = &kgspGetBinArchiveGspRmCcGfwProdSigned_GH100;
|
|
}
|
|
// default
|
|
else
|
|
{
|
|
pThis->__kgspGetBinArchiveGspRmCcGfwProdSigned__ = &kgspGetBinArchiveGspRmCcGfwProdSigned_80f438;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspCalculateFbLayout
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspCalculateFbLayout__ = &kgspCalculateFbLayout_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspCalculateFbLayout__ = &kgspCalculateFbLayout_GH100;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetNonWprHeapSize
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspGetNonWprHeapSize__ = &kgspGetNonWprHeapSize_ed6b8b;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspGetNonWprHeapSize__ = &kgspGetNonWprHeapSize_d505ea;
|
|
}
|
|
// default
|
|
else
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspExecuteSequencerCommand
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
|
|
{
|
|
pThis->__kgspExecuteSequencerCommand__ = &kgspExecuteSequencerCommand_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0870f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | GH100 */
|
|
{
|
|
pThis->__kgspExecuteSequencerCommand__ = &kgspExecuteSequencerCommand_GA102;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspReadUcodeFuseVersion
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
|
|
{
|
|
pThis->__kgspReadUcodeFuseVersion__ = &kgspReadUcodeFuseVersion_b2b553;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0870fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | GH100 */
|
|
{
|
|
pThis->__kgspReadUcodeFuseVersion__ = &kgspReadUcodeFuseVersion_GA100;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspResetHw
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspResetHw__ = &kgspResetHw_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspResetHw__ = &kgspResetHw_GH100;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspIsEngineInReset
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0870ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | GH100 */
|
|
{
|
|
pThis->__kgspIsEngineInReset__ = &kgspIsEngineInReset_TU102;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetFrtsSize
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspGetFrtsSize__ = &kgspGetFrtsSize_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000400UL) )) /* ChipHal: GA100 | GH100 */
|
|
{
|
|
pThis->__kgspGetFrtsSize__ = &kgspGetFrtsSize_4a4dee;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspExtractVbiosFromRom
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspExtractVbiosFromRom__ = &kgspExtractVbiosFromRom_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspExtractVbiosFromRom__ = &kgspExtractVbiosFromRom_395e98;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspExecuteFwsecFrts
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspExecuteFwsecFrts__ = &kgspExecuteFwsecFrts_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000400UL) )) /* ChipHal: GA100 | GH100 */
|
|
{
|
|
pThis->__kgspExecuteFwsecFrts__ = &kgspExecuteFwsecFrts_5baef9;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspExecuteFwsecSb
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspExecuteFwsecSb__ = &kgspExecuteFwsecSb_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspExecuteFwsecSb__ = &kgspExecuteFwsecSb_ac1694;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspExecuteBooterLoad
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspExecuteBooterLoad__ = &kgspExecuteBooterLoad_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspExecuteBooterLoad__ = &kgspExecuteBooterLoad_5baef9;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspExecuteBooterUnloadIfNeeded
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspExecuteBooterUnloadIfNeeded__ = &kgspExecuteBooterUnloadIfNeeded_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspExecuteBooterUnloadIfNeeded__ = &kgspExecuteBooterUnloadIfNeeded_5baef9;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspExecuteHsFalcon
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
|
|
{
|
|
pThis->__kgspExecuteHsFalcon__ = &kgspExecuteHsFalcon_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspExecuteHsFalcon__ = &kgspExecuteHsFalcon_GA102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspExecuteHsFalcon__ = &kgspExecuteHsFalcon_5baef9;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspWaitForGfwBootOk
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0070ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspWaitForGfwBootOk__ = &kgspWaitForGfwBootOk_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspWaitForGfwBootOk__ = &kgspWaitForGfwBootOk_GH100;
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetBinArchiveBooterLoadUcode
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000000e0UL) )) /* ChipHal: TU102 | TU104 | TU106 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterLoadUcode__ = &kgspGetBinArchiveBooterLoadUcode_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000300UL) )) /* ChipHal: TU116 | TU117 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterLoadUcode__ = &kgspGetBinArchiveBooterLoadUcode_TU116;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterLoadUcode__ = &kgspGetBinArchiveBooterLoadUcode_GA100;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterLoadUcode__ = &kgspGetBinArchiveBooterLoadUcode_GA102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00700000UL) )) /* ChipHal: AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterLoadUcode__ = &kgspGetBinArchiveBooterLoadUcode_AD102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterLoadUcode__ = &kgspGetBinArchiveBooterLoadUcode_80f438;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetBinArchiveBooterUnloadUcode
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000000e0UL) )) /* ChipHal: TU102 | TU104 | TU106 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterUnloadUcode__ = &kgspGetBinArchiveBooterUnloadUcode_TU102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000300UL) )) /* ChipHal: TU116 | TU117 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterUnloadUcode__ = &kgspGetBinArchiveBooterUnloadUcode_TU116;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterUnloadUcode__ = &kgspGetBinArchiveBooterUnloadUcode_GA100;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterUnloadUcode__ = &kgspGetBinArchiveBooterUnloadUcode_GA102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00700000UL) )) /* ChipHal: AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterUnloadUcode__ = &kgspGetBinArchiveBooterUnloadUcode_AD102;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspGetBinArchiveBooterUnloadUcode__ = &kgspGetBinArchiveBooterUnloadUcode_80f438;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspGetSignatureSectionName
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
|
|
{
|
|
pThis->__kgspGetSignatureSectionName__ = &kgspGetSignatureSectionName_63b8e2;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */
|
|
{
|
|
pThis->__kgspGetSignatureSectionName__ = &kgspGetSignatureSectionName_e46f5b;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000000e0UL) )) /* ChipHal: TU102 | TU104 | TU106 */
|
|
{
|
|
pThis->__kgspGetSignatureSectionName__ = &kgspGetSignatureSectionName_cbc19d;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000300UL) )) /* ChipHal: TU116 | TU117 */
|
|
{
|
|
pThis->__kgspGetSignatureSectionName__ = &kgspGetSignatureSectionName_ab7237;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00700000UL) )) /* ChipHal: AD102 | AD103 | AD104 */
|
|
{
|
|
pThis->__kgspGetSignatureSectionName__ = &kgspGetSignatureSectionName_20361c;
|
|
}
|
|
else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspGetSignatureSectionName__ = &kgspGetSignatureSectionName_5f1986;
|
|
}
|
|
// default
|
|
else
|
|
{
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
// Hal function -- kgspSetupGspFmcArgs
|
|
if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
|
|
{
|
|
if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x08000000UL) )) /* ChipHal: GH100 */
|
|
{
|
|
pThis->__kgspSetupGspFmcArgs__ = &kgspSetupGspFmcArgs_GH100;
|
|
}
|
|
// default
|
|
else
|
|
{
|
|
pThis->__kgspSetupGspFmcArgs__ = &kgspSetupGspFmcArgs_5baef9;
|
|
}
|
|
}
|
|
else if (0)
|
|
{
|
|
}
|
|
|
|
pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelGsp_engstateConstructEngine;
|
|
|
|
pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelGsp_intrservRegisterIntrService;
|
|
|
|
pThis->__nvoc_base_IntrService.__intrservServiceInterrupt__ = &__nvoc_thunk_KernelGsp_intrservServiceInterrupt;
|
|
|
|
pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_thunk_KernelGsp_kflcnResetHw;
|
|
|
|
pThis->__nvoc_base_KernelFalcon.__kflcnIsEngineInReset__ = &__nvoc_thunk_KernelGsp_kflcnIsEngineInReset;
|
|
|
|
pThis->__kgspStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kgspStateDestroy;
|
|
|
|
pThis->__kgspFreeTunableState__ = &__nvoc_thunk_OBJENGSTATE_kgspFreeTunableState;
|
|
|
|
pThis->__kgspCompareTunableState__ = &__nvoc_thunk_OBJENGSTATE_kgspCompareTunableState;
|
|
|
|
pThis->__kgspClearInterrupt__ = &__nvoc_thunk_IntrService_kgspClearInterrupt;
|
|
|
|
pThis->__kgspIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kgspIsPresent;
|
|
|
|
pThis->__kgspReconcileTunableState__ = &__nvoc_thunk_OBJENGSTATE_kgspReconcileTunableState;
|
|
|
|
pThis->__kgspStateLoad__ = &__nvoc_thunk_OBJENGSTATE_kgspStateLoad;
|
|
|
|
pThis->__kgspStateUnload__ = &__nvoc_thunk_OBJENGSTATE_kgspStateUnload;
|
|
|
|
pThis->__kgspServiceNotificationInterrupt__ = &__nvoc_thunk_IntrService_kgspServiceNotificationInterrupt;
|
|
|
|
pThis->__kgspStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kgspStateInitLocked;
|
|
|
|
pThis->__kgspStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePreLoad;
|
|
|
|
pThis->__kgspStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePostUnload;
|
|
|
|
pThis->__kgspStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePreUnload;
|
|
|
|
pThis->__kgspGetTunableState__ = &__nvoc_thunk_OBJENGSTATE_kgspGetTunableState;
|
|
|
|
pThis->__kgspStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgspStateInitUnlocked;
|
|
|
|
pThis->__kgspInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kgspInitMissing;
|
|
|
|
pThis->__kgspStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePreInitLocked;
|
|
|
|
pThis->__kgspStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePreInitUnlocked;
|
|
|
|
pThis->__kgspStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kgspStatePostLoad;
|
|
|
|
pThis->__kgspAllocTunableState__ = &__nvoc_thunk_OBJENGSTATE_kgspAllocTunableState;
|
|
|
|
pThis->__kgspSetTunableState__ = &__nvoc_thunk_OBJENGSTATE_kgspSetTunableState;
|
|
}
|
|
|
|
void __nvoc_init_funcTable_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowner) {
|
|
__nvoc_init_funcTable_KernelGsp_1(pThis, pRmhalspecowner);
|
|
}
|
|
|
|
void __nvoc_init_OBJENGSTATE(OBJENGSTATE*, RmHalspecOwner* );
|
|
void __nvoc_init_IntrService(IntrService*, RmHalspecOwner* );
|
|
void __nvoc_init_KernelFalcon(KernelFalcon*, RmHalspecOwner* );
|
|
void __nvoc_init_KernelGsp(KernelGsp *pThis, RmHalspecOwner *pRmhalspecowner) {
|
|
pThis->__nvoc_pbase_KernelGsp = pThis;
|
|
pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object;
|
|
pThis->__nvoc_pbase_OBJENGSTATE = &pThis->__nvoc_base_OBJENGSTATE;
|
|
pThis->__nvoc_pbase_IntrService = &pThis->__nvoc_base_IntrService;
|
|
pThis->__nvoc_pbase_KernelFalcon = &pThis->__nvoc_base_KernelFalcon;
|
|
__nvoc_init_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE, pRmhalspecowner);
|
|
__nvoc_init_IntrService(&pThis->__nvoc_base_IntrService, pRmhalspecowner);
|
|
__nvoc_init_KernelFalcon(&pThis->__nvoc_base_KernelFalcon, pRmhalspecowner);
|
|
__nvoc_init_funcTable_KernelGsp(pThis, pRmhalspecowner);
|
|
}
|
|
|
|
NV_STATUS __nvoc_objCreate_KernelGsp(KernelGsp **ppThis, Dynamic *pParent, NvU32 createFlags) {
|
|
NV_STATUS status;
|
|
Object *pParentObj;
|
|
KernelGsp *pThis;
|
|
RmHalspecOwner *pRmhalspecowner;
|
|
|
|
pThis = portMemAllocNonPaged(sizeof(KernelGsp));
|
|
if (pThis == NULL) return NV_ERR_NO_MEMORY;
|
|
|
|
portMemSet(pThis, 0, sizeof(KernelGsp));
|
|
|
|
__nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_KernelGsp);
|
|
|
|
if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
|
|
{
|
|
pParentObj = dynamicCast(pParent, Object);
|
|
objAddChild(pParentObj, &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object);
|
|
}
|
|
else
|
|
{
|
|
pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.pParent = NULL;
|
|
}
|
|
|
|
if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL)
|
|
pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent);
|
|
NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT);
|
|
|
|
__nvoc_init_KernelGsp(pThis, pRmhalspecowner);
|
|
status = __nvoc_ctor_KernelGsp(pThis, pRmhalspecowner);
|
|
if (status != NV_OK) goto __nvoc_objCreate_KernelGsp_cleanup;
|
|
|
|
*ppThis = pThis;
|
|
return NV_OK;
|
|
|
|
__nvoc_objCreate_KernelGsp_cleanup:
|
|
// do not call destructors here since the constructor already called them
|
|
portMemFree(pThis);
|
|
return status;
|
|
}
|
|
|
|
NV_STATUS __nvoc_objCreateDynamic_KernelGsp(KernelGsp **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
|
|
NV_STATUS status;
|
|
|
|
status = __nvoc_objCreate_KernelGsp(ppThis, pParent, createFlags);
|
|
|
|
return status;
|
|
}
|
|
|