mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-01-31 13:39:47 +00:00
538 lines
18 KiB
C
538 lines
18 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2017-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _COMMON_NVSWITCH_H_
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#define _COMMON_NVSWITCH_H_
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#ifdef INCLUDE_NVLINK_LIB
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#include "nvlink.h"
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#endif
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#include "export_nvswitch.h"
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#include "error_nvswitch.h"
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#include "io_nvswitch.h"
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#include "rom_nvswitch.h"
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#include "haldef_nvswitch.h"
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#include "nvctassert.h"
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#include "flcn/flcnable_nvswitch.h"
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#include "inforom/inforom_nvswitch.h"
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#include "spi_nvswitch.h"
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#include "smbpbi_nvswitch.h"
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#include "nvCpuUuid.h"
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#define NVSWITCH_GET_BIT(v, p) (((v) >> (p)) & 1)
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#define NVSWITCH_SET_BIT(v, p) ((v) | NVBIT(p))
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#define NVSWITCH_CLEAR_BIT(v, p) ((v) & ~NVBIT(p))
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#define NVSWITCH_MASK_BITS(n) (~(0xFFFFFFFF << (n)))
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static NV_INLINE NvBool nvswitch_test_flags(NvU32 val, NvU32 flags)
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{
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return !!(val & flags);
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}
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static NV_INLINE void nvswitch_set_flags(NvU32 *val, NvU32 flags)
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{
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*val |= flags;
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}
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static NV_INLINE void nvswitch_clear_flags(NvU32 *val, NvU32 flags)
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{
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*val &= ~flags;
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}
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// Destructive operation to reverse bits in a mask
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#define NVSWITCH_REVERSE_BITMASK_32(numBits, mask) \
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{ \
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NvU32 i, reverse = 0; \
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FOR_EACH_INDEX_IN_MASK(32, i, mask) \
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{ \
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reverse |= NVBIT((numBits - 1) - i); \
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} \
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FOR_EACH_INDEX_IN_MASK_END; \
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\
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mask = reverse; \
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}
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#define NVSWITCH_CHECK_STATUS(_d, _status) \
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if (_status != NVL_SUCCESS) \
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{ \
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NVSWITCH_PRINT(_d, MMIO, "%s(%d): status=%d\n", \
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__FUNCTION__, __LINE__, \
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_status); \
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}
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#define IS_RTLSIM(device) (device->is_rtlsim)
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#define IS_FMODEL(device) (device->is_fmodel)
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#define IS_EMULATION(device) (device->is_emulation)
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#define NVSWITCH_DEVICE_NAME "nvswitch"
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#define NVSWITCH_LINK_NAME "link"
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// Max size of sprintf("%d", valid_instance) compile time check
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#if NVSWITCH_DEVICE_INSTANCE_MAX < 100
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#define NVSWITCH_INSTANCE_LEN 2
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#endif
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#define NV_ARRAY_ELEMENTS(x) ((sizeof(x)/sizeof((x)[0])))
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#define NVSWITCH_DBG_LEVEL NVSWITCH_DBG_LEVEL_INFO
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#if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
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#define NVSWITCH_PRINT(_d, _lvl, _fmt, ...) \
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((NVSWITCH_DBG_LEVEL <= NVSWITCH_DBG_LEVEL_ ## _lvl) ? \
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nvswitch_os_print(NVSWITCH_DBG_LEVEL_ ## _lvl, \
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"%s[%-5s]: " _fmt, \
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((_d == NULL) ? \
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"nvswitchx" : \
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((nvswitch_device *)_d)->name), \
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#_lvl, \
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## __VA_ARGS__) : \
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((void)(0)) \
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)
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#else
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#define NVSWITCH_PRINT(_d, _lvl, _fmt, ...) ((void)0)
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#endif
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#if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
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#define nvswitch_os_malloc(_size) \
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nvswitch_os_malloc_trace(_size, __FILE__, __LINE__)
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#else
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#define nvswitch_os_malloc(_size) \
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nvswitch_os_malloc_trace(_size, NULL, 0)
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#endif
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//
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// This macro should be used to check assertion statements and print Error messages.
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//
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#if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
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#define NVSWITCH_ASSERT(_cond) \
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nvswitch_os_assert_log((_cond), "NVSwitch: Assertion failed in %s() at %s:%d\n", \
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__FUNCTION__ , __FILE__, __LINE__)
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#else
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#define NVSWITCH_ASSERT(_cond) \
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nvswitch_os_assert_log((_cond), "NVSwitch: Assertion failed \n")
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#endif
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#define NVSWITCH_ASSERT_ERROR_INFO(errorCategory, errorInfo) NVSWITCH_ASSERT(0x0)
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#define NVSWITCH_ASSERT_INFO(errCode, errLinkMask, errSubcode) NVSWITCH_ASSERT(0x0)
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//
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// This macro should be used cautiously as it prints information in the release
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// drivers.
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//
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#define NVSWITCH_PRINT_SXID(_d, _sxid, _fmt, ...) \
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do \
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{ \
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NVSWITCH_ASSERT(nvswitch_translate_hw_error(_sxid) != NVSWITCH_NVLINK_HW_GENERIC); \
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nvswitch_os_print(NVSWITCH_DBG_LEVEL_ERROR, \
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"nvidia-%s: SXid (PCI:" NVLINK_PCI_DEV_FMT "): %05d, " _fmt, \
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(_d)->name, NVLINK_PCI_DEV_FMT_ARGS(&(_d)->nvlink_device->pciInfo), _sxid, \
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##__VA_ARGS__); \
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nvswitch_lib_smbpbi_log_sxid(_d, _sxid, _fmt, ##__VA_ARGS__); \
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nvswitch_inforom_bbx_add_sxid(_d, _sxid, 0, 0, 0); \
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} while(0)
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#define NVSWITCH_DEV_CMD_DISPATCH_WITH_PRIVATE_DATA(cmd, function, type, private)\
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case cmd: \
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{ \
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if (sizeof(type) == size) \
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{ \
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retval = function(device, params, private); \
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} \
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else \
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{ \
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retval = -NVL_BAD_ARGS; \
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} \
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break; \
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}
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#define NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, supported, function, type) \
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case cmd: \
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{ \
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if (!supported) \
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{ \
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retval = -NVL_ERR_NOT_SUPPORTED; \
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} \
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else if (sizeof(type) == size) \
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{ \
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retval = function(device, params); \
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} \
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else \
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{ \
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retval = -NVL_BAD_ARGS; \
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} \
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break; \
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}
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#define NVSWITCH_DEV_CMD_DISPATCH(cmd, function, type) \
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NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, NV_TRUE, function, type)
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#define NVSWITCH_MODS_CMDS_SUPPORTED NV_FALSE
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#if defined(DEBUG) || defined(DEVELOP) || defined(NV_MODS)
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#define NVSWITCH_TEST_CMDS_SUPPORTED NV_TRUE
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#else
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#define NVSWITCH_TEST_CMDS_SUPPORTED NV_FALSE
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#endif
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#define NVSWITCH_DEV_CMD_DISPATCH_MODS(cmd, function, type) \
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NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, NVSWITCH_MODS_CMDS_SUPPORTED, function, type)
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#define NVSWITCH_DEV_CMD_DISPATCH_TEST(cmd, function, type) \
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NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, NVSWITCH_TEST_CMDS_SUPPORTED, function, type)
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#define NVSWITCH_MAX_NUM_LINKS 100
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#if NVSWITCH_MAX_NUM_LINKS <= 100
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#define NVSWITCH_LINK_INSTANCE_LEN 2
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#endif
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extern const nvlink_link_handlers nvswitch_link_handlers;
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//
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// link_info is used to store private link information
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//
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typedef struct
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{
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char name[sizeof(NVSWITCH_LINK_NAME) + NVSWITCH_LINK_INSTANCE_LEN];
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} LINK_INFO;
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typedef struct
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{
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NvU32 external_fabric_mgmt;
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NvU32 txtrain_control;
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NvU32 crossbar_DBI;
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NvU32 link_DBI;
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NvU32 ac_coupled_mask;
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NvU32 ac_coupled_mask2;
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NvU32 swap_clk;
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NvU32 link_enable_mask;
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NvU32 link_enable_mask2;
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NvU32 bandwidth_shaper;
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NvU32 ssg_control;
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NvU32 skip_buffer_ready;
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NvU32 enable_pm;
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NvU32 chiplib_forced_config_link_mask;
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NvU32 chiplib_forced_config_link_mask2;
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NvU32 soe_dma_self_test;
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NvU32 soe_disable;
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NvU32 soe_enable;
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NvU32 soe_boot_core;
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NvU32 latency_counter;
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NvU32 nvlink_speed_control;
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NvU32 inforom_bbx_periodic_flush;
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NvU32 inforom_bbx_write_periodicity;
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NvU32 inforom_bbx_write_min_duration;
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NvU32 ato_control;
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NvU32 sto_control;
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NvU32 minion_disable;
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NvU32 set_ucode_target;
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NvU32 set_simmode;
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NvU32 set_smf_settings;
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NvU32 select_uphy_tables;
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NvU32 link_training_mode;
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NvU32 i2c_access_control;
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NvU32 link_recal_settings;
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NvU32 crc_bit_error_rate_short;
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NvU32 crc_bit_error_rate_long;
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} NVSWITCH_REGKEY_TYPE;
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//
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// Background tasks
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//
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typedef struct NVSWITCH_TASK
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{
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struct NVSWITCH_TASK *next;
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void (*task_fn)(nvswitch_device *);
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NvU64 period_nsec;
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NvU64 last_run_nsec;
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NvU32 flags;
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} NVSWITCH_TASK_TYPE;
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#define NVSWITCH_TASK_TYPE_FLAGS_ALWAYS_RUN 0x1 // Run even the if not initialized
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//
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// PLL
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//
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typedef struct
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{
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NvU32 src_freq_khz;
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NvU32 M;
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NvU32 N;
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NvU32 PL;
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NvU32 dist_mode;
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NvU32 refclk_div;
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NvU32 vco_freq_khz;
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NvU32 freq_khz;
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} NVSWITCH_PLL_INFO;
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// Per-unit interrupt masks
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typedef struct
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{
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NvU32 fatal;
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NvU32 nonfatal;
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NvU32 correctable;
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} NVSWITCH_INTERRUPT_MASK;
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// BIOS Image
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typedef struct
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{
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// Size of the image.
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NvU32 size;
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// pointer to the BIOS image.
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NvU8* pImage;
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} NVSWITCH_BIOS_IMAGE;
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struct NVSWITCH_CLIENT_EVENT
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{
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NVListRec entry;
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NvU32 eventId;
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void *private_driver_data;
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};
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//
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// common device information
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//
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struct nvswitch_device
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{
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#ifdef INCLUDE_NVLINK_LIB
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nvlink_device *nvlink_device;
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#endif
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char name[sizeof(NVSWITCH_DEVICE_NAME) + NVSWITCH_INSTANCE_LEN];
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void *os_handle;
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NvU32 os_instance;
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NvBool is_emulation;
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NvBool is_rtlsim;
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NvBool is_fmodel;
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NVSWITCH_REGKEY_TYPE regkeys;
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// Tasks
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NVSWITCH_TASK_TYPE *tasks;
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// Errors
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NvU64 error_total; // Total errors recorded across all error logs
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NVSWITCH_ERROR_LOG_TYPE log_FATAL_ERRORS;
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NVSWITCH_ERROR_LOG_TYPE log_NONFATAL_ERRORS;
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NVSWITCH_FIRMWARE firmware;
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// HAL connectivity
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nvswitch_hal hal;
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// SOE
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FLCNABLE *pSoe;
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// DMA
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NvU32 dma_addr_width;
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// InfoROM
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struct inforom *pInforom;
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// I2C
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struct NVSWITCH_OBJI2C *pI2c;
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// SMBPBI
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struct smbpbi *pSmbpbi;
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// NVSWITCH_LINK_TYPE
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NVSWITCH_LINK_TYPE link[NVSWITCH_MAX_LINK_COUNT];
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// PLL
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NVSWITCH_PLL_INFO switch_pll;
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// Device specific information
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NvU32 chip_arch; // NVSWITCH_GET_INFO_INDEX_ARCH_*
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NvU32 chip_impl; // NVSWITCH_GET_INFO_INDEX_IMPL_*
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//
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NvU32 chip_id; // NV_PSMC/PMC_BOOT_42_CHIP_ID_*
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void * chip_device;
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// UUID in big-endian format
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NvUuid uuid;
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// Fabric Manager timeout value for the heartbeat
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NvU32 fm_timeout;
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// Fabric State
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NVSWITCH_DRIVER_FABRIC_STATE driver_fabric_state;
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NVSWITCH_DEVICE_FABRIC_STATE device_fabric_state;
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NVSWITCH_DEVICE_BLACKLIST_REASON device_blacklist_reason;
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NvU64 fabric_state_timestamp;
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NvU32 fabric_state_sequence_number;
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// Full BIOS image
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NVSWITCH_BIOS_IMAGE biosImage;
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// List of client events
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NVListRec client_events_list;
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};
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#define NVSWITCH_IS_DEVICE_VALID(device) \
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((device != NULL) && \
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(device->nvlink_device->type == NVLINK_DEVICE_TYPE_NVSWITCH))
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#define NVSWITCH_IS_DEVICE_ACCESSIBLE(device) \
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(NVSWITCH_IS_DEVICE_VALID(device) && \
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(device->nvlink_device->pciInfo.bars[0].pBar != NULL))
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#define NVSWITCH_IS_DEVICE_INITIALIZED(device) \
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(NVSWITCH_IS_DEVICE_ACCESSIBLE(device) && \
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(device->nvlink_device->initialized))
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//
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// Error Function defines
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//
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NvlStatus
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nvswitch_construct_error_log
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(
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NVSWITCH_ERROR_LOG_TYPE *errors,
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NvU32 error_log_size,
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NvBool overwritable
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);
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void
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nvswitch_destroy_error_log
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(
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nvswitch_device *device,
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NVSWITCH_ERROR_LOG_TYPE *errors
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);
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void
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nvswitch_record_error
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(
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nvswitch_device *device,
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NVSWITCH_ERROR_LOG_TYPE *errors,
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NvU32 error_type, // NVSWITCH_ERR_*
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NvU32 instance,
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NvU32 subinstance,
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NVSWITCH_ERROR_SRC_TYPE error_src, // NVSWITCH_ERROR_SRC_*
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NVSWITCH_ERROR_SEVERITY_TYPE severity, // NVSWITCH_ERROR_SEVERITY_*
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NvBool error_resolved,
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void *data,
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NvU32 data_size,
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NvU32 line
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);
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void
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nvswitch_discard_errors
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(
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NVSWITCH_ERROR_LOG_TYPE *errors,
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NvU32 error_discard_count
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);
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void
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nvswitch_get_error
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(
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nvswitch_device *device,
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NVSWITCH_ERROR_LOG_TYPE *errors,
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NVSWITCH_ERROR_TYPE *error_entry,
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NvU32 error_idx,
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NvU32 *error_count
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);
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void
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nvswitch_get_next_error
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(
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nvswitch_device *device,
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NVSWITCH_ERROR_LOG_TYPE *errors,
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NVSWITCH_ERROR_TYPE *error_entry,
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NvU32 *error_count,
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NvBool remove_from_list
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);
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void
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nvswitch_get_link_handlers
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(
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nvlink_link_handlers *nvswitch_link_handlers
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);
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//
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// Timeout checking
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//
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typedef struct NVSWITCH_TIMEOUT
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{
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NvU64 timeout_ns;
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} NVSWITCH_TIMEOUT;
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#define NVSWITCH_INTERVAL_1USEC_IN_NS 1000LL
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#define NVSWITCH_INTERVAL_50USEC_IN_NS 50000LL
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#define NVSWITCH_INTERVAL_1MSEC_IN_NS 1000000LL
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#define NVSWITCH_INTERVAL_5MSEC_IN_NS 5000000LL
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#define NVSWITCH_INTERVAL_1SEC_IN_NS 1000000000LL
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#define NVSWITCH_HEARTBEAT_INTERVAL_NS NVSWITCH_INTERVAL_1SEC_IN_NS
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// This should only be used for short delays
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#define NVSWITCH_NSEC_DELAY(nsec_delay) \
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do \
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{ \
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if (!IS_FMODEL(device)) \
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{ \
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NVSWITCH_TIMEOUT timeout; \
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nvswitch_timeout_create(nsec_delay, &timeout); \
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do { } \
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while (!nvswitch_timeout_check(&timeout)); \
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} \
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} while(0)
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#define NVSWITCH_GET_CAP(tbl,cap,field) (((NvU8)tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)]) & (0?cap##field))
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#define NVSWITCH_SET_CAP(tbl,cap,field) ((tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)]) |= (0?cap##field))
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NvBool nvswitch_is_lr10_device_id(NvU32 device_id);
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NvU32 nvswitch_reg_read_32(nvswitch_device *device, NvU32 offset);
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void nvswitch_reg_write_32(nvswitch_device *device, NvU32 offset, NvU32 data);
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NvU64 nvswitch_read_64bit_counter(nvswitch_device *device, NvU32 lo_offset, NvU32 hi_offset);
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void nvswitch_timeout_create(NvU64 timeout_ns, NVSWITCH_TIMEOUT *time);
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NvBool nvswitch_timeout_check(NVSWITCH_TIMEOUT *time);
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void nvswitch_task_create(nvswitch_device *device,
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void (*task_fn)(nvswitch_device *device), NvU64 period_nsec, NvU32 flags);
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void nvswitch_tasks_destroy(nvswitch_device *device);
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void nvswitch_free_chipdevice(nvswitch_device *device);
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NvlStatus nvswitch_create_link(nvswitch_device *device, NvU32 link_number, nvlink_link **link);
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nvlink_link* nvswitch_get_link(nvswitch_device *device, NvU8 link_id);
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NvU64 nvswitch_get_enabled_link_mask(nvswitch_device *device);
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void nvswitch_destroy_link(nvlink_link *link);
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NvlStatus nvswitch_validate_pll_config(nvswitch_device *device,
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NVSWITCH_PLL_INFO *switch_pll,
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NVSWITCH_PLL_LIMITS default_pll_limits);
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NvlStatus nvswitch_poll_sublink_state(nvswitch_device *device, nvlink_link *link);
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void nvswitch_setup_link_loopback_mode(nvswitch_device *device, NvU32 linkNumber);
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void nvswitch_reset_persistent_link_hw_state(nvswitch_device *device, NvU32 linkNumber);
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void nvswitch_store_topology_information(nvswitch_device *device, nvlink_link *link);
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NvlStatus nvswitch_set_training_mode(nvswitch_device *device);
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NvBool nvswitch_is_link_in_reset(nvswitch_device *device, nvlink_link *link);
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void nvswitch_apply_recal_settings(nvswitch_device *device, nvlink_link *link);
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void nvswitch_init_buffer_ready(nvswitch_device *device, nvlink_link *link, NvBool bNportBufferReady);
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#endif //_COMMON_NVSWITCH_H_
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