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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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633 lines
32 KiB
C
633 lines
32 KiB
C
#ifndef _G_KERNEL_CE_NVOC_H_
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#define _G_KERNEL_CE_NVOC_H_
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#include "nvoc/runtime.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "g_kernel_ce_nvoc.h"
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#ifndef KERNEL_CE_H
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#define KERNEL_CE_H
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#include "core/core.h"
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#include "core/info_block.h"
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#include "ctrl/ctrl2080/ctrl2080ce.h"
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#include "gpu/eng_state.h"
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#include "gpu/gpu_halspec.h"
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#include "gpu/gpu.h"
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#include "kernel/gpu/intr/intr_service.h"
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#include "gpu/ce/kernel_ce_shared.h"
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//
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// Kernel Copy Engine
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// This class provides Kernel-RM interface and state tracking for Copy Engine.
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//
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#ifdef NVOC_KERNEL_CE_H_PRIVATE_ACCESS_ALLOWED
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#define PRIVATE_FIELD(x) x
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#else
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#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
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#endif
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struct NVLINK_CE_AUTO_CONFIG_TABLE;
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struct KernelCE {
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const struct NVOC_RTTI *__nvoc_rtti;
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struct OBJENGSTATE __nvoc_base_OBJENGSTATE;
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struct IntrService __nvoc_base_IntrService;
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struct Object *__nvoc_pbase_Object;
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struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE;
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struct IntrService *__nvoc_pbase_IntrService;
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struct KernelCE *__nvoc_pbase_KernelCE;
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NV_STATUS (*__kceConstructEngine__)(OBJGPU *, struct KernelCE *, ENGDESCRIPTOR);
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NvBool (*__kceIsPresent__)(OBJGPU *, struct KernelCE *);
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NV_STATUS (*__kceStateLoad__)(OBJGPU *, struct KernelCE *, NvU32);
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NV_STATUS (*__kceStateUnload__)(OBJGPU *, struct KernelCE *, NvU32);
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void (*__kceRegisterIntrService__)(OBJGPU *, struct KernelCE *, IntrServiceRecord *);
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NV_STATUS (*__kceServiceNotificationInterrupt__)(OBJGPU *, struct KernelCE *, IntrServiceServiceNotificationInterruptArguments *);
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NV_STATUS (*__kceGetNvlinkAutoConfigCeValues__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *);
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NvBool (*__kceGetNvlinkMaxTopoForTable__)(OBJGPU *, struct KernelCE *, struct NVLINK_TOPOLOGY_PARAMS *, void *, NvU32, NvU32 *);
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NvBool (*__kceIsCurrentMaxTopology__)(OBJGPU *, struct KernelCE *, struct NVLINK_TOPOLOGY_PARAMS *, NvU32 *, NvU32 *);
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NvU32 (*__kceGetGrceConfigSize1__)(struct KernelCE *);
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NvU32 (*__kceGetPce2lceConfigSize1__)(struct KernelCE *);
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NV_STATUS (*__kceGetMappings__)(OBJGPU *, struct KernelCE *, NVLINK_TOPOLOGY_PARAMS *, NvU32 *, NvU32 *, NvU32 *);
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NV_STATUS (*__kceMapPceLceForSysmemLinks__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *, NvU32);
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NV_STATUS (*__kceMapPceLceForNvlinkPeers__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *);
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NvU32 (*__kceGetSysmemSupportedLceMask__)(OBJGPU *, struct KernelCE *);
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NV_STATUS (*__kceMapAsyncLceDefault__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32 *, NvU32);
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NvU32 (*__kceGetNvlinkPeerSupportedLceMask__)(OBJGPU *, struct KernelCE *, NvU32);
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NvU32 (*__kceGetGrceSupportedLceMask__)(OBJGPU *, struct KernelCE *);
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NvBool (*__kceIsGen4orHigherSupported__)(OBJGPU *, struct KernelCE *);
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void (*__kceApplyGen4orHigherMapping__)(OBJGPU *, struct KernelCE *, NvU32 *, NvU32 *, NvU32, NvU32);
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NV_STATUS (*__kceReconcileTunableState__)(POBJGPU, struct KernelCE *, void *);
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NV_STATUS (*__kceStateInitLocked__)(POBJGPU, struct KernelCE *);
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NV_STATUS (*__kceStatePreLoad__)(POBJGPU, struct KernelCE *, NvU32);
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NV_STATUS (*__kceStatePostUnload__)(POBJGPU, struct KernelCE *, NvU32);
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void (*__kceStateDestroy__)(POBJGPU, struct KernelCE *);
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NV_STATUS (*__kceStatePreUnload__)(POBJGPU, struct KernelCE *, NvU32);
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NV_STATUS (*__kceStateInitUnlocked__)(POBJGPU, struct KernelCE *);
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void (*__kceInitMissing__)(POBJGPU, struct KernelCE *);
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NV_STATUS (*__kceStatePreInitLocked__)(POBJGPU, struct KernelCE *);
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NV_STATUS (*__kceStatePreInitUnlocked__)(POBJGPU, struct KernelCE *);
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NV_STATUS (*__kceGetTunableState__)(POBJGPU, struct KernelCE *, void *);
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NV_STATUS (*__kceCompareTunableState__)(POBJGPU, struct KernelCE *, void *, void *);
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void (*__kceFreeTunableState__)(POBJGPU, struct KernelCE *, void *);
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NvBool (*__kceClearInterrupt__)(OBJGPU *, struct KernelCE *, IntrServiceClearInterruptArguments *);
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NV_STATUS (*__kceStatePostLoad__)(POBJGPU, struct KernelCE *, NvU32);
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NV_STATUS (*__kceAllocTunableState__)(POBJGPU, struct KernelCE *, void **);
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NV_STATUS (*__kceSetTunableState__)(POBJGPU, struct KernelCE *, void *);
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NvU32 (*__kceServiceInterrupt__)(OBJGPU *, struct KernelCE *, IntrServiceServiceInterruptArguments *);
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NvU32 publicID;
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NvBool bStubbed;
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NvU32 nvlinkPeerMask;
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NvBool bIsAutoConfigEnabled;
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NvBool bUseGen4Mapping;
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struct IO_APERTURE aperture;
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};
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#ifndef __NVOC_CLASS_KernelCE_TYPEDEF__
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#define __NVOC_CLASS_KernelCE_TYPEDEF__
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typedef struct KernelCE KernelCE;
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#endif /* __NVOC_CLASS_KernelCE_TYPEDEF__ */
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#ifndef __nvoc_class_id_KernelCE
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#define __nvoc_class_id_KernelCE 0x242aca
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#endif /* __nvoc_class_id_KernelCE */
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCE;
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#define __staticCast_KernelCE(pThis) \
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((pThis)->__nvoc_pbase_KernelCE)
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#ifdef __nvoc_kernel_ce_h_disabled
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#define __dynamicCast_KernelCE(pThis) ((KernelCE*)NULL)
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#else //__nvoc_kernel_ce_h_disabled
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#define __dynamicCast_KernelCE(pThis) \
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((KernelCE*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelCE)))
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#endif //__nvoc_kernel_ce_h_disabled
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#define PDB_PROP_KCE_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE.
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#define PDB_PROP_KCE_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING
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NV_STATUS __nvoc_objCreateDynamic_KernelCE(KernelCE**, Dynamic*, NvU32, va_list);
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NV_STATUS __nvoc_objCreate_KernelCE(KernelCE**, Dynamic*, NvU32);
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#define __objCreate_KernelCE(ppNewObj, pParent, createFlags) \
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__nvoc_objCreate_KernelCE((ppNewObj), staticCast((pParent), Dynamic), (createFlags))
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#define kceConstructEngine(pGpu, pKCe, arg0) kceConstructEngine_DISPATCH(pGpu, pKCe, arg0)
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#define kceIsPresent(pGpu, pKCe) kceIsPresent_DISPATCH(pGpu, pKCe)
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#define kceIsPresent_HAL(pGpu, pKCe) kceIsPresent_DISPATCH(pGpu, pKCe)
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#define kceStateLoad(arg0, arg1, arg2) kceStateLoad_DISPATCH(arg0, arg1, arg2)
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#define kceStateLoad_HAL(arg0, arg1, arg2) kceStateLoad_DISPATCH(arg0, arg1, arg2)
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#define kceStateUnload(pGpu, pKCe, flags) kceStateUnload_DISPATCH(pGpu, pKCe, flags)
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#define kceStateUnload_HAL(pGpu, pKCe, flags) kceStateUnload_DISPATCH(pGpu, pKCe, flags)
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#define kceRegisterIntrService(arg0, arg1, arg2) kceRegisterIntrService_DISPATCH(arg0, arg1, arg2)
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#define kceServiceNotificationInterrupt(arg0, arg1, arg2) kceServiceNotificationInterrupt_DISPATCH(arg0, arg1, arg2)
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#define kceGetNvlinkAutoConfigCeValues(pGpu, pKCe, arg0, arg1, arg2) kceGetNvlinkAutoConfigCeValues_DISPATCH(pGpu, pKCe, arg0, arg1, arg2)
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#define kceGetNvlinkAutoConfigCeValues_HAL(pGpu, pKCe, arg0, arg1, arg2) kceGetNvlinkAutoConfigCeValues_DISPATCH(pGpu, pKCe, arg0, arg1, arg2)
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#define kceGetNvlinkMaxTopoForTable(pGpu, pKCe, arg0, arg1, arg2, arg3) kceGetNvlinkMaxTopoForTable_DISPATCH(pGpu, pKCe, arg0, arg1, arg2, arg3)
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#define kceGetNvlinkMaxTopoForTable_HAL(pGpu, pKCe, arg0, arg1, arg2, arg3) kceGetNvlinkMaxTopoForTable_DISPATCH(pGpu, pKCe, arg0, arg1, arg2, arg3)
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#define kceIsCurrentMaxTopology(pGpu, arg0, arg1, arg2, arg3) kceIsCurrentMaxTopology_DISPATCH(pGpu, arg0, arg1, arg2, arg3)
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#define kceIsCurrentMaxTopology_HAL(pGpu, arg0, arg1, arg2, arg3) kceIsCurrentMaxTopology_DISPATCH(pGpu, arg0, arg1, arg2, arg3)
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#define kceGetGrceConfigSize1(arg0) kceGetGrceConfigSize1_DISPATCH(arg0)
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#define kceGetGrceConfigSize1_HAL(arg0) kceGetGrceConfigSize1_DISPATCH(arg0)
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#define kceGetPce2lceConfigSize1(arg0) kceGetPce2lceConfigSize1_DISPATCH(arg0)
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#define kceGetPce2lceConfigSize1_HAL(arg0) kceGetPce2lceConfigSize1_DISPATCH(arg0)
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#define kceGetMappings(pGpu, pCe, arg0, arg1, arg2, arg3) kceGetMappings_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3)
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#define kceGetMappings_HAL(pGpu, pCe, arg0, arg1, arg2, arg3) kceGetMappings_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3)
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#define kceMapPceLceForSysmemLinks(pGpu, pCe, arg0, arg1, arg2, arg3) kceMapPceLceForSysmemLinks_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3)
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#define kceMapPceLceForSysmemLinks_HAL(pGpu, pCe, arg0, arg1, arg2, arg3) kceMapPceLceForSysmemLinks_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3)
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#define kceMapPceLceForNvlinkPeers(pGpu, pCe, arg0, arg1, arg2) kceMapPceLceForNvlinkPeers_DISPATCH(pGpu, pCe, arg0, arg1, arg2)
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#define kceMapPceLceForNvlinkPeers_HAL(pGpu, pCe, arg0, arg1, arg2) kceMapPceLceForNvlinkPeers_DISPATCH(pGpu, pCe, arg0, arg1, arg2)
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#define kceGetSysmemSupportedLceMask(pGpu, pCe) kceGetSysmemSupportedLceMask_DISPATCH(pGpu, pCe)
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#define kceGetSysmemSupportedLceMask_HAL(pGpu, pCe) kceGetSysmemSupportedLceMask_DISPATCH(pGpu, pCe)
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#define kceMapAsyncLceDefault(pGpu, pCe, arg0, arg1, arg2, arg3) kceMapAsyncLceDefault_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3)
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#define kceMapAsyncLceDefault_HAL(pGpu, pCe, arg0, arg1, arg2, arg3) kceMapAsyncLceDefault_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3)
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#define kceGetNvlinkPeerSupportedLceMask(pGpu, pCe, arg0) kceGetNvlinkPeerSupportedLceMask_DISPATCH(pGpu, pCe, arg0)
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#define kceGetNvlinkPeerSupportedLceMask_HAL(pGpu, pCe, arg0) kceGetNvlinkPeerSupportedLceMask_DISPATCH(pGpu, pCe, arg0)
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#define kceGetGrceSupportedLceMask(pGpu, pCe) kceGetGrceSupportedLceMask_DISPATCH(pGpu, pCe)
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#define kceGetGrceSupportedLceMask_HAL(pGpu, pCe) kceGetGrceSupportedLceMask_DISPATCH(pGpu, pCe)
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#define kceIsGen4orHigherSupported(pGpu, pCe) kceIsGen4orHigherSupported_DISPATCH(pGpu, pCe)
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#define kceIsGen4orHigherSupported_HAL(pGpu, pCe) kceIsGen4orHigherSupported_DISPATCH(pGpu, pCe)
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#define kceApplyGen4orHigherMapping(pGpu, pCe, arg0, arg1, arg2, arg3) kceApplyGen4orHigherMapping_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3)
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#define kceApplyGen4orHigherMapping_HAL(pGpu, pCe, arg0, arg1, arg2, arg3) kceApplyGen4orHigherMapping_DISPATCH(pGpu, pCe, arg0, arg1, arg2, arg3)
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#define kceReconcileTunableState(pGpu, pEngstate, pTunableState) kceReconcileTunableState_DISPATCH(pGpu, pEngstate, pTunableState)
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#define kceStateInitLocked(pGpu, pEngstate) kceStateInitLocked_DISPATCH(pGpu, pEngstate)
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#define kceStatePreLoad(pGpu, pEngstate, arg0) kceStatePreLoad_DISPATCH(pGpu, pEngstate, arg0)
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#define kceStatePostUnload(pGpu, pEngstate, arg0) kceStatePostUnload_DISPATCH(pGpu, pEngstate, arg0)
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#define kceStateDestroy(pGpu, pEngstate) kceStateDestroy_DISPATCH(pGpu, pEngstate)
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#define kceStatePreUnload(pGpu, pEngstate, arg0) kceStatePreUnload_DISPATCH(pGpu, pEngstate, arg0)
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#define kceStateInitUnlocked(pGpu, pEngstate) kceStateInitUnlocked_DISPATCH(pGpu, pEngstate)
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#define kceInitMissing(pGpu, pEngstate) kceInitMissing_DISPATCH(pGpu, pEngstate)
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#define kceStatePreInitLocked(pGpu, pEngstate) kceStatePreInitLocked_DISPATCH(pGpu, pEngstate)
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#define kceStatePreInitUnlocked(pGpu, pEngstate) kceStatePreInitUnlocked_DISPATCH(pGpu, pEngstate)
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#define kceGetTunableState(pGpu, pEngstate, pTunableState) kceGetTunableState_DISPATCH(pGpu, pEngstate, pTunableState)
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#define kceCompareTunableState(pGpu, pEngstate, pTunables1, pTunables2) kceCompareTunableState_DISPATCH(pGpu, pEngstate, pTunables1, pTunables2)
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#define kceFreeTunableState(pGpu, pEngstate, pTunableState) kceFreeTunableState_DISPATCH(pGpu, pEngstate, pTunableState)
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#define kceClearInterrupt(pGpu, pIntrService, pParams) kceClearInterrupt_DISPATCH(pGpu, pIntrService, pParams)
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#define kceStatePostLoad(pGpu, pEngstate, arg0) kceStatePostLoad_DISPATCH(pGpu, pEngstate, arg0)
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#define kceAllocTunableState(pGpu, pEngstate, ppTunableState) kceAllocTunableState_DISPATCH(pGpu, pEngstate, ppTunableState)
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#define kceSetTunableState(pGpu, pEngstate, pTunableState) kceSetTunableState_DISPATCH(pGpu, pEngstate, pTunableState)
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#define kceServiceInterrupt(pGpu, pIntrService, pParams) kceServiceInterrupt_DISPATCH(pGpu, pIntrService, pParams)
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static inline void kceNonstallIntrCheckAndClear_b3696a(OBJGPU *arg0, struct KernelCE *arg1, struct THREAD_STATE_NODE *arg2) {
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return;
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}
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#ifdef __nvoc_kernel_ce_h_disabled
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static inline void kceNonstallIntrCheckAndClear(OBJGPU *arg0, struct KernelCE *arg1, struct THREAD_STATE_NODE *arg2) {
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NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceNonstallIntrCheckAndClear(arg0, arg1, arg2) kceNonstallIntrCheckAndClear_b3696a(arg0, arg1, arg2)
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#endif //__nvoc_kernel_ce_h_disabled
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#define kceNonstallIntrCheckAndClear_HAL(arg0, arg1, arg2) kceNonstallIntrCheckAndClear(arg0, arg1, arg2)
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NV_STATUS kceUpdateClassDB_KERNEL(OBJGPU *pGpu, struct KernelCE *pKCe);
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#ifdef __nvoc_kernel_ce_h_disabled
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static inline NV_STATUS kceUpdateClassDB(OBJGPU *pGpu, struct KernelCE *pKCe) {
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NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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return NV_ERR_NOT_SUPPORTED;
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceUpdateClassDB(pGpu, pKCe) kceUpdateClassDB_KERNEL(pGpu, pKCe)
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#endif //__nvoc_kernel_ce_h_disabled
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#define kceUpdateClassDB_HAL(pGpu, pKCe) kceUpdateClassDB(pGpu, pKCe)
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NvBool kceIsCeSysmemRead_GP100(OBJGPU *pGpu, struct KernelCE *pKCe);
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#ifdef __nvoc_kernel_ce_h_disabled
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static inline NvBool kceIsCeSysmemRead(OBJGPU *pGpu, struct KernelCE *pKCe) {
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NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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return NV_FALSE;
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceIsCeSysmemRead(pGpu, pKCe) kceIsCeSysmemRead_GP100(pGpu, pKCe)
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#endif //__nvoc_kernel_ce_h_disabled
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#define kceIsCeSysmemRead_HAL(pGpu, pKCe) kceIsCeSysmemRead(pGpu, pKCe)
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NvBool kceIsCeSysmemWrite_GP100(OBJGPU *pGpu, struct KernelCE *pKCe);
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#ifdef __nvoc_kernel_ce_h_disabled
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static inline NvBool kceIsCeSysmemWrite(OBJGPU *pGpu, struct KernelCE *pKCe) {
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NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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return NV_FALSE;
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceIsCeSysmemWrite(pGpu, pKCe) kceIsCeSysmemWrite_GP100(pGpu, pKCe)
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#endif //__nvoc_kernel_ce_h_disabled
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#define kceIsCeSysmemWrite_HAL(pGpu, pKCe) kceIsCeSysmemWrite(pGpu, pKCe)
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NvBool kceIsCeNvlinkP2P_GP100(OBJGPU *pGpu, struct KernelCE *pKCe);
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#ifdef __nvoc_kernel_ce_h_disabled
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static inline NvBool kceIsCeNvlinkP2P(OBJGPU *pGpu, struct KernelCE *pKCe) {
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NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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return NV_FALSE;
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceIsCeNvlinkP2P(pGpu, pKCe) kceIsCeNvlinkP2P_GP100(pGpu, pKCe)
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#endif //__nvoc_kernel_ce_h_disabled
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#define kceIsCeNvlinkP2P_HAL(pGpu, pKCe) kceIsCeNvlinkP2P(pGpu, pKCe)
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NV_STATUS kceGetP2PCes_GV100(struct KernelCE *arg0, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask);
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#ifdef __nvoc_kernel_ce_h_disabled
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static inline NV_STATUS kceGetP2PCes(struct KernelCE *arg0, OBJGPU *pGpu, NvU32 gpuMask, NvU32 *nvlinkP2PCeMask) {
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NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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return NV_ERR_NOT_SUPPORTED;
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceGetP2PCes(arg0, pGpu, gpuMask, nvlinkP2PCeMask) kceGetP2PCes_GV100(arg0, pGpu, gpuMask, nvlinkP2PCeMask)
|
|
#endif //__nvoc_kernel_ce_h_disabled
|
|
|
|
#define kceGetP2PCes_HAL(arg0, pGpu, gpuMask, nvlinkP2PCeMask) kceGetP2PCes(arg0, pGpu, gpuMask, nvlinkP2PCeMask)
|
|
|
|
void kceGetSysmemRWLCEs_GV100(struct KernelCE *arg0, NvU32 *rd, NvU32 *wr);
|
|
|
|
#ifdef __nvoc_kernel_ce_h_disabled
|
|
static inline void kceGetSysmemRWLCEs(struct KernelCE *arg0, NvU32 *rd, NvU32 *wr) {
|
|
NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
|
|
}
|
|
#else //__nvoc_kernel_ce_h_disabled
|
|
#define kceGetSysmemRWLCEs(arg0, rd, wr) kceGetSysmemRWLCEs_GV100(arg0, rd, wr)
|
|
#endif //__nvoc_kernel_ce_h_disabled
|
|
|
|
#define kceGetSysmemRWLCEs_HAL(arg0, rd, wr) kceGetSysmemRWLCEs(arg0, rd, wr)
|
|
|
|
void kceClearAssignedNvlinkPeerMasks_GV100(OBJGPU *pGpu, struct KernelCE *pKCe);
|
|
|
|
#ifdef __nvoc_kernel_ce_h_disabled
|
|
static inline void kceClearAssignedNvlinkPeerMasks(OBJGPU *pGpu, struct KernelCE *pKCe) {
|
|
NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
|
|
}
|
|
#else //__nvoc_kernel_ce_h_disabled
|
|
#define kceClearAssignedNvlinkPeerMasks(pGpu, pKCe) kceClearAssignedNvlinkPeerMasks_GV100(pGpu, pKCe)
|
|
#endif //__nvoc_kernel_ce_h_disabled
|
|
|
|
#define kceClearAssignedNvlinkPeerMasks_HAL(pGpu, pKCe) kceClearAssignedNvlinkPeerMasks(pGpu, pKCe)
|
|
|
|
NvBool kceGetAutoConfigTableEntry_GV100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg1, NvU32 arg2, NvU32 *arg3, NvU32 *arg4);
|
|
|
|
#ifdef __nvoc_kernel_ce_h_disabled
|
|
static inline NvBool kceGetAutoConfigTableEntry(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, struct NVLINK_CE_AUTO_CONFIG_TABLE *arg1, NvU32 arg2, NvU32 *arg3, NvU32 *arg4) {
|
|
NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
|
|
return NV_FALSE;
|
|
}
|
|
#else //__nvoc_kernel_ce_h_disabled
|
|
#define kceGetAutoConfigTableEntry(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) kceGetAutoConfigTableEntry_GV100(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4)
|
|
#endif //__nvoc_kernel_ce_h_disabled
|
|
|
|
#define kceGetAutoConfigTableEntry_HAL(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4) kceGetAutoConfigTableEntry(pGpu, pKCe, arg0, arg1, arg2, arg3, arg4)
|
|
|
|
NV_STATUS kceConstructEngine_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe, ENGDESCRIPTOR arg0);
|
|
|
|
static inline NV_STATUS kceConstructEngine_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, ENGDESCRIPTOR arg0) {
|
|
return pKCe->__kceConstructEngine__(pGpu, pKCe, arg0);
|
|
}
|
|
|
|
NvBool kceIsPresent_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe);
|
|
|
|
static inline NvBool kceIsPresent_491d52(OBJGPU *pGpu, struct KernelCE *pKCe) {
|
|
return ((NvBool)(0 != 0));
|
|
}
|
|
|
|
static inline NvBool kceIsPresent_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe) {
|
|
return pKCe->__kceIsPresent__(pGpu, pKCe);
|
|
}
|
|
|
|
NV_STATUS kceStateLoad_GP100(OBJGPU *arg0, struct KernelCE *arg1, NvU32 arg2);
|
|
|
|
static inline NV_STATUS kceStateLoad_46f6a7(OBJGPU *arg0, struct KernelCE *arg1, NvU32 arg2) {
|
|
return NV_ERR_NOT_SUPPORTED;
|
|
}
|
|
|
|
static inline NV_STATUS kceStateLoad_DISPATCH(OBJGPU *arg0, struct KernelCE *arg1, NvU32 arg2) {
|
|
return arg1->__kceStateLoad__(arg0, arg1, arg2);
|
|
}
|
|
|
|
NV_STATUS kceStateUnload_GP100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 flags);
|
|
|
|
static inline NV_STATUS kceStateUnload_56cd7a(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 flags) {
|
|
return NV_OK;
|
|
}
|
|
|
|
static inline NV_STATUS kceStateUnload_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 flags) {
|
|
return pKCe->__kceStateUnload__(pGpu, pKCe, flags);
|
|
}
|
|
|
|
void kceRegisterIntrService_IMPL(OBJGPU *arg0, struct KernelCE *arg1, IntrServiceRecord arg2[155]);
|
|
|
|
static inline void kceRegisterIntrService_DISPATCH(OBJGPU *arg0, struct KernelCE *arg1, IntrServiceRecord arg2[155]) {
|
|
arg1->__kceRegisterIntrService__(arg0, arg1, arg2);
|
|
}
|
|
|
|
NV_STATUS kceServiceNotificationInterrupt_IMPL(OBJGPU *arg0, struct KernelCE *arg1, IntrServiceServiceNotificationInterruptArguments *arg2);
|
|
|
|
static inline NV_STATUS kceServiceNotificationInterrupt_DISPATCH(OBJGPU *arg0, struct KernelCE *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) {
|
|
return arg1->__kceServiceNotificationInterrupt__(arg0, arg1, arg2);
|
|
}
|
|
|
|
NV_STATUS kceGetNvlinkAutoConfigCeValues_TU102(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2);
|
|
|
|
NV_STATUS kceGetNvlinkAutoConfigCeValues_GA100(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2);
|
|
|
|
static inline NV_STATUS kceGetNvlinkAutoConfigCeValues_56cd7a(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) {
|
|
return NV_OK;
|
|
}
|
|
|
|
static inline NV_STATUS kceGetNvlinkAutoConfigCeValues_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) {
|
|
return pKCe->__kceGetNvlinkAutoConfigCeValues__(pGpu, pKCe, arg0, arg1, arg2);
|
|
}
|
|
|
|
NvBool kceGetNvlinkMaxTopoForTable_GP100(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, void *arg1, NvU32 arg2, NvU32 *arg3);
|
|
|
|
static inline NvBool kceGetNvlinkMaxTopoForTable_491d52(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, void *arg1, NvU32 arg2, NvU32 *arg3) {
|
|
return ((NvBool)(0 != 0));
|
|
}
|
|
|
|
static inline NvBool kceGetNvlinkMaxTopoForTable_DISPATCH(OBJGPU *pGpu, struct KernelCE *pKCe, struct NVLINK_TOPOLOGY_PARAMS *arg0, void *arg1, NvU32 arg2, NvU32 *arg3) {
|
|
return pKCe->__kceGetNvlinkMaxTopoForTable__(pGpu, pKCe, arg0, arg1, arg2, arg3);
|
|
}
|
|
|
|
NvBool kceIsCurrentMaxTopology_GA100(OBJGPU *pGpu, struct KernelCE *arg0, struct NVLINK_TOPOLOGY_PARAMS *arg1, NvU32 *arg2, NvU32 *arg3);
|
|
|
|
static inline NvBool kceIsCurrentMaxTopology_491d52(OBJGPU *pGpu, struct KernelCE *arg0, struct NVLINK_TOPOLOGY_PARAMS *arg1, NvU32 *arg2, NvU32 *arg3) {
|
|
return ((NvBool)(0 != 0));
|
|
}
|
|
|
|
static inline NvBool kceIsCurrentMaxTopology_DISPATCH(OBJGPU *pGpu, struct KernelCE *arg0, struct NVLINK_TOPOLOGY_PARAMS *arg1, NvU32 *arg2, NvU32 *arg3) {
|
|
return arg0->__kceIsCurrentMaxTopology__(pGpu, arg0, arg1, arg2, arg3);
|
|
}
|
|
|
|
NvU32 kceGetGrceConfigSize1_TU102(struct KernelCE *arg0);
|
|
|
|
NvU32 kceGetGrceConfigSize1_GA100(struct KernelCE *arg0);
|
|
|
|
static inline NvU32 kceGetGrceConfigSize1_4a4dee(struct KernelCE *arg0) {
|
|
return 0;
|
|
}
|
|
|
|
static inline NvU32 kceGetGrceConfigSize1_DISPATCH(struct KernelCE *arg0) {
|
|
return arg0->__kceGetGrceConfigSize1__(arg0);
|
|
}
|
|
|
|
NvU32 kceGetPce2lceConfigSize1_TU102(struct KernelCE *arg0);
|
|
|
|
NvU32 kceGetPce2lceConfigSize1_GA100(struct KernelCE *arg0);
|
|
|
|
NvU32 kceGetPce2lceConfigSize1_GA102(struct KernelCE *arg0);
|
|
|
|
static inline NvU32 kceGetPce2lceConfigSize1_4a4dee(struct KernelCE *arg0) {
|
|
return 0;
|
|
}
|
|
|
|
static inline NvU32 kceGetPce2lceConfigSize1_DISPATCH(struct KernelCE *arg0) {
|
|
return arg0->__kceGetPce2lceConfigSize1__(arg0);
|
|
}
|
|
|
|
NV_STATUS kceGetMappings_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3);
|
|
|
|
static inline NV_STATUS kceGetMappings_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3) {
|
|
return NV_ERR_NOT_SUPPORTED;
|
|
}
|
|
|
|
static inline NV_STATUS kceGetMappings_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NVLINK_TOPOLOGY_PARAMS *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3) {
|
|
return pCe->__kceGetMappings__(pGpu, pCe, arg0, arg1, arg2, arg3);
|
|
}
|
|
|
|
NV_STATUS kceMapPceLceForSysmemLinks_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3);
|
|
|
|
NV_STATUS kceMapPceLceForSysmemLinks_GA102(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3);
|
|
|
|
static inline NV_STATUS kceMapPceLceForSysmemLinks_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3) {
|
|
return NV_ERR_NOT_SUPPORTED;
|
|
}
|
|
|
|
static inline NV_STATUS kceMapPceLceForSysmemLinks_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3) {
|
|
return pCe->__kceMapPceLceForSysmemLinks__(pGpu, pCe, arg0, arg1, arg2, arg3);
|
|
}
|
|
|
|
NV_STATUS kceMapPceLceForNvlinkPeers_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2);
|
|
|
|
static inline NV_STATUS kceMapPceLceForNvlinkPeers_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) {
|
|
return NV_ERR_NOT_SUPPORTED;
|
|
}
|
|
|
|
static inline NV_STATUS kceMapPceLceForNvlinkPeers_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2) {
|
|
return pCe->__kceMapPceLceForNvlinkPeers__(pGpu, pCe, arg0, arg1, arg2);
|
|
}
|
|
|
|
NvU32 kceGetSysmemSupportedLceMask_GA100(OBJGPU *pGpu, struct KernelCE *pCe);
|
|
|
|
NvU32 kceGetSysmemSupportedLceMask_GA102(OBJGPU *pGpu, struct KernelCE *pCe);
|
|
|
|
static inline NvU32 kceGetSysmemSupportedLceMask_4a4dee(OBJGPU *pGpu, struct KernelCE *pCe) {
|
|
return 0;
|
|
}
|
|
|
|
static inline NvU32 kceGetSysmemSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe) {
|
|
return pCe->__kceGetSysmemSupportedLceMask__(pGpu, pCe);
|
|
}
|
|
|
|
NV_STATUS kceMapAsyncLceDefault_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3);
|
|
|
|
static inline NV_STATUS kceMapAsyncLceDefault_46f6a7(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3) {
|
|
return NV_ERR_NOT_SUPPORTED;
|
|
}
|
|
|
|
static inline NV_STATUS kceMapAsyncLceDefault_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 *arg2, NvU32 arg3) {
|
|
return pCe->__kceMapAsyncLceDefault__(pGpu, pCe, arg0, arg1, arg2, arg3);
|
|
}
|
|
|
|
NvU32 kceGetNvlinkPeerSupportedLceMask_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg0);
|
|
|
|
NvU32 kceGetNvlinkPeerSupportedLceMask_GA102(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg0);
|
|
|
|
static inline NvU32 kceGetNvlinkPeerSupportedLceMask_4a4dee(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg0) {
|
|
return 0;
|
|
}
|
|
|
|
static inline NvU32 kceGetNvlinkPeerSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 arg0) {
|
|
return pCe->__kceGetNvlinkPeerSupportedLceMask__(pGpu, pCe, arg0);
|
|
}
|
|
|
|
NvU32 kceGetGrceSupportedLceMask_GA100(OBJGPU *pGpu, struct KernelCE *pCe);
|
|
|
|
NvU32 kceGetGrceSupportedLceMask_GA102(OBJGPU *pGpu, struct KernelCE *pCe);
|
|
|
|
static inline NvU32 kceGetGrceSupportedLceMask_4a4dee(OBJGPU *pGpu, struct KernelCE *pCe) {
|
|
return 0;
|
|
}
|
|
|
|
static inline NvU32 kceGetGrceSupportedLceMask_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe) {
|
|
return pCe->__kceGetGrceSupportedLceMask__(pGpu, pCe);
|
|
}
|
|
|
|
NvBool kceIsGen4orHigherSupported_GA100(OBJGPU *pGpu, struct KernelCE *pCe);
|
|
|
|
static inline NvBool kceIsGen4orHigherSupported_cbe027(OBJGPU *pGpu, struct KernelCE *pCe) {
|
|
return ((NvBool)(0 == 0));
|
|
}
|
|
|
|
static inline NvBool kceIsGen4orHigherSupported_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe) {
|
|
return pCe->__kceIsGen4orHigherSupported__(pGpu, pCe);
|
|
}
|
|
|
|
void kceApplyGen4orHigherMapping_GA100(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 arg2, NvU32 arg3);
|
|
|
|
static inline void kceApplyGen4orHigherMapping_b3696a(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 arg2, NvU32 arg3) {
|
|
return;
|
|
}
|
|
|
|
static inline void kceApplyGen4orHigherMapping_DISPATCH(OBJGPU *pGpu, struct KernelCE *pCe, NvU32 *arg0, NvU32 *arg1, NvU32 arg2, NvU32 arg3) {
|
|
pCe->__kceApplyGen4orHigherMapping__(pGpu, pCe, arg0, arg1, arg2, arg3);
|
|
}
|
|
|
|
static inline NV_STATUS kceReconcileTunableState_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, void *pTunableState) {
|
|
return pEngstate->__kceReconcileTunableState__(pGpu, pEngstate, pTunableState);
|
|
}
|
|
|
|
static inline NV_STATUS kceStateInitLocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) {
|
|
return pEngstate->__kceStateInitLocked__(pGpu, pEngstate);
|
|
}
|
|
|
|
static inline NV_STATUS kceStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) {
|
|
return pEngstate->__kceStatePreLoad__(pGpu, pEngstate, arg0);
|
|
}
|
|
|
|
static inline NV_STATUS kceStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) {
|
|
return pEngstate->__kceStatePostUnload__(pGpu, pEngstate, arg0);
|
|
}
|
|
|
|
static inline void kceStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) {
|
|
pEngstate->__kceStateDestroy__(pGpu, pEngstate);
|
|
}
|
|
|
|
static inline NV_STATUS kceStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) {
|
|
return pEngstate->__kceStatePreUnload__(pGpu, pEngstate, arg0);
|
|
}
|
|
|
|
static inline NV_STATUS kceStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) {
|
|
return pEngstate->__kceStateInitUnlocked__(pGpu, pEngstate);
|
|
}
|
|
|
|
static inline void kceInitMissing_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) {
|
|
pEngstate->__kceInitMissing__(pGpu, pEngstate);
|
|
}
|
|
|
|
static inline NV_STATUS kceStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) {
|
|
return pEngstate->__kceStatePreInitLocked__(pGpu, pEngstate);
|
|
}
|
|
|
|
static inline NV_STATUS kceStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate) {
|
|
return pEngstate->__kceStatePreInitUnlocked__(pGpu, pEngstate);
|
|
}
|
|
|
|
static inline NV_STATUS kceGetTunableState_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, void *pTunableState) {
|
|
return pEngstate->__kceGetTunableState__(pGpu, pEngstate, pTunableState);
|
|
}
|
|
|
|
static inline NV_STATUS kceCompareTunableState_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, void *pTunables1, void *pTunables2) {
|
|
return pEngstate->__kceCompareTunableState__(pGpu, pEngstate, pTunables1, pTunables2);
|
|
}
|
|
|
|
static inline void kceFreeTunableState_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, void *pTunableState) {
|
|
pEngstate->__kceFreeTunableState__(pGpu, pEngstate, pTunableState);
|
|
}
|
|
|
|
static inline NvBool kceClearInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) {
|
|
return pIntrService->__kceClearInterrupt__(pGpu, pIntrService, pParams);
|
|
}
|
|
|
|
static inline NV_STATUS kceStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) {
|
|
return pEngstate->__kceStatePostLoad__(pGpu, pEngstate, arg0);
|
|
}
|
|
|
|
static inline NV_STATUS kceAllocTunableState_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, void **ppTunableState) {
|
|
return pEngstate->__kceAllocTunableState__(pGpu, pEngstate, ppTunableState);
|
|
}
|
|
|
|
static inline NV_STATUS kceSetTunableState_DISPATCH(POBJGPU pGpu, struct KernelCE *pEngstate, void *pTunableState) {
|
|
return pEngstate->__kceSetTunableState__(pGpu, pEngstate, pTunableState);
|
|
}
|
|
|
|
static inline NvU32 kceServiceInterrupt_DISPATCH(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) {
|
|
return pIntrService->__kceServiceInterrupt__(pGpu, pIntrService, pParams);
|
|
}
|
|
|
|
NV_STATUS kceTopLevelPceLceMappingsUpdate_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe);
|
|
#ifdef __nvoc_kernel_ce_h_disabled
|
|
static inline NV_STATUS kceTopLevelPceLceMappingsUpdate(OBJGPU *pGpu, struct KernelCE *pKCe) {
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NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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return NV_ERR_NOT_SUPPORTED;
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceTopLevelPceLceMappingsUpdate(pGpu, pKCe) kceTopLevelPceLceMappingsUpdate_IMPL(pGpu, pKCe)
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#endif //__nvoc_kernel_ce_h_disabled
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NV_STATUS kceGetFaultMethodBufferSize_IMPL(OBJGPU *pGpu, NvU32 *size);
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#define kceGetFaultMethodBufferSize(pGpu, size) kceGetFaultMethodBufferSize_IMPL(pGpu, size)
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NV_STATUS kceGetAvailableHubPceMask_IMPL(OBJGPU *pGpu, NVLINK_TOPOLOGY_PARAMS *pTopoParams);
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#define kceGetAvailableHubPceMask(pGpu, pTopoParams) kceGetAvailableHubPceMask_IMPL(pGpu, pTopoParams)
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NV_STATUS kceGetDeviceCaps_IMPL(OBJGPU *gpu, struct KernelCE *pKCe, NvU32 engineType, NvU8 *ceCaps);
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#ifdef __nvoc_kernel_ce_h_disabled
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static inline NV_STATUS kceGetDeviceCaps(OBJGPU *gpu, struct KernelCE *pKCe, NvU32 engineType, NvU8 *ceCaps) {
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NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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return NV_ERR_NOT_SUPPORTED;
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceGetDeviceCaps(gpu, pKCe, engineType, ceCaps) kceGetDeviceCaps_IMPL(gpu, pKCe, engineType, ceCaps)
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#endif //__nvoc_kernel_ce_h_disabled
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NV_STATUS kceGetCeFromNvlinkConfig_IMPL(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3);
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#ifdef __nvoc_kernel_ce_h_disabled
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static inline NV_STATUS kceGetCeFromNvlinkConfig(OBJGPU *pGpu, struct KernelCE *pKCe, NvU32 arg0, NvU32 *arg1, NvU32 *arg2, NvU32 *arg3) {
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|
NV_ASSERT_FAILED_PRECOMP("KernelCE was disabled!");
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|
return NV_ERR_NOT_SUPPORTED;
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}
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#else //__nvoc_kernel_ce_h_disabled
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#define kceGetCeFromNvlinkConfig(pGpu, pKCe, arg0, arg1, arg2, arg3) kceGetCeFromNvlinkConfig_IMPL(pGpu, pKCe, arg0, arg1, arg2, arg3)
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#endif //__nvoc_kernel_ce_h_disabled
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#undef PRIVATE_FIELD
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#endif // KERNEL_CE_H
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|
|
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#ifdef __cplusplus
|
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} // extern "C"
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#endif
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#endif // _G_KERNEL_CE_NVOC_H_
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