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254 lines
12 KiB
C
254 lines
12 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef DAC_P2060_H
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#define DAC_P2060_H
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/* ------------------------ Includes --------------------------------------- */
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#include "gpu/external_device/external_device.h" // DACEXTERNALDEVICE
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#include "gpu/external_device/gsync.h" // GSYNCVIDEOMODE, GSYNCSYNCPOLARITY
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#include "gpu/disp/kern_disp_max.h"
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/* ------------------------ Macros & Defines ------------------------------- */
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// Display synchronization interface. (Framelock, Genlock, Swapready, etc)
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#define NV_P2060_MAX_ASSOCIATED_GPUS 4
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#define NV_P2060_MAX_IFACES_PER_GSYNC 4
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#define NV_P2060_MAX_GPUS_PER_IFACE 1
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#define NV_P2060_MAX_HEADS_PER_GPU 4
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#define NV_P2060_MAX_MOSAIC_SLAVES 3
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#define NV_P2060_MAX_MOSAIC_GROUPS 2
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#define NV_P2060_IFACE_ONE 0
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#define NV_P2060_IFACE_TWO 1
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#define NV_P2060_IFACE_THREE 2
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#define NV_P2060_IFACE_FOUR 3
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#define NV_P2060_SYNC_SKEW_MAX_UNITS_FULL_SUPPORT 65535 // For FPGA with Rev >= 3. Refer Bug 1058215
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#define NV_P2060_SYNC_SKEW_MAX_UNITS_LIMITED_SUPPORT 1 // For FPGA with Rev < 3.
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#define NV_P2060_SYNC_SKEW_RESOLUTION 977
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#define NV_P2060_START_DELAY_MAX_UNITS 65535
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#define NV_P2060_START_DELAY_RESOLUTION 7800
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#define NV_P2060_SYNC_INTERVAL_MAX_UNITS 7
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#define NV_P2061_V204_SYNC_SKEW_RESOLUTION 7 // For 2061 V2.04+
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#define NV_P2061_V204_SYNC_SKEW_MAX_UNITS 0xFFFFFF // For 2061 V2.04+
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#define NV_P2061_V204_SYNC_SKEW_INVALID (NV_P2061_V204_SYNC_SKEW_MAX_UNITS + 1)
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#define NV_P2060_WATCHDOG_COUNT_DOWN_VALUE 60 // 1 minute, assuming watchdog time interval is 1 second.
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#define NV_P2060_FRAME_COUNT_TIMER_INTERVAL 5000000000LL // 5 sec
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#define NV_P2060_MAX_GPU_FRAME_COUNT 65535
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#define NV_P2060_MAX_GSYNC_FRAME_COUNT 16777215 // 2^24.Gsync frame count is a 24 bit register
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#define P2061_FW_REV(pExtDev) ((pExtDev->deviceRev << 8) | (pExtDev->deviceExRev))
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/* ------------------------ Types definitions ------------------------------ */
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typedef struct EXTDEV_I2C_HANDLES
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{
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//Internal handles per GPU
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NvHandle hClient;
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NvHandle hDevice;
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NvHandle hSubdevice;
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NvHandle hSubscription;
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NvU32 gpuId;
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} EXTDEV_I2C_HANDLES;
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typedef struct
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{
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NvU8 lossRegStatus;
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NvU8 gainRegStatus;
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NvU8 miscRegStatus;
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DACEXTERNALDEVICE *pExtDevice;
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}EXTDEV_INTR_DATA;
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// note: NV_P2060_MAX_ASSOCIATED_GPUS = NV_P2060_MAX_IFACES_PER_GSYNC * NV_P2060_MAX_GPUS_PER_IFACE
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struct DACP2060EXTERNALDEVICE
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{
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//Must be at top of struct
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DACEXTERNALDEVICE ExternalDevice;
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// Stuff for supporting the DisplaySync interface
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NvU32 AssociatedCRTCs; // bit mask of crtcs ids associated.
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GSYNCVIDEOMODE VideoMode;
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GSYNCSYNCPOLARITY SyncPolarity;
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NvU32 SyncStartDelay;
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NvU32 SyncSkew;
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NvU32 NSync;
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NvU32 HouseSignal;
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NvU32 UseHouseSync;
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NvU32 Master;
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NvU32 Slaves;
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NvU32 EmitTestSignal;
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NvU32 InterlaceMode;
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NvU32 RefreshRate; // desired frame rate (units of .01Hz)
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NvU32 DebugMask;
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NvU32 gpuAttachMask;
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NvU32 id;
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NvU32 watchdogCountDownValue;
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NvBool isNonFramelockInterruptEnabled;
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NvU32 interruptEnabledInterface;
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NvU32 tSwapRdyHi; /* Value of SWAP_LOCKOUT_START in accordance to the
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* time in microseconds for which swap Rdy
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* lines will remain high.(Provided via a regkey)
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*/
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NvU32 tSwapRdyHiLsrMinTime; /* Value of LSR_MIN_TIME in accordance to the time (in us)
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* swap ready line will remain high.(Provided via a regkey)
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*/
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NvU32 syncSkewResolutionInNs; // resolution in ns
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NvU32 syncSkewMax; // max syncSkew setting in raw units
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NvU32 lastUserSkewSent; // Remember the last Sync Skew value sent by the user
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struct {
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NvU32 currentFrameCount; // gpu frame count register value for current user query
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NvU32 previousFrameCount; // gpu frame count register value for previous user query
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NvU32 totalFrameCount; // equals to cached gsync frame count = gpu frame count + difference.
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NvU32 numberOfRollbacks; // Max value of N where (Gsync Frame Count > N * Gpu frame count)
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NvU32 frameTime; // Time to render one frame.
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NvU64 lastFrameCounterQueryTime;
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NvS32 initialDifference; // Difference between Gsync frame count and (numberOfRollbacks * Gpu framecount)
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NvU32 iface;
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NvU32 head;
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NvU32 vActive; // Vertical Resolution for which system is framelocked.
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NvBool bReCheck; // Enabled to verify initialDifference 1 sec after initialization.
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NvBool enableFrmCmpMatchIntSlave; // Enable the frmCmpMatchInt for slave, if this bit is set.
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NvBool isFrmCmpMatchIntMasterEnabled; // To enable frmCmpMatchInt for master when gsync framecount exceeds (2^24 - 1000)
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} FrameCountData;
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struct {
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NvU32 Status1;
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NvU64 lastSyncCheckTime;
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NvU64 lastStereoToggleTime;
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} Snapshot[NV_P2060_MAX_IFACES_PER_GSYNC];
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// These arrays refer to the state of heads with respect to their sync
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// source, and their usage can be kind of confusing. This table
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// describes how they should be set/used:
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//
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// Head[i] --> Is Head[i] the frame lock master, or a slave
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// SyncSrc --> Where is the sync timing actually coming from (the
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// master head or a house sync signal)
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//
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// Head[i] SyncSrc PM[i] PS[i] PSLS[i]
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// -----------------------------------------+---------------------
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// Master Head[i] 1 0 0
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// Master House 1 1 0
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// Slave Head[!i] 0 0 1
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// Slave House 0 1 0
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// Slave External 0 1 0
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// Neither X 0 0 0
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//
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// (the last row represents the case where the head has not been
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// requested to lock).
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struct {
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struct {
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NvU32 Master [OBJ_MAX_HEADS];
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NvU32 Slaved [OBJ_MAX_HEADS];
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NvU32 LocalSlave[OBJ_MAX_HEADS];
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} Sync;
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struct {
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NvU32 gpuId;
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NvBool connected;
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} GpuInfo;
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struct {
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NvU32 OrigLsrMinTime[OBJ_MAX_HEADS];
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NvBool saved;
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} DsiFliplock;
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struct {
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NvU32 direction;
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NvU32 mode;
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NvBool saved;
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} RasterSyncGpio;
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NvBool SwapReadyRequested;
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NvBool skipSwapBarrierWar;
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NvU32 lastEventNotified;
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NvU32 gainedSync; // Set when we gain sync after enabling framelock.
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} Iface[NV_P2060_MAX_IFACES_PER_GSYNC];
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EXTDEV_I2C_HANDLES i2cHandles[NV_P2060_MAX_IFACES_PER_GSYNC];
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struct {
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NvU32 gpuTimingSource;
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NvU32 gpuTimingSlaves[NV_P2060_MAX_MOSAIC_SLAVES];
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NvU32 slaveGpuCount;
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NvBool enabledMosaic;
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} MosaicGroup[NV_P2060_MAX_MOSAIC_GROUPS];
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};
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PDACEXTERNALDEVICE extdevConstruct_P2060 (OBJGPU *, PDACEXTERNALDEVICE);
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NvBool gsyncAttachExternalDevice_P2060 (OBJGPU *, PDACEXTERNALDEVICE*);
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void extdevDestroy_P2060 (OBJGPU *, PDACEXTERNALDEVICE);
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NvBool extdevGetDevice_P2060 (OBJGPU *, PDACEXTERNALDEVICE);
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NvBool extdevInit_P2060 (OBJGPU *, PDACEXTERNALDEVICE);
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void extdevDestroy_P2060 (OBJGPU *, PDACEXTERNALDEVICE);
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void extdevService_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU8, NvU8, NvU8, NvBool);
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NV_STATUS extdevWatchdog_P2060 (OBJGPU *, OBJTMR *, PDACEXTERNALDEVICE); // OBJTMR routine signature (TIMERPROC).
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NvBool extdevSaveI2cHandles_P2060 (OBJGPU *, DACEXTERNALDEVICE *);
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NV_STATUS gsyncFindGpuHandleLocation (DACEXTERNALDEVICE *, NvU32 , NvU32 *);
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// P2060 hal ifaces
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NvBool gsyncGpuCanBeMaster_P2060 (OBJGPU *, PDACEXTERNALDEVICE);
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NV_STATUS gsyncGetSyncPolarity_P2060 (OBJGPU *, PDACEXTERNALDEVICE, GSYNCSYNCPOLARITY *);
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NV_STATUS gsyncSetSyncPolarity_P2060 (OBJGPU *, PDACEXTERNALDEVICE, GSYNCSYNCPOLARITY);
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NV_STATUS gsyncGetVideoMode_P2060 (OBJGPU *, PDACEXTERNALDEVICE, GSYNCVIDEOMODE *);
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NV_STATUS gsyncSetVideoMode_P2060 (OBJGPU *, PDACEXTERNALDEVICE, GSYNCVIDEOMODE);
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NV_STATUS gsyncGetNSync_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetNSync_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NV_STATUS gsyncGetSyncSkew_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetSyncSkew_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NV_STATUS gsyncGetUseHouse_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetUseHouse_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NV_STATUS gsyncGetSyncStartDelay_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetSyncStartDelay_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NV_STATUS gsyncRefSignal_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, GSYNCSYNCSIGNAL, NvBool bRate, NvU32 *);
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NV_STATUS gsyncRefMaster_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *DisplayMask, NvU32 *Refresh, NvBool retainMaster, NvBool skipSwapBarrierWar);
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NV_STATUS gsyncRefSlaves_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *DisplayMask_s, NvU32 *Refresh);
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NV_STATUS gsyncGetCplStatus_P2060 (OBJGPU *, PDACEXTERNALDEVICE, GSYNCSTATUS, NvU32 *);
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NV_STATUS gsyncGetEmitTestSignal_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetEmitTestSignal_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NV_STATUS gsyncGetInterlaceMode_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetInterlaceMode_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NV_STATUS gsyncRefSwapBarrier_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvBool *);
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NV_STATUS gsyncGetWatchdog_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetWatchdog_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NV_STATUS gsyncGetRevision_P2060 (OBJGPU *, PDACEXTERNALDEVICE, GSYNCCAPSPARAMS *);
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NV_STATUS gsyncOptimizeTimingParameters_P2060(OBJGPU *, GSYNCTIMINGPARAMS *);
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NV_STATUS gsyncGetStereoLockMode_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetStereoLockMode_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NV_STATUS gsyncSetMosaic_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NV30F1_CTRL_GSYNC_SET_LOCAL_SYNC_PARAMS *);
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NV_STATUS gsyncConfigFlashGsync_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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NvBool gsyncSupportsLargeSyncSkew_P2060 (DACEXTERNALDEVICE *);
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#endif
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