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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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76 lines
3.1 KiB
C
76 lines
3.1 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#pragma once
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#include <nvtypes.h>
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//
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// This file was generated with FINN, an NVIDIA coding tool.
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// Source file: class/cl00f3.finn
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//
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/*
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* Class definition for creating a memory descriptor from a FLA range in RmAllocMemory.
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* No memory is allocated, only a memory descriptor and memory object is created
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* for later use in other calls. These classes are used by clients who tries to
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* import the memory exported by other GPU(s)/FAM/process. The range, size and
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* other parameters are passed as Nv01MemoryFla structure.
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*/
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#define NV01_MEMORY_FLA (0xf3U) /* finn: Evaluated from "NV_FLA_MEMORY_ALLOCATION_PARAMS_MESSAGE_ID" */
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/*
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* Structure of NV_FLA_MEMORY_ALLOCATION_PARAMS
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*
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*
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*/
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#define NV_FLA_MEMORY_ALLOCATION_PARAMS_MESSAGE_ID (0x00f3U)
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typedef struct NV_FLA_MEMORY_ALLOCATION_PARAMS {
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NvU32 type; /* FBMEM: NVOS32_TYPE_* */
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NvU32 flags; /* FBMEM: NVOS32_ALLOC_FLAGS_* */
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NvU32 attr; /* FBMEM: NVOS32_ATTR_* */
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NvU32 attr2; /* FBMEM: NVOS32_ATTR2_* */
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NV_DECLARE_ALIGNED(NvU64 base, 8); /* base of FLA range */
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NV_DECLARE_ALIGNED(NvU64 align, 8); /* alignment for FLA range*/
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NV_DECLARE_ALIGNED(NvU64 limit, 8);
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//
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// For Direct connected systems, clients need to program this hSubDevice with
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// the exporting GPU, for RM to route the traffic to the destination GPU
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// Clients need not program this for NvSwitch connected systems
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//
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NvHandle hExportSubdevice; /* hSubdevice of the exporting GPU */
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//
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// Instead of base and limit, clients can also pass the FLA handle (or hExportHandle)
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// being exported from destination side to import on the access side
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//
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NvHandle hExportHandle; /* FLA handle being exported or Export handle */
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// The RM client used to export memory
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NvHandle hExportClient;
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NvU32 flagsOs02;
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} NV_FLA_MEMORY_ALLOCATION_PARAMS;
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