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65 lines
2.1 KiB
C
65 lines
2.1 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef GSP_INIT_ARGS_H
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#define GSP_INIT_ARGS_H
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#include "core/core.h"
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typedef struct {
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RmPhysAddr cmdQueuePhysAddr;
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} GSP_RMFS_INIT_ARGUMENTS;
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typedef struct {
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RmPhysAddr sharedMemPhysAddr;
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NvU32 pageTableEntryCount;
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NvLength cmdQueueOffset;
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NvLength statQueueOffset;
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NvLength locklessCmdQueueOffset;
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NvLength locklessStatQueueOffset;
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} MESSAGE_QUEUE_INIT_ARGUMENTS;
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typedef struct {
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NvU32 oldLevel;
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NvU32 flags;
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NvBool bInPMTransition;
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} GSP_SR_INIT_ARGUMENTS;
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/*!
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* (Cached) GSP fw RM initialization arguments.
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*/
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typedef struct
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{
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MESSAGE_QUEUE_INIT_ARGUMENTS messageQueueInitArguments;
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GSP_SR_INIT_ARGUMENTS srInitArguments;
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NvU32 gpuInstance;
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struct
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{
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NvU64 pa;
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NvU64 size;
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} profilerArgs;
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} GSP_ARGUMENTS_CACHED;
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#endif // GSP_INIT_ARGS_H
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