From 12d764e999bd223432c10e751e7846bdc8e2f07e Mon Sep 17 00:00:00 2001
From: yadaish <yadai@amd.com>
Date: Thu, 4 Dec 2025 18:47:53 +0000
Subject: [PATCH] update

---
 .../pipeline/mixed_prec_flatmm_pipeline_agmem_bgmem_creg_v1.hpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/ck_tile/ops/flatmm/pipeline/mixed_prec_flatmm_pipeline_agmem_bgmem_creg_v1.hpp b/include/ck_tile/ops/flatmm/pipeline/mixed_prec_flatmm_pipeline_agmem_bgmem_creg_v1.hpp
index a523d09dc2..5dbc71d6ea 100644
--- a/include/ck_tile/ops/flatmm/pipeline/mixed_prec_flatmm_pipeline_agmem_bgmem_creg_v1.hpp
+++ b/include/ck_tile/ops/flatmm/pipeline/mixed_prec_flatmm_pipeline_agmem_bgmem_creg_v1.hpp
@@ -206,7 +206,7 @@ struct F16xMXF4FlatmmPipelineAGmemBGmemCRegV1
             constexpr int PackedCnt      = ScalarCnt / MXFP4PackedSize;
             constexpr int float_mantissa = 23;
 
-            uint32_t uscale = uint32_t(scale) << float_mantissa;
+            uint32_t uscale = uint32_t(bit_cast<uint8_t>(scale)) << float_mantissa;
 
             using ComputeV2Type =
                 std::conditional_t<std::is_same_v<ComputeType, half_t>, fp16x2_t, bf16x2_t>;