From 1c2da4b2bf3f26b27f72da4c4e446ad7b4b04aae Mon Sep 17 00:00:00 2001 From: "Ding, Yi" Date: Tue, 3 Jun 2025 06:48:49 +0000 Subject: [PATCH] Fix warning --- ...ckwise_gemm_pipeline_xdlops_mx_moe_nbs_gufusion_v3.hpp | 8 ++++---- .../blockwise_gemm_pipeline_xdlops_mx_moe_nbs_v3.hpp | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/include/ck/tensor_operation/gpu/block/blockwise_gemm_pipeline_xdlops_mx_moe_nbs_gufusion_v3.hpp b/include/ck/tensor_operation/gpu/block/blockwise_gemm_pipeline_xdlops_mx_moe_nbs_gufusion_v3.hpp index 2cd9ef2547..3ea269b601 100644 --- a/include/ck/tensor_operation/gpu/block/blockwise_gemm_pipeline_xdlops_mx_moe_nbs_gufusion_v3.hpp +++ b/include/ck/tensor_operation/gpu/block/blockwise_gemm_pipeline_xdlops_mx_moe_nbs_gufusion_v3.hpp @@ -299,14 +299,14 @@ struct BlockwiseGemmXdlops_pipeline_mx_moe_bns_gufusion_v3{}([&](auto i) { if constexpr((i + num_buffer_load_inst_a + num_buffer_load_inst_b) < mfma_stages_more) { - static_for<0, mfma_perstage_more, 1>{}([&](auto imfma) { + static_for<0, mfma_perstage_more, 1>{}([&](auto /*imfma*/) { __builtin_amdgcn_sched_group_barrier(0x008, 1, 0); // MFMA }); __builtin_amdgcn_sched_group_barrier(0x020, 1, 0); // VMEM read } else { - static_for<0, mfma_perstage_less, 1>{}([&](auto imfma) { + static_for<0, mfma_perstage_less, 1>{}([&](auto /*imfma*/) { __builtin_amdgcn_sched_group_barrier(0x008, 1, 0); // MFMA }); __builtin_amdgcn_sched_group_barrier(0x020, 1, 0); // VMEM read @@ -317,14 +317,14 @@ struct BlockwiseGemmXdlops_pipeline_mx_moe_bns_gufusion_v3{}([&](auto imfma) { + static_for<0, mfma_perstage_more, 1>{}([&](auto /*imfma*/) { __builtin_amdgcn_sched_group_barrier(0x008, 1, 0); // MFMA }); __builtin_amdgcn_sched_group_barrier(0x020, 1, 0); // VMEM read } else { - static_for<0, mfma_perstage_less, 1>{}([&](auto imfma) { + static_for<0, mfma_perstage_less, 1>{}([&](auto /*imfma*/) { __builtin_amdgcn_sched_group_barrier(0x008, 1, 0); // MFMA }); __builtin_amdgcn_sched_group_barrier(0x020, 1, 0); // VMEM read diff --git a/include/ck/tensor_operation/gpu/block/blockwise_gemm_pipeline_xdlops_mx_moe_nbs_v3.hpp b/include/ck/tensor_operation/gpu/block/blockwise_gemm_pipeline_xdlops_mx_moe_nbs_v3.hpp index a392ec0b0c..e073021f0d 100644 --- a/include/ck/tensor_operation/gpu/block/blockwise_gemm_pipeline_xdlops_mx_moe_nbs_v3.hpp +++ b/include/ck/tensor_operation/gpu/block/blockwise_gemm_pipeline_xdlops_mx_moe_nbs_v3.hpp @@ -299,14 +299,14 @@ struct BlockwiseGemmXdlops_pipeline_mx_moe_nbs_v3{}([&](auto i) { if constexpr((i + num_buffer_load_inst_a + num_buffer_load_inst_b) < mfma_stages_more) { - static_for<0, mfma_perstage_more, 1>{}([&](auto imfma) { + static_for<0, mfma_perstage_more, 1>{}([&](auto /*imfma*/) { __builtin_amdgcn_sched_group_barrier(0x008, 1, 0); // MFMA }); __builtin_amdgcn_sched_group_barrier(0x020, 1, 0); // VMEM read } else { - static_for<0, mfma_perstage_less, 1>{}([&](auto imfma) { + static_for<0, mfma_perstage_less, 1>{}([&](auto /*imfma*/) { __builtin_amdgcn_sched_group_barrier(0x008, 1, 0); // MFMA }); __builtin_amdgcn_sched_group_barrier(0x020, 1, 0); // VMEM read @@ -317,14 +317,14 @@ struct BlockwiseGemmXdlops_pipeline_mx_moe_nbs_v3{}([&](auto imfma) { + static_for<0, mfma_perstage_more, 1>{}([&](auto /*imfma*/) { __builtin_amdgcn_sched_group_barrier(0x008, 1, 0); // MFMA }); __builtin_amdgcn_sched_group_barrier(0x020, 1, 0); // VMEM read } else { - static_for<0, mfma_perstage_less, 1>{}([&](auto imfma) { + static_for<0, mfma_perstage_less, 1>{}([&](auto /*imfma*/) { __builtin_amdgcn_sched_group_barrier(0x008, 1, 0); // MFMA }); __builtin_amdgcn_sched_group_barrier(0x020, 1, 0); // VMEM read