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https://github.com/ROCm/composable_kernel.git
synced 2026-05-11 17:00:18 +00:00
update build
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@@ -1,14 +1,14 @@
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#ifndef CK_CONV_COMMON_HPP
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#define CK_CONV_COMMON_HPP
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#ifndef CONV_COMMON_HPP
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#define CONV_COMMON_HPP
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#include "ConstantTensorDescriptor.hpp"
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using namespace ck;
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// this is ugly, only for 4d
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template <class InDesc, class WeiDesc>
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constexpr auto get_convolution_output_default_4d_tensor_descriptor(InDesc, WeiDesc)
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{
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using namespace ck;
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constexpr auto in_desc = InDesc{};
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constexpr auto wei_desc = WeiDesc{};
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@@ -45,6 +45,8 @@ template <class InDesc,
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constexpr auto get_convolution_with_padding_output_default_4d_tensor_descriptor(
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InDesc, WeiDesc, ConvStrides, ConvDilations, LowerPads, UpperPads)
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{
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using namespace ck;
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constexpr auto in_desc = InDesc{};
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constexpr auto wei_desc = WeiDesc{};
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@@ -84,6 +86,8 @@ constexpr auto get_convolution_with_padding_output_default_4d_tensor_descriptor(
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template <class InDesc, class WeiDesc, class OutDesc>
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constexpr std::size_t calculate_convolution_flops(InDesc, WeiDesc, OutDesc)
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{
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using namespace ck;
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constexpr auto wei_desc = WeiDesc{};
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constexpr auto out_desc = OutDesc{};
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@@ -107,6 +111,8 @@ constexpr std::size_t calculate_convolution_flops(InDesc, WeiDesc, OutDesc)
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template <class Float, class InDesc, class WeiDesc, class OutDesc>
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constexpr std::size_t calculate_convolution_memory_size(Float, InDesc, WeiDesc, OutDesc)
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{
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using namespace ck;
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constexpr auto wei_desc = WeiDesc{};
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constexpr auto out_desc = OutDesc{};
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@@ -1,11 +1,9 @@
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#ifndef CK_DEVICE_HPP
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#define CK_DEVICE_HPP
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#ifndef DEVICE_HPP
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#define DEVICE_HPP
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#include <memory>
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#include "config.hpp"
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using namespace ck;
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struct DeviceMem
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{
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DeviceMem() = delete;
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@@ -6,8 +6,6 @@
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#include "gridwise_convolution_implicit_gemm_v3_nchw_cyxk_nkhw.hpp"
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#include "gridwise_convolution_implicit_gemm_v3_nchw_cyxk_nkhw_lds_double_buffer.hpp"
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using namespace ck;
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template <class T, class InDesc, class WeiDesc, class OutDesc>
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void device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw(InDesc,
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const Tensor<T>& in_nchw,
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@@ -17,6 +15,8 @@ void device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw(InDesc,
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Tensor<T>& out_nkhw,
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index_t nrepeat)
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{
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using namespace ck;
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constexpr auto I0 = Number<0>{};
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constexpr auto I1 = Number<1>{};
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constexpr auto I2 = Number<2>{};
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@@ -135,7 +135,6 @@ void device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw(InDesc,
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WeiBlockCopyClusterLengths_C_K,
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WeiBlockCopyDataPerAccess_K>{};
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#if 1
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float time = launch_kernel(run_gridwise_convolution_kernel<decltype(gridwise_conv), T>,
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dim3(GridSize),
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dim3(BlockSize),
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@@ -149,7 +148,6 @@ void device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw(InDesc,
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(float)calculate_convolution_flops(InDesc{}, WeiDesc{}, OutDesc{}) /
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(std::size_t(1000) * 1000 * 1000) / time);
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usleep(std::min(time * 1000, float(10000)));
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#endif
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}
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out_nkhw_device_buf.FromDevice(out_nkhw.mData.data());
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@@ -6,8 +6,6 @@
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#include "gridwise_convolution_implicit_gemm_v4_nchw_kcyx_nkhw.hpp"
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#include "gridwise_convolution_implicit_gemm_v4_nchw_kcyx_nkhw_lds_double_buffer.hpp"
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using namespace ck;
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template <class T,
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class InDesc,
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class WeiDesc,
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@@ -24,6 +22,8 @@ void device_convolution_implicit_gemm_v4_nchw_kcyx_nkhw(InDesc,
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ConvDilations,
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index_t nrepeat)
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{
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using namespace ck;
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constexpr auto I0 = Number<0>{};
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constexpr auto I1 = Number<1>{};
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constexpr auto I2 = Number<2>{};
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@@ -1,5 +1,5 @@
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#ifndef CK_TENSOR_HPP
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#define CK_TENSOR_HPP
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#ifndef TENSOR_HPP
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#define TENSOR_HPP
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#include <thread>
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#include <vector>
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@@ -8,6 +8,7 @@
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#include <utility>
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#include <cassert>
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#include <iostream>
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#include "common_header.hpp"
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template <class Range>
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std::ostream& LogRange(std::ostream& os, Range&& range, std::string delim)
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@@ -269,4 +270,46 @@ struct Tensor
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std::vector<T> mData;
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};
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// this is ugly, only for 4d
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template <class TConstTensorDesc>
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void ostream_ConstantTensorDescriptor(TConstTensorDesc, std::ostream& os = std::cout)
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{
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using namespace ck;
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static_assert(TConstTensorDesc::nDim == 4, "nDim is not 4");
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constexpr auto I0 = Number<0>{};
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constexpr auto I1 = Number<1>{};
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constexpr auto I2 = Number<2>{};
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constexpr auto I3 = Number<3>{};
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constexpr auto desc = TConstTensorDesc{};
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os << "Lengths: {" << desc.GetLength(I0) << ", " << desc.GetLength(I1) << ", "
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<< desc.GetLength(I2) << ", " << desc.GetLength(I3) << "}, "
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<< "Strides: {" << desc.GetStride(I0) << ", " << desc.GetStride(I1) << ", "
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<< desc.GetStride(I2) << ", " << desc.GetStride(I3) << "}" << std::endl;
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}
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// this is ugly, only for 4d
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template <class TConstTensorDesc>
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auto make_TensorDescriptor(TConstTensorDesc)
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{
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using namespace ck;
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static_assert(TConstTensorDesc::nDim == 4, "nDim is not 4");
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constexpr auto I0 = Number<0>{};
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constexpr auto I1 = Number<1>{};
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constexpr auto I2 = Number<2>{};
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constexpr auto I3 = Number<3>{};
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constexpr auto desc = TConstTensorDesc{};
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std::initializer_list<index_t> lengths = {
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desc.GetLength(I0), desc.GetLength(I1), desc.GetLength(I2), desc.GetLength(I3)};
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std::initializer_list<index_t> strides = {
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desc.GetStride(I0), desc.GetStride(I1), desc.GetStride(I2), desc.GetStride(I3)};
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return TensorDescriptor(lengths, strides);
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}
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#endif
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@@ -14,8 +14,6 @@
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#include "device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw.hpp"
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#include "device_convolution_implicit_gemm_v4_nchw_kcyx_nkhw.hpp"
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using namespace ck;
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struct GeneratorTensor_1
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{
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template <class... Is>
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@@ -65,44 +63,6 @@ struct GeneratorTensor_Checkboard
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}
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};
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// this is ugly, only for 4d
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template <class TConstTensorDesc>
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void ostream_ConstantTensorDescriptor(TConstTensorDesc, std::ostream& os = std::cout)
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{
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static_assert(TConstTensorDesc::nDim == 4, "nDim is not 4");
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constexpr auto I0 = Number<0>{};
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constexpr auto I1 = Number<1>{};
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constexpr auto I2 = Number<2>{};
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constexpr auto I3 = Number<3>{};
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constexpr auto desc = TConstTensorDesc{};
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os << "Lengths: {" << desc.GetLength(I0) << ", " << desc.GetLength(I1) << ", "
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<< desc.GetLength(I2) << ", " << desc.GetLength(I3) << "}, "
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<< "Strides: {" << desc.GetStride(I0) << ", " << desc.GetStride(I1) << ", "
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<< desc.GetStride(I2) << ", " << desc.GetStride(I3) << "}" << std::endl;
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}
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// this is ugly, only for 4d
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template <class TConstTensorDesc>
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auto make_TensorDescriptor(TConstTensorDesc)
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{
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static_assert(TConstTensorDesc::nDim == 4, "nDim is not 4");
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constexpr auto I0 = Number<0>{};
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constexpr auto I1 = Number<1>{};
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constexpr auto I2 = Number<2>{};
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constexpr auto I3 = Number<3>{};
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constexpr auto desc = TConstTensorDesc{};
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std::initializer_list<index_t> lengths = {
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desc.GetLength(I0), desc.GetLength(I1), desc.GetLength(I2), desc.GetLength(I3)};
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std::initializer_list<index_t> strides = {
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desc.GetStride(I0), desc.GetStride(I1), desc.GetStride(I2), desc.GetStride(I3)};
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return TensorDescriptor(lengths, strides);
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}
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template <class TIn,
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class TWei,
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class TOut,
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@@ -416,6 +376,8 @@ void check_error(const Tensor<T>& ref, const Tensor<T>& result)
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int main(int argc, char* argv[])
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{
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using namespace ck;
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#if 0
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constexpr index_t N = 8;
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constexpr index_t C = 16;
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@@ -611,7 +573,7 @@ int main(int argc, char* argv[])
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constexpr index_t HPad = 0;
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constexpr index_t WPad = 0;
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#elif 0
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#elif 1
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// 1x1 filter, 8x8 image
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// cudnn@V100 77%, ck@V100 76%, ck@P100 79%, ck@VII 51%
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constexpr index_t N = 128;
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@@ -787,7 +749,7 @@ int main(int argc, char* argv[])
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constexpr index_t HPad = 0;
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constexpr index_t WPad = 0;
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#elif 1
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#elif 0
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// 1x1 filter, 7x7 image
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// cudnn@V100 49%, ck@V100 50%, ck@P100 61%, ck@VII 52%
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constexpr index_t N = 128;
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@@ -859,30 +821,31 @@ int main(int argc, char* argv[])
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#endif
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}
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#if 1
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#if 0
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device_convolution_direct_v2_nchw_kcyx_nkhw
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in_nchw_desc, in_nchw, wei_kcyx_desc, wei_kcyx, out_nkhw_desc, out_nkhw_device, nrepeat);
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#elif 0
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device_convolution_implicit_gemm_v1_chwn_cyxk_khwn
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in_nchw_desc, in_nchw, wei_kcyx_desc, wei_kcyx, out_nkhw_desc, out_nkhw_device, nrepeat);
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#elif 0
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device_convolution_implicit_gemm_v1_nchw_cyxk_nkhw
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in_nchw_desc, in_nchw, wei_kcyx_desc, wei_kcyx, out_nkhw_desc, out_nkhw_device, nrepeat);
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#elif 0
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device_convolution_implicit_gemm_v2_chwn_cyxk_khwn
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in_nchw_desc, in_nchw, wei_kcyx_desc, wei_kcyx, out_nkhw_desc, out_nkhw_device, nrepeat);
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#elif 0
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device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw
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device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw(
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in_nchw_desc, in_nchw, wei_kcyx_desc, wei_kcyx, out_nkhw_desc, out_nkhw_device, nrepeat);
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#elif 1
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device_convolution_implicit_gemm_v4_nchw_kcyx_nkhw
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#endif
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(in_nchw_desc,
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in_nchw,
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wei_kcyx_desc,
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wei_kcyx,
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out_nkhw_desc,
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out_nkhw_device,
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ConvStrides{},
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ConvDilations{},
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nrepeat);
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device_convolution_implicit_gemm_v4_nchw_kcyx_nkhw(in_nchw_desc,
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in_nchw,
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wei_kcyx_desc,
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wei_kcyx,
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out_nkhw_desc,
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out_nkhw_device,
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ConvStrides{},
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ConvDilations{},
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nrepeat);
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#elif 0
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device_implicit_gemm_convolution_1_chwn_cyxk_khwn_padded(in_nchw_desc,
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in_nchw,
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