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Batched gemm and reduction (#156)
* adding batched_gemm_and_reduction * batched_gemm_reduce works with bactch_count=1 * fix a bug in grid_size; batched_gemm_reduce works for batch_count > 1 * adding profiler for batched_gemm_fp16 * fixed a bug in declaration of d1 and d0; both example and profiler work * clang-format * cleanup * batched_gemm_reduce: add test * minor change * fixed some typo in function names
This commit is contained in:
Jianfeng Yan
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#pragma once
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#include <iostream>
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#include <sstream>
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#include "device.hpp"
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#include "device_gemm_reduce.hpp"
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#include "common_header.hpp"
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#include "tensor_layout.hpp"
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#include "tensor_descriptor.hpp"
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#include "tensor_descriptor_helper.hpp"
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#include "gridwise_gemm_reduce_xdl_cshuffle_v1.hpp"
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#include "gemm_specialization.hpp"
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namespace ck {
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namespace tensor_operation {
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namespace device {
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template <typename GridwiseGemm,
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typename FloatAB,
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typename FloatC,
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typename FloatD,
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typename AElementwiseOperation,
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typename BElementwiseOperation,
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typename CElementwiseOperation,
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typename D0ReduceOperation,
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typename D1ReduceOperation,
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typename AGridDesc_AK0_M_AK1,
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typename BGridDesc_BK0_N_BK1,
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typename CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock,
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typename DGridDescriptor_MBlock_MPerBlock,
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typename ComputeBasePrtOfBatch,
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typename Block2CTileMap,
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bool HasMainK0BlockLoop>
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__global__ void
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#if CK_USE_LAUNCH_BOUNDS
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__launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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#endif
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kernel_batched_gemm_reduce_xdl_cshuffle_v1(
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const FloatAB* __restrict__ p_a_grid,
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const FloatAB* __restrict__ p_b_grid,
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FloatC* __restrict__ p_c_grid,
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FloatD* __restrict__ p_d0_grid,
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FloatD* __restrict__ p_d1_grid,
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const index_t batch_count,
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const AElementwiseOperation a_element_op,
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const BElementwiseOperation b_element_op,
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const CElementwiseOperation c_element_op,
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const D0ReduceOperation d0_reduce_op,
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const D1ReduceOperation d1_reduce_op,
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const AGridDesc_AK0_M_AK1 a_grid_desc_ak0_m_ak1,
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const BGridDesc_BK0_N_BK1 b_grid_desc_bk0_n_bk1,
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const CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock
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c_grid_desc_mblock_mperblock_nblock_nperblock,
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const DGridDescriptor_MBlock_MPerBlock d_grid_desc_mblock_mperblock,
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const ComputeBasePrtOfBatch compute_base_ptr_of_batch_,
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const Block2CTileMap block_2_ctile_map)
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{
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const index_t num_blocks_per_batch =
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__builtin_amdgcn_readfirstlane(get_grid_size() / batch_count);
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const index_t g_idx = __builtin_amdgcn_readfirstlane(get_block_1d_id() / num_blocks_per_batch);
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const long_index_t a_batch_offset = __builtin_amdgcn_readfirstlane(
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static_cast<long_index_t>(compute_base_ptr_of_batch_.GetABasePtr(g_idx)));
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const long_index_t b_batch_offset = __builtin_amdgcn_readfirstlane(
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static_cast<long_index_t>(compute_base_ptr_of_batch_.GetBBasePtr(g_idx)));
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const long_index_t c_batch_offset = __builtin_amdgcn_readfirstlane(
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static_cast<long_index_t>(compute_base_ptr_of_batch_.GetCBasePtr(g_idx)));
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const long_index_t d0_batch_offset = __builtin_amdgcn_readfirstlane(
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static_cast<long_index_t>(compute_base_ptr_of_batch_.GetD0BasePtr(g_idx)));
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const long_index_t d1_batch_offset = __builtin_amdgcn_readfirstlane(
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static_cast<long_index_t>(compute_base_ptr_of_batch_.GetD1BasePtr(g_idx)));
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__shared__ char p_shared[GridwiseGemm::GetSharedMemoryNumberOfByte()];
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GridwiseGemm::template Run<HasMainK0BlockLoop>(p_a_grid + a_batch_offset,
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p_b_grid + b_batch_offset,
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p_c_grid + c_batch_offset,
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p_d0_grid + d0_batch_offset,
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p_d1_grid + d1_batch_offset,
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p_shared,
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a_element_op,
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b_element_op,
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c_element_op,
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d0_reduce_op,
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d1_reduce_op,
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a_grid_desc_ak0_m_ak1,
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b_grid_desc_bk0_n_bk1,
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c_grid_desc_mblock_mperblock_nblock_nperblock,
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d_grid_desc_mblock_mperblock,
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block_2_ctile_map);
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}
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template <typename ALayout,
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typename BLayout,
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typename CLayout,
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typename ADataType,
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typename BDataType,
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typename CDataType,
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typename GemmAccDataType,
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typename CShuffleDataType,
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typename ReduceAccDataType,
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typename DDataType,
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typename AElementwiseOperation,
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typename BElementwiseOperation,
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typename CElementwiseOperation,
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typename D0ReduceOperation,
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typename D1ReduceOperation,
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GemmSpecialization_t GemmSpecialization,
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index_t NumGemmKPrefetchStage,
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index_t BlockSize,
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index_t MPerBlock,
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index_t NPerBlock,
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index_t KPerBlock,
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index_t AK1,
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index_t BK1,
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index_t MPerXDL,
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index_t NPerXDL,
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index_t MXdlPerWave,
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index_t NXdlPerWave,
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typename ABlockTransferThreadClusterLengths_AK0_M_AK1,
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typename ABlockTransferThreadClusterArrangeOrder,
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typename ABlockTransferSrcAccessOrder,
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index_t ABlockTransferSrcVectorDim,
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index_t ABlockTransferSrcScalarPerVector,
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index_t ABlockTransferDstScalarPerVector_AK1,
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bool ABlockLdsExtraM,
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typename BBlockTransferThreadClusterLengths_BK0_N_BK1,
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typename BBlockTransferThreadClusterArrangeOrder,
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typename BBlockTransferSrcAccessOrder,
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index_t BBlockTransferSrcVectorDim,
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index_t BBlockTransferSrcScalarPerVector,
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index_t BBlockTransferDstScalarPerVector_BK1,
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bool BBlockLdsExtraN,
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index_t CShuffleMXdlPerWavePerShuffle,
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index_t CShuffleNXdlPerWavePerShuffle,
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typename CShuffleBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock,
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index_t CShuffleBlockTransferScalarPerVector_NPerBlock,
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typename CReduceThreadClusterLengths_MPerBlock_NPerBlock,
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index_t CReduceThreadLds2VGprCopySrcDstScalarPerVector_NPerBlock,
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index_t CReduceThreadVgpr2GlobalCopySrcDstScalarPerVector_MPerBlock>
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struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOperation,
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BElementwiseOperation,
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CElementwiseOperation,
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D0ReduceOperation,
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D1ReduceOperation>
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{
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using DeviceOp = DeviceBatchedGemmReduce_Xdl_CShuffle;
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static constexpr auto I0 = Number<0>{};
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static constexpr auto I1 = Number<1>{};
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static constexpr auto I2 = Number<2>{};
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static auto MakeAGridDescriptor_AK0_M_AK1(index_t MRaw, index_t KRaw, index_t StrideA)
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{
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const auto a_grid_desc_mraw_kraw = [&]() {
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if constexpr(is_same_v<tensor_layout::gemm::RowMajor, ALayout>)
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{
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return make_naive_tensor_descriptor(make_tuple(MRaw, KRaw),
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make_tuple(StrideA, I1));
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}
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else if constexpr(is_same_v<tensor_layout::gemm::ColumnMajor, ALayout>)
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{
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return make_naive_tensor_descriptor(make_tuple(MRaw, KRaw),
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make_tuple(I1, StrideA));
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}
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}();
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const auto M = math::integer_divide_ceil(MRaw, MPerBlock) * MPerBlock;
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const auto K = math::integer_divide_ceil(KRaw, KPerBlock) * KPerBlock;
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const auto MPad = M - MRaw;
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const auto KPad = K - KRaw;
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if constexpr(GemmSpecialization == GemmSpecialization_t::MKPadding ||
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GemmSpecialization == GemmSpecialization_t::MNKPadding)
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{
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// pad both M and K
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assert(K % AK1 == 0);
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const auto AK0 = K / AK1;
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const auto a_grid_desc_m_k =
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transform_tensor_descriptor(a_grid_desc_mraw_kraw,
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make_tuple(make_right_pad_transform(MRaw, MPad),
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make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto a_grid_desc_ak0_m_ak1 =
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transform_tensor_descriptor(a_grid_desc_m_k,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_pass_through_transform(M)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_ak0_m_ak1;
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}
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else if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
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GemmSpecialization == GemmSpecialization_t::MNPadding)
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{
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// pad M, but not K
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assert(KRaw % AK1 == 0);
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const auto AK0 = KRaw / AK1;
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const auto a_grid_desc_ak0_m_ak1 =
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transform_tensor_descriptor(a_grid_desc_mraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_right_pad_transform(MRaw, MPad)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_ak0_m_ak1;
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}
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else if constexpr(GemmSpecialization == GemmSpecialization_t::KPadding ||
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GemmSpecialization == GemmSpecialization_t::NKPadding)
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{
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// pad K, but not M
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assert(K % AK1 == 0);
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const auto AK0 = K / AK1;
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const auto a_grid_desc_m_k = transform_tensor_descriptor(
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a_grid_desc_mraw_kraw,
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make_tuple(make_pass_through_transform(MRaw), make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto a_grid_desc_ak0_m_ak1 =
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transform_tensor_descriptor(a_grid_desc_m_k,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_pass_through_transform(MRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_ak0_m_ak1;
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}
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else
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{
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// not pad M or K
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assert(KRaw % AK1 == 0);
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const auto AK0 = KRaw / AK1;
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const auto a_grid_desc_ak0_m_ak1 =
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transform_tensor_descriptor(a_grid_desc_mraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_pass_through_transform(MRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_ak0_m_ak1;
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}
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}
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static auto MakeBGridDescriptor_BK0_N_BK1(index_t KRaw, index_t NRaw, index_t StrideB)
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{
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const auto b_grid_desc_nraw_kraw = [&]() {
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if constexpr(is_same<tensor_layout::gemm::RowMajor, BLayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(NRaw, KRaw),
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make_tuple(I1, StrideB));
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}
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else if constexpr(is_same<tensor_layout::gemm::ColumnMajor, BLayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(NRaw, KRaw),
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make_tuple(StrideB, I1));
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}
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}();
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const auto N = math::integer_divide_ceil(NRaw, NPerBlock) * NPerBlock;
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const auto K = math::integer_divide_ceil(KRaw, KPerBlock) * KPerBlock;
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const auto NPad = N - NRaw;
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const auto KPad = K - KRaw;
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if constexpr(GemmSpecialization == GemmSpecialization_t::NKPadding ||
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GemmSpecialization == GemmSpecialization_t::MNKPadding)
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{
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// pad both N and K
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assert(K % BK1 == 0);
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const auto BK0 = K / BK1;
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const auto b_grid_desc_n_k =
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transform_tensor_descriptor(b_grid_desc_nraw_kraw,
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make_tuple(make_right_pad_transform(NRaw, NPad),
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make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto b_grid_desc_bk0_n_bk1 =
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transform_tensor_descriptor(b_grid_desc_n_k,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_pass_through_transform(N)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_bk0_n_bk1;
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}
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else if constexpr(GemmSpecialization == GemmSpecialization_t::NPadding ||
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GemmSpecialization == GemmSpecialization_t::MNPadding)
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{
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// pad N, but not K
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assert(KRaw % BK1 == 0);
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const auto BK0 = KRaw / BK1;
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const auto b_grid_desc_bk0_n_bk1 =
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transform_tensor_descriptor(b_grid_desc_nraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_right_pad_transform(NRaw, NPad)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_bk0_n_bk1;
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}
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else if constexpr(GemmSpecialization == GemmSpecialization_t::KPadding ||
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GemmSpecialization == GemmSpecialization_t::MKPadding)
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{
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// pad K, but not N
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assert(K % BK1 == 0);
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const auto BK0 = K / BK1;
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const auto b_grid_desc_n_k = transform_tensor_descriptor(
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b_grid_desc_nraw_kraw,
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make_tuple(make_pass_through_transform(NRaw), make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto b_grid_desc_bk0_n_bk1 =
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transform_tensor_descriptor(b_grid_desc_n_k,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_pass_through_transform(NRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_bk0_n_bk1;
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}
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else
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{
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// not pad N or K
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assert(KRaw % BK1 == 0);
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const auto BK0 = KRaw / BK1;
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const auto b_grid_desc_bk0_n_bk1 =
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transform_tensor_descriptor(b_grid_desc_nraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_pass_through_transform(NRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_bk0_n_bk1;
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}
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}
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static auto MakeCGridDescriptor_M_N(index_t MRaw, index_t NRaw, index_t StrideC)
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{
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const auto c_grid_desc_mraw_nraw = [&]() {
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if constexpr(is_same<tensor_layout::gemm::RowMajor, CLayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(MRaw, NRaw),
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make_tuple(StrideC, I1));
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}
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else if constexpr(is_same<tensor_layout::gemm::ColumnMajor, CLayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(MRaw, NRaw),
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make_tuple(I1, StrideC));
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}
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}();
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const auto M = math::integer_divide_ceil(MRaw, MPerBlock) * MPerBlock;
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const auto N = math::integer_divide_ceil(NRaw, NPerBlock) * NPerBlock;
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const auto MPad = M - MRaw;
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const auto NPad = N - NRaw;
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if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding ||
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GemmSpecialization == GemmSpecialization_t::MNKPadding)
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{
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// pad M and N
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return transform_tensor_descriptor(c_grid_desc_mraw_nraw,
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make_tuple(make_right_pad_transform(MRaw, MPad),
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make_right_pad_transform(NRaw, NPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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}
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else if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
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GemmSpecialization == GemmSpecialization_t::MKPadding)
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{
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// pad M, but not N
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return transform_tensor_descriptor(
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c_grid_desc_mraw_nraw,
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make_tuple(make_right_pad_transform(MRaw, MPad), make_pass_through_transform(NRaw)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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}
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else if constexpr(GemmSpecialization == GemmSpecialization_t::NPadding ||
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GemmSpecialization == GemmSpecialization_t::NKPadding)
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{
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// pad N, but not M
|
||||
return transform_tensor_descriptor(
|
||||
c_grid_desc_mraw_nraw,
|
||||
make_tuple(make_pass_through_transform(MRaw), make_right_pad_transform(NRaw, NPad)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
}
|
||||
else
|
||||
{
|
||||
// not pad M or N
|
||||
return c_grid_desc_mraw_nraw;
|
||||
}
|
||||
}
|
||||
|
||||
// assume D is packed tensor
|
||||
static auto MakeDGridDescriptor_M(index_t MRaw)
|
||||
{
|
||||
const auto d_grid_desc_mraw = make_naive_tensor_descriptor_packed(make_tuple(MRaw));
|
||||
|
||||
const auto M = math::integer_divide_ceil(MRaw, MPerBlock) * MPerBlock;
|
||||
const auto MPad = M - MRaw;
|
||||
|
||||
if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
|
||||
GemmSpecialization == GemmSpecialization_t::MNPadding ||
|
||||
GemmSpecialization == GemmSpecialization_t::MKPadding ||
|
||||
GemmSpecialization == GemmSpecialization_t::MNKPadding)
|
||||
{
|
||||
// pad M
|
||||
return transform_tensor_descriptor(d_grid_desc_mraw,
|
||||
make_tuple(make_right_pad_transform(MRaw, MPad)),
|
||||
make_tuple(Sequence<0>{}),
|
||||
make_tuple(Sequence<0>{}));
|
||||
}
|
||||
else
|
||||
{
|
||||
// not pad M
|
||||
return d_grid_desc_mraw;
|
||||
}
|
||||
}
|
||||
|
||||
using AGridDesc_AK0_M_AK1 = decltype(MakeAGridDescriptor_AK0_M_AK1(1, 1, 1));
|
||||
using BGridDesc_BK0_N_BK1 = decltype(MakeBGridDescriptor_BK0_N_BK1(1, 1, 1));
|
||||
using CGridDesc_M_N = decltype(MakeCGridDescriptor_M_N(1, 1, 1));
|
||||
using DGridDesc_M = decltype(MakeDGridDescriptor_M(1));
|
||||
|
||||
static constexpr auto MakeBlock2CTileMap(index_t batch_count,
|
||||
const CGridDesc_M_N& c_grid_desc_m_n,
|
||||
index_t M01,
|
||||
index_t N01)
|
||||
{
|
||||
const auto M = c_grid_desc_m_n.GetLength(I0);
|
||||
const auto N = c_grid_desc_m_n.GetLength(I1);
|
||||
|
||||
constexpr auto M1 = Number<MPerBlock>{};
|
||||
constexpr auto N1 = Number<NPerBlock>{};
|
||||
|
||||
const auto M0 = M / M1;
|
||||
const auto N0 = N / N1;
|
||||
|
||||
const auto M00 = M0 / M01;
|
||||
const auto N00 = N0 / N01;
|
||||
|
||||
const auto g_m00_m01_n00_n01_to_m0_n0_block_cluster_adaptor =
|
||||
make_single_stage_tensor_adaptor(
|
||||
make_tuple(make_insert_transform(batch_count),
|
||||
make_unmerge_transform(make_tuple(M00, M01)),
|
||||
make_unmerge_transform(make_tuple(N00, N01))),
|
||||
make_tuple(Sequence<>{}, Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1, 3>{}, Sequence<2, 4>{}));
|
||||
|
||||
const auto globalblockid_to_m00_m01_n00_n01_block_cluster_adaptor =
|
||||
make_single_stage_tensor_adaptor(
|
||||
make_tuple(make_merge_transform(make_tuple(batch_count, M00, N00, M01, N01))),
|
||||
make_tuple(Sequence<0, 1, 2, 3, 4>{}),
|
||||
make_tuple(Sequence<0>{}));
|
||||
|
||||
const auto globalblockid_to_m0_n0_block_cluster_adaptor =
|
||||
chain_tensor_adaptors(g_m00_m01_n00_n01_to_m0_n0_block_cluster_adaptor,
|
||||
globalblockid_to_m00_m01_n00_n01_block_cluster_adaptor);
|
||||
|
||||
return globalblockid_to_m0_n0_block_cluster_adaptor;
|
||||
}
|
||||
|
||||
struct ComputeBasePtrOfStridedBatch
|
||||
{
|
||||
ComputeBasePtrOfStridedBatch(index_t BatchStrideA,
|
||||
index_t BatchStrideB,
|
||||
index_t BatchStrideC,
|
||||
index_t BatchStrideD0,
|
||||
index_t BatchStrideD1)
|
||||
: BatchStrideA_(BatchStrideA),
|
||||
BatchStrideB_(BatchStrideB),
|
||||
BatchStrideC_(BatchStrideC),
|
||||
BatchStrideD0_(BatchStrideD0),
|
||||
BatchStrideD1_(BatchStrideD1)
|
||||
{
|
||||
}
|
||||
|
||||
__host__ __device__ constexpr long_index_t GetABasePtr(index_t g_idx) const
|
||||
{
|
||||
return g_idx * static_cast<long_index_t>(BatchStrideA_);
|
||||
}
|
||||
|
||||
__host__ __device__ constexpr long_index_t GetBBasePtr(index_t g_idx) const
|
||||
{
|
||||
return g_idx * static_cast<long_index_t>(BatchStrideB_);
|
||||
}
|
||||
|
||||
__host__ __device__ constexpr long_index_t GetCBasePtr(index_t g_idx) const
|
||||
{
|
||||
return g_idx * static_cast<long_index_t>(BatchStrideC_);
|
||||
}
|
||||
|
||||
__host__ __device__ constexpr long_index_t GetD0BasePtr(index_t g_idx) const
|
||||
{
|
||||
return g_idx * static_cast<long_index_t>(BatchStrideD0_);
|
||||
}
|
||||
|
||||
__host__ __device__ constexpr long_index_t GetD1BasePtr(index_t g_idx) const
|
||||
{
|
||||
return g_idx * static_cast<long_index_t>(BatchStrideD1_);
|
||||
}
|
||||
|
||||
private:
|
||||
index_t BatchStrideA_;
|
||||
index_t BatchStrideB_;
|
||||
index_t BatchStrideC_;
|
||||
index_t BatchStrideD0_;
|
||||
index_t BatchStrideD1_;
|
||||
};
|
||||
|
||||
// GridwiseGemm
|
||||
using GridwiseGemm = GridwiseGemmReduce_k0mk1_k0nk1_mn_xdl_cshuffle_v1<
|
||||
ADataType, // TODO: distinguish A/B datatype
|
||||
GemmAccDataType,
|
||||
CShuffleDataType,
|
||||
CDataType,
|
||||
ReduceAccDataType,
|
||||
DDataType,
|
||||
AElementwiseOperation,
|
||||
BElementwiseOperation,
|
||||
CElementwiseOperation,
|
||||
D0ReduceOperation,
|
||||
D1ReduceOperation,
|
||||
InMemoryDataOperationEnum_t::Set,
|
||||
InMemoryDataOperationEnum_t::AtomicAdd,
|
||||
AGridDesc_AK0_M_AK1,
|
||||
BGridDesc_BK0_N_BK1,
|
||||
CGridDesc_M_N,
|
||||
DGridDesc_M,
|
||||
NumGemmKPrefetchStage,
|
||||
BlockSize,
|
||||
MPerBlock,
|
||||
NPerBlock,
|
||||
KPerBlock,
|
||||
AK1,
|
||||
BK1,
|
||||
MPerXDL,
|
||||
NPerXDL,
|
||||
MXdlPerWave,
|
||||
NXdlPerWave,
|
||||
ABlockTransferThreadClusterLengths_AK0_M_AK1,
|
||||
ABlockTransferThreadClusterArrangeOrder,
|
||||
ABlockTransferSrcAccessOrder,
|
||||
ABlockTransferSrcVectorDim,
|
||||
ABlockTransferSrcScalarPerVector,
|
||||
ABlockTransferDstScalarPerVector_AK1,
|
||||
false,
|
||||
ABlockLdsExtraM,
|
||||
BBlockTransferThreadClusterLengths_BK0_N_BK1,
|
||||
BBlockTransferThreadClusterArrangeOrder,
|
||||
BBlockTransferSrcAccessOrder,
|
||||
BBlockTransferSrcVectorDim,
|
||||
BBlockTransferSrcScalarPerVector,
|
||||
BBlockTransferDstScalarPerVector_BK1,
|
||||
false,
|
||||
BBlockLdsExtraN,
|
||||
CShuffleMXdlPerWavePerShuffle,
|
||||
CShuffleNXdlPerWavePerShuffle,
|
||||
CShuffleBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock,
|
||||
CShuffleBlockTransferScalarPerVector_NPerBlock,
|
||||
CReduceThreadClusterLengths_MPerBlock_NPerBlock,
|
||||
CReduceThreadLds2VGprCopySrcDstScalarPerVector_NPerBlock,
|
||||
CReduceThreadVgpr2GlobalCopySrcDstScalarPerVector_MPerBlock>;
|
||||
|
||||
using Block2CTileMap = decltype(MakeBlock2CTileMap(1, CGridDesc_M_N{}, 1, 1));
|
||||
|
||||
// Argument
|
||||
struct Argument : public BaseArgument
|
||||
{
|
||||
Argument(const ADataType* p_a_grid,
|
||||
const BDataType* p_b_grid,
|
||||
CDataType* p_c_grid,
|
||||
DDataType* p_d0_grid,
|
||||
DDataType* p_d1_grid,
|
||||
index_t MRaw,
|
||||
index_t NRaw,
|
||||
index_t KRaw,
|
||||
index_t StrideA,
|
||||
index_t StrideB,
|
||||
index_t StrideC,
|
||||
AElementwiseOperation a_element_op,
|
||||
BElementwiseOperation b_element_op,
|
||||
CElementwiseOperation c_element_op,
|
||||
D0ReduceOperation d0_reduce_op,
|
||||
D1ReduceOperation d1_reduce_op,
|
||||
index_t BatchCount)
|
||||
: p_a_grid_{p_a_grid},
|
||||
p_b_grid_{p_b_grid},
|
||||
p_c_grid_{p_c_grid},
|
||||
p_d0_grid_{p_d0_grid},
|
||||
p_d1_grid_{p_d1_grid},
|
||||
BatchCount_(BatchCount),
|
||||
a_grid_desc_ak0_m_ak1_{DeviceOp::MakeAGridDescriptor_AK0_M_AK1(MRaw, KRaw, StrideA)},
|
||||
b_grid_desc_bk0_n_bk1_{DeviceOp::MakeBGridDescriptor_BK0_N_BK1(KRaw, NRaw, StrideB)},
|
||||
c_grid_desc_m_n_{DeviceOp::MakeCGridDescriptor_M_N(MRaw, NRaw, StrideC)},
|
||||
d_grid_desc_m_{DeviceOp::MakeDGridDescriptor_M(MRaw)},
|
||||
c_grid_desc_mblock_mperblock_nblock_nperblock_{},
|
||||
d_grid_desc_mblock_mperblock_{},
|
||||
compute_base_ptr_of_batch_{a_grid_desc_ak0_m_ak1_.GetElementSpaceSize(),
|
||||
b_grid_desc_bk0_n_bk1_.GetElementSpaceSize(),
|
||||
c_grid_desc_m_n_.GetElementSpaceSize(),
|
||||
d_grid_desc_m_.GetElementSpaceSize(),
|
||||
d_grid_desc_m_.GetElementSpaceSize()},
|
||||
block_2_ctile_map_{},
|
||||
a_element_op_{a_element_op},
|
||||
b_element_op_{b_element_op},
|
||||
c_element_op_{c_element_op},
|
||||
d0_reduce_op_{d0_reduce_op},
|
||||
d1_reduce_op_{d1_reduce_op}
|
||||
{
|
||||
if(GridwiseGemm::CheckValidity(
|
||||
a_grid_desc_ak0_m_ak1_, b_grid_desc_bk0_n_bk1_, c_grid_desc_m_n_))
|
||||
{
|
||||
c_grid_desc_mblock_mperblock_nblock_nperblock_ =
|
||||
GridwiseGemm::MakeCGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock(
|
||||
c_grid_desc_m_n_);
|
||||
|
||||
d_grid_desc_mblock_mperblock_ =
|
||||
GridwiseGemm::MakeDGridDescriptor_MBlock_MPerBlock(d_grid_desc_m_);
|
||||
|
||||
block_2_ctile_map_ = MakeBlock2CTileMap(BatchCount, c_grid_desc_m_n_, 1, 1);
|
||||
}
|
||||
}
|
||||
|
||||
// private:
|
||||
const ADataType* p_a_grid_;
|
||||
const BDataType* p_b_grid_;
|
||||
CDataType* p_c_grid_;
|
||||
DDataType* p_d0_grid_;
|
||||
DDataType* p_d1_grid_;
|
||||
index_t BatchCount_;
|
||||
AGridDesc_AK0_M_AK1 a_grid_desc_ak0_m_ak1_;
|
||||
BGridDesc_BK0_N_BK1 b_grid_desc_bk0_n_bk1_;
|
||||
CGridDesc_M_N c_grid_desc_m_n_;
|
||||
DGridDesc_M d_grid_desc_m_;
|
||||
typename GridwiseGemm::CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock
|
||||
c_grid_desc_mblock_mperblock_nblock_nperblock_;
|
||||
typename GridwiseGemm::DGridDescriptor_MBlock_MPerBlock d_grid_desc_mblock_mperblock_;
|
||||
ComputeBasePtrOfStridedBatch compute_base_ptr_of_batch_;
|
||||
Block2CTileMap block_2_ctile_map_;
|
||||
AElementwiseOperation a_element_op_;
|
||||
BElementwiseOperation b_element_op_;
|
||||
CElementwiseOperation c_element_op_;
|
||||
D0ReduceOperation d0_reduce_op_;
|
||||
D1ReduceOperation d1_reduce_op_;
|
||||
};
|
||||
|
||||
// Invoker
|
||||
struct Invoker : public BaseInvoker
|
||||
{
|
||||
using Argument = DeviceOp::Argument;
|
||||
|
||||
float Run(const Argument& arg, int /* nrepeat */ = 1)
|
||||
{
|
||||
#if 0
|
||||
{
|
||||
std::cout << "arg.BatchCount_ = " << arg.BatchCount_ << std::endl;
|
||||
|
||||
std::cout << "arg.a_grid_desc_ak0_m_ak1_{"
|
||||
<< arg.a_grid_desc_ak0_m_ak1_.GetLength(I0) << ", "
|
||||
<< arg.a_grid_desc_ak0_m_ak1_.GetLength(I1) << ", "
|
||||
<< arg.a_grid_desc_ak0_m_ak1_.GetLength(I2) << "}" << std::endl;
|
||||
|
||||
std::cout << "arg.b_grid_desc_bk0_n_bk1_{"
|
||||
<< arg.b_grid_desc_bk0_n_bk1_.GetLength(I0) << ", "
|
||||
<< arg.b_grid_desc_bk0_n_bk1_.GetLength(I1) << ", "
|
||||
<< arg.b_grid_desc_bk0_n_bk1_.GetLength(I2) << "}" << std::endl;
|
||||
|
||||
std::cout << "arg.c_grid_desc_m_n_{ " << arg.c_grid_desc_m_n_.GetLength(I0) << ", "
|
||||
<< arg.c_grid_desc_m_n_.GetLength(I1) << "}" << std::endl;
|
||||
|
||||
std::cout << "arg.d_grid_desc_m_{ " << arg.d_grid_desc_m_.GetLength(I0) << "}"
|
||||
<< std::endl;
|
||||
}
|
||||
#endif
|
||||
|
||||
if(!GridwiseGemm::CheckValidity(
|
||||
arg.a_grid_desc_ak0_m_ak1_, arg.b_grid_desc_bk0_n_bk1_, arg.c_grid_desc_m_n_))
|
||||
{
|
||||
throw std::runtime_error("wrong! GridwiseGemm has invalid setting");
|
||||
}
|
||||
|
||||
const index_t grid_size =
|
||||
GridwiseGemm::CalculateGridSize(arg.c_grid_desc_m_n_) * arg.BatchCount_;
|
||||
|
||||
const auto K0 = arg.a_grid_desc_ak0_m_ak1_.GetLength(I0);
|
||||
|
||||
const bool has_main_k0_block_loop = GridwiseGemm::CalculateHasMainK0BlockLoop(K0);
|
||||
|
||||
if(has_main_k0_block_loop)
|
||||
{
|
||||
const auto kernel = kernel_batched_gemm_reduce_xdl_cshuffle_v1<
|
||||
GridwiseGemm,
|
||||
ADataType, // TODO: distiguish A/B datatype
|
||||
CDataType,
|
||||
DDataType,
|
||||
AElementwiseOperation,
|
||||
BElementwiseOperation,
|
||||
CElementwiseOperation,
|
||||
D0ReduceOperation,
|
||||
D1ReduceOperation,
|
||||
DeviceOp::AGridDesc_AK0_M_AK1,
|
||||
DeviceOp::BGridDesc_BK0_N_BK1,
|
||||
typename GridwiseGemm::CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock,
|
||||
typename GridwiseGemm::DGridDescriptor_MBlock_MPerBlock,
|
||||
ComputeBasePtrOfStridedBatch,
|
||||
remove_reference_t<Block2CTileMap>,
|
||||
true>;
|
||||
|
||||
launch_kernel(kernel,
|
||||
dim3(grid_size),
|
||||
dim3(BlockSize),
|
||||
0,
|
||||
arg.p_a_grid_,
|
||||
arg.p_b_grid_,
|
||||
arg.p_c_grid_,
|
||||
arg.p_d0_grid_,
|
||||
arg.p_d1_grid_,
|
||||
arg.BatchCount_,
|
||||
arg.a_element_op_,
|
||||
arg.b_element_op_,
|
||||
arg.c_element_op_,
|
||||
arg.d0_reduce_op_,
|
||||
arg.d1_reduce_op_,
|
||||
arg.a_grid_desc_ak0_m_ak1_,
|
||||
arg.b_grid_desc_bk0_n_bk1_,
|
||||
arg.c_grid_desc_mblock_mperblock_nblock_nperblock_,
|
||||
arg.d_grid_desc_mblock_mperblock_,
|
||||
arg.compute_base_ptr_of_batch_,
|
||||
arg.block_2_ctile_map_);
|
||||
}
|
||||
else
|
||||
{
|
||||
const auto kernel = kernel_batched_gemm_reduce_xdl_cshuffle_v1<
|
||||
GridwiseGemm,
|
||||
ADataType, // TODO: distiguish A/B datatype
|
||||
CDataType,
|
||||
DDataType,
|
||||
AElementwiseOperation,
|
||||
BElementwiseOperation,
|
||||
CElementwiseOperation,
|
||||
D0ReduceOperation,
|
||||
D1ReduceOperation,
|
||||
DeviceOp::AGridDesc_AK0_M_AK1,
|
||||
DeviceOp::BGridDesc_BK0_N_BK1,
|
||||
typename GridwiseGemm::CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock,
|
||||
typename GridwiseGemm::DGridDescriptor_MBlock_MPerBlock,
|
||||
ComputeBasePtrOfStridedBatch,
|
||||
remove_reference_t<Block2CTileMap>,
|
||||
false>;
|
||||
|
||||
launch_kernel(kernel,
|
||||
dim3(grid_size),
|
||||
dim3(BlockSize),
|
||||
0,
|
||||
arg.p_a_grid_,
|
||||
arg.p_b_grid_,
|
||||
arg.p_c_grid_,
|
||||
arg.p_d0_grid_,
|
||||
arg.p_d1_grid_,
|
||||
arg.BatchCount_,
|
||||
arg.a_element_op_,
|
||||
arg.b_element_op_,
|
||||
arg.c_element_op_,
|
||||
arg.d0_reduce_op_,
|
||||
arg.d1_reduce_op_,
|
||||
arg.a_grid_desc_ak0_m_ak1_,
|
||||
arg.b_grid_desc_bk0_n_bk1_,
|
||||
arg.c_grid_desc_mblock_mperblock_nblock_nperblock_,
|
||||
arg.d_grid_desc_mblock_mperblock_,
|
||||
arg.compute_base_ptr_of_batch_,
|
||||
arg.block_2_ctile_map_);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// polymorphic
|
||||
float Run(const BaseArgument* p_arg, int nrepeat = 1) override
|
||||
{
|
||||
return Run(*dynamic_cast<const Argument*>(p_arg), nrepeat);
|
||||
}
|
||||
};
|
||||
|
||||
static constexpr bool IsValidCompilationParameter()
|
||||
{
|
||||
// TODO: properly implement this check
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool IsSupportedArgument(const Argument& arg)
|
||||
{
|
||||
return GridwiseGemm::CheckValidity(
|
||||
arg.a_grid_desc_ak0_m_ak1_, arg.b_grid_desc_bk0_n_bk1_, arg.c_grid_desc_m_n_);
|
||||
}
|
||||
|
||||
// polymorphic
|
||||
bool IsSupportedArgument(const BaseArgument* p_arg) override
|
||||
{
|
||||
auto casted_p_arg = dynamic_cast<const Argument*>(p_arg);
|
||||
if(casted_p_arg == nullptr)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
else
|
||||
{
|
||||
return IsSupportedArgument(*casted_p_arg);
|
||||
}
|
||||
}
|
||||
|
||||
static auto MakeArgument(const ADataType* p_a,
|
||||
const BDataType* p_b,
|
||||
CDataType* p_c,
|
||||
DDataType* p_d0,
|
||||
DDataType* p_d1,
|
||||
index_t MRaw,
|
||||
index_t NRaw,
|
||||
index_t KRaw,
|
||||
index_t StrideA,
|
||||
index_t StrideB,
|
||||
index_t StrideC,
|
||||
AElementwiseOperation a_element_op,
|
||||
BElementwiseOperation b_element_op,
|
||||
CElementwiseOperation c_element_op,
|
||||
D0ReduceOperation d0_reduce_op,
|
||||
D1ReduceOperation d1_reduce_op,
|
||||
index_t BatchCount)
|
||||
{
|
||||
return Argument{p_a,
|
||||
p_b,
|
||||
p_c,
|
||||
p_d0,
|
||||
p_d1,
|
||||
MRaw,
|
||||
NRaw,
|
||||
KRaw,
|
||||
StrideA,
|
||||
StrideB,
|
||||
StrideC,
|
||||
a_element_op,
|
||||
b_element_op,
|
||||
c_element_op,
|
||||
d0_reduce_op,
|
||||
d1_reduce_op,
|
||||
BatchCount};
|
||||
}
|
||||
|
||||
static auto MakeInvoker() { return Invoker{}; }
|
||||
|
||||
// polymorphic
|
||||
std::unique_ptr<BaseArgument> MakeArgumentPointer(const void* p_a,
|
||||
const void* p_b,
|
||||
void* p_c,
|
||||
void* p_d0,
|
||||
void* p_d1,
|
||||
index_t MRaw,
|
||||
index_t NRaw,
|
||||
index_t KRaw,
|
||||
index_t StrideA,
|
||||
index_t StrideB,
|
||||
index_t StrideC,
|
||||
AElementwiseOperation a_element_op,
|
||||
BElementwiseOperation b_element_op,
|
||||
CElementwiseOperation c_element_op,
|
||||
D0ReduceOperation d0_reduce_op,
|
||||
D1ReduceOperation d1_reduce_op,
|
||||
index_t BatchCount) override
|
||||
{
|
||||
return std::make_unique<Argument>(static_cast<const ADataType*>(p_a),
|
||||
static_cast<const BDataType*>(p_b),
|
||||
static_cast<CDataType*>(p_c),
|
||||
static_cast<DDataType*>(p_d0),
|
||||
static_cast<DDataType*>(p_d1),
|
||||
MRaw,
|
||||
NRaw,
|
||||
KRaw,
|
||||
StrideA,
|
||||
StrideB,
|
||||
StrideC,
|
||||
a_element_op,
|
||||
b_element_op,
|
||||
c_element_op,
|
||||
d0_reduce_op,
|
||||
d1_reduce_op,
|
||||
BatchCount);
|
||||
}
|
||||
|
||||
// polymorphic
|
||||
std::unique_ptr<BaseInvoker> MakeInvokerPointer() override
|
||||
{
|
||||
return std::make_unique<Invoker>(Invoker{});
|
||||
}
|
||||
|
||||
// polymorphic
|
||||
std::string GetTypeString() const override
|
||||
{
|
||||
auto str = std::stringstream();
|
||||
|
||||
// clang-format off
|
||||
str << "DeviceBatchedGemmReduce_Xdl_CShuffle"
|
||||
<< "<"
|
||||
<< BlockSize << ", "
|
||||
<< MPerBlock << ", "
|
||||
<< NPerBlock << ", "
|
||||
<< KPerBlock << ", "
|
||||
<< AK1 << ", "
|
||||
<< BK1
|
||||
<< ">";
|
||||
// clang-format on
|
||||
|
||||
return str.str();
|
||||
}
|
||||
};
|
||||
|
||||
} // namespace device
|
||||
} // namespace tensor_operation
|
||||
} // namespace ck
|
||||
@@ -36,7 +36,7 @@ __global__ void
|
||||
const FloatAB* __restrict__ p_a_grid,
|
||||
const FloatAB* __restrict__ p_b_grid,
|
||||
FloatC* __restrict__ p_c_grid,
|
||||
const index_t num_batches,
|
||||
const index_t batch_count,
|
||||
const AGridDesc_K0_M_K1 a_grid_desc_k0_m_k1,
|
||||
const BGridDesc_K0_N_K1 b_grid_desc_k0_n_k1,
|
||||
const CGridDesc_M0_N0_M1_N1_M2_M3_M4_N2 c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2,
|
||||
@@ -47,7 +47,7 @@ __global__ void
|
||||
const Block2CTileMap block_2_ctile_map)
|
||||
{
|
||||
const index_t num_blocks_per_batch =
|
||||
__builtin_amdgcn_readfirstlane(get_grid_size() / num_batches);
|
||||
__builtin_amdgcn_readfirstlane(get_grid_size() / batch_count);
|
||||
const index_t g_idx = __builtin_amdgcn_readfirstlane(get_block_1d_id() / num_blocks_per_batch);
|
||||
|
||||
const long_index_t a_batch_offset = __builtin_amdgcn_readfirstlane(
|
||||
@@ -203,49 +203,43 @@ struct DeviceBatchedGemmXdl
|
||||
using BGridDesc_K0_N_K1 = decltype(MakeBGridDescriptor_K0_N_K1(1, 1, 1));
|
||||
using CGridDesc_M_N = decltype(MakeCGridDescriptor_M_N(1, 1, 1));
|
||||
|
||||
struct Block2CTileMapMaker
|
||||
static constexpr auto MakeBlock2CTileMap(index_t batch_count,
|
||||
const CGridDesc_M_N& c_grid_desc_m_n,
|
||||
index_t M01,
|
||||
index_t N01)
|
||||
{
|
||||
Block2CTileMapMaker(index_t num_batches) : num_batches_(num_batches) {}
|
||||
const auto M = c_grid_desc_m_n.GetLength(I0);
|
||||
const auto N = c_grid_desc_m_n.GetLength(I1);
|
||||
|
||||
__host__ __device__ constexpr auto
|
||||
MakeBlock2CTileMap(const CGridDesc_M_N& c_grid_desc_m_n, index_t M01, index_t N01)
|
||||
{
|
||||
const auto M = c_grid_desc_m_n.GetLength(I0);
|
||||
const auto N = c_grid_desc_m_n.GetLength(I1);
|
||||
constexpr auto M1 = Number<MPerBlock>{};
|
||||
constexpr auto N1 = Number<NPerBlock>{};
|
||||
|
||||
constexpr auto M1 = Number<MPerBlock>{};
|
||||
constexpr auto N1 = Number<NPerBlock>{};
|
||||
const auto M0 = M / M1;
|
||||
const auto N0 = N / N1;
|
||||
|
||||
const auto M0 = M / M1;
|
||||
const auto N0 = N / N1;
|
||||
const auto M00 = M0 / M01;
|
||||
const auto N00 = N0 / N01;
|
||||
|
||||
const auto M00 = M0 / M01;
|
||||
const auto N00 = N0 / N01;
|
||||
const auto g_m00_m01_n00_n01_to_m0_n0_block_cluster_adaptor =
|
||||
make_single_stage_tensor_adaptor(
|
||||
make_tuple(make_insert_transform(batch_count),
|
||||
make_unmerge_transform(make_tuple(M00, M01)),
|
||||
make_unmerge_transform(make_tuple(N00, N01))),
|
||||
make_tuple(Sequence<>{}, Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1, 3>{}, Sequence<2, 4>{}));
|
||||
|
||||
const auto g_m00_m01_n00_n01_to_m0_n0_block_cluster_adaptor =
|
||||
make_single_stage_tensor_adaptor(
|
||||
make_tuple(make_insert_transform(num_batches_),
|
||||
make_unmerge_transform(make_tuple(M00, M01)),
|
||||
make_unmerge_transform(make_tuple(N00, N01))),
|
||||
make_tuple(Sequence<>{}, Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1, 3>{}, Sequence<2, 4>{}));
|
||||
const auto globalblockid_to_m00_m01_n00_n01_block_cluster_adaptor =
|
||||
make_single_stage_tensor_adaptor(
|
||||
make_tuple(make_merge_transform(make_tuple(batch_count, M00, N00, M01, N01))),
|
||||
make_tuple(Sequence<0, 1, 2, 3, 4>{}),
|
||||
make_tuple(Sequence<0>{}));
|
||||
|
||||
const auto globalblockid_to_m00_m01_n00_n01_block_cluster_adaptor =
|
||||
make_single_stage_tensor_adaptor(
|
||||
make_tuple(make_merge_transform(make_tuple(num_batches_, M00, N00, M01, N01))),
|
||||
make_tuple(Sequence<0, 1, 2, 3, 4>{}),
|
||||
make_tuple(Sequence<0>{}));
|
||||
const auto globalblockid_to_m0_n0_block_cluster_adaptor =
|
||||
chain_tensor_adaptors(g_m00_m01_n00_n01_to_m0_n0_block_cluster_adaptor,
|
||||
globalblockid_to_m00_m01_n00_n01_block_cluster_adaptor);
|
||||
|
||||
const auto globalblockid_to_m0_n0_block_cluster_adaptor =
|
||||
chain_tensor_adaptors(g_m00_m01_n00_n01_to_m0_n0_block_cluster_adaptor,
|
||||
globalblockid_to_m00_m01_n00_n01_block_cluster_adaptor);
|
||||
|
||||
return globalblockid_to_m0_n0_block_cluster_adaptor;
|
||||
}
|
||||
|
||||
private:
|
||||
index_t num_batches_;
|
||||
};
|
||||
return globalblockid_to_m0_n0_block_cluster_adaptor;
|
||||
}
|
||||
|
||||
struct ComputeBasePtrOfStridedBatch
|
||||
{
|
||||
@@ -320,8 +314,7 @@ struct DeviceBatchedGemmXdl
|
||||
|
||||
using CGridDesc_M0_N0_M1_N1_M2_M3_M4_N2 =
|
||||
decltype(GridwiseGemm::MakeCGridDescriptor_M0_N0_M1_N1_M2_M3_M4_N2(CGridDesc_M_N{}));
|
||||
using Block2CTileMap =
|
||||
decltype(Block2CTileMapMaker{1}.MakeBlock2CTileMap(CGridDesc_M_N{}, 1, 1));
|
||||
using Block2CTileMap = decltype(MakeBlock2CTileMap(1, CGridDesc_M_N{}, 1, 1));
|
||||
|
||||
// Argument
|
||||
struct Argument : public BaseArgument
|
||||
@@ -367,8 +360,7 @@ struct DeviceBatchedGemmXdl
|
||||
c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2_ =
|
||||
GridwiseGemm::MakeCGridDescriptor_M0_N0_M1_N1_M2_M3_M4_N2(c_grid_desc_m_n_);
|
||||
|
||||
block_2_ctile_map_ =
|
||||
Block2CTileMapMaker{BatchCount}.MakeBlock2CTileMap(c_grid_desc_m_n_, M01, N01);
|
||||
block_2_ctile_map_ = MakeBlock2CTileMap(BatchCount, c_grid_desc_m_n_, M01, N01);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -28,7 +28,8 @@ struct DeviceGemmReduce : public BaseOperator
|
||||
BElementwiseOperation b_element_op,
|
||||
CElementwiseOperation c_element_op,
|
||||
D0ReduceOperation d0_reduce_op,
|
||||
D1ReduceOperation d1_reduce_op) = 0;
|
||||
D1ReduceOperation d1_reduce_op,
|
||||
ck::index_t BatchCount = 1) = 0;
|
||||
|
||||
virtual std::unique_ptr<BaseInvoker> MakeInvokerPointer() = 0;
|
||||
};
|
||||
|
||||
@@ -694,7 +694,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
|
||||
BElementwiseOperation b_element_op,
|
||||
CElementwiseOperation c_element_op,
|
||||
D0ReduceOperation d0_reduce_op,
|
||||
D1ReduceOperation d1_reduce_op) override
|
||||
D1ReduceOperation d1_reduce_op,
|
||||
index_t /* KBatch */ = 1) override
|
||||
{
|
||||
return std::make_unique<Argument>(static_cast<const ADataType*>(p_a),
|
||||
static_cast<const BDataType*>(p_b),
|
||||
|
||||
Reference in New Issue
Block a user