mirror of
https://github.com/ROCm/composable_kernel.git
synced 2026-05-19 04:19:36 +00:00
Support broadcast for bias in grouped conv fwd (#1081)
* Support broadcast for bias in grouped conv fwd
* Fix comment
* Comment fixes
* Remove GK layout
[ROCm/composable_kernel commit: f836984891]
This commit is contained in:
@@ -42,6 +42,8 @@ foreach(gpu IN LISTS GPU_TARGETS)
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# ScaleAdd ScaleAdd Relu
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add_example_executable(example_convnd_fwd_xdl_scaleadd_scaleadd_relu_fp16 convnd_fwd_xdl_scaleadd_scaleadd_relu_fp16.cpp)
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add_example_dependencies(example_convnd_fwd_activ_xdl example_convnd_fwd_xdl_scaleadd_scaleadd_relu_fp16)
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add_example_executable(example_convnd_fwd_xdl_scaleadd_scaleadd_relu_bcasted_bias_fp16 convnd_fwd_xdl_scaleadd_scaleadd_relu_bcasted_bias_fp16.cpp)
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add_example_dependencies(example_convnd_fwd_activ_xdl example_convnd_fwd_xdl_scaleadd_scaleadd_relu_bcasted_bias_fp16)
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set(target 1)
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endif()
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endforeach()
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@@ -0,0 +1,294 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
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#include <algorithm>
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#include <cstdlib>
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#include <iostream>
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#include <numeric>
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#include <type_traits>
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#include "ck/ck.hpp"
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#include "ck/tensor_operation/gpu/device/tensor_layout.hpp"
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#include "ck/tensor_operation/gpu/element/element_wise_operation.hpp"
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#include "ck/tensor_operation/gpu/device/impl/device_grouped_conv_fwd_multiple_abd_xdl_cshuffle.hpp"
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#include "ck/library/utility/algorithm.hpp"
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#include "ck/library/utility/check_err.hpp"
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#include "ck/library/utility/device_memory.hpp"
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#include "ck/library/utility/host_tensor.hpp"
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#include "ck/library/utility/host_tensor_generator.hpp"
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#include "ck/library/utility/convolution_parameter.hpp"
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#include "ck/library/utility/convolution_host_tensor_descriptor_helper.hpp"
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#include "ck/library/reference_tensor_operation/cpu/reference_conv_fwd.hpp"
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#include "ck/library/utility/convolution_host_tensor_descriptor_helper.hpp"
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constexpr ck::index_t NDimSpatial = 3;
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using InDataType = ck::half_t;
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using WeiDataType = ck::half_t;
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using AccDataType = float;
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using CShuffleDataType = ck::half_t;
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using OutDataType = ck::half_t;
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template <ck::index_t... Is>
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using S = ck::Sequence<Is...>;
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using InLayout = ck::tensor_layout::convolution::NDHWGC;
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using WeiLayout = ck::tensor_layout::convolution::GKZYXC;
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using OutLayout = ck::tensor_layout::convolution::NDHWGK;
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using BiasLayout = ck::tensor_layout::convolution::G_K;
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using InElementOp = ck::tensor_operation::element_wise::PassThrough;
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using WeiElementOp = ck::tensor_operation::element_wise::PassThrough;
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using OutElementOp = ck::tensor_operation::element_wise::ScaleAddScaleAddRelu;
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static constexpr auto ConvSpec =
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ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
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static constexpr auto GemmSpec = ck::tensor_operation::device::GemmSpecialization::MNKPadding;
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template <typename OutElementOp>
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using DeviceGroupedConvNDFwdInstance =
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ck::tensor_operation::device::DeviceGroupedConvFwdMultipleABD_Xdl_CShuffle<
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NDimSpatial,
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InLayout,
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WeiLayout,
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ck::Tuple<OutLayout, BiasLayout>,
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OutLayout,
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InDataType,
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WeiDataType,
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AccDataType,
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CShuffleDataType,
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ck::Tuple<OutDataType, OutDataType>,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp,
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ConvSpec, // ConvForwardSpecialization
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GemmSpec, // GemmSpecialization
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1, //
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256, // BlockSize
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128, // MPerBlock
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256, // NPerBlock
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32, // KPerBlock
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8, // AK1
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8, // BK1
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32, // MPerXdl
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32, // NPerXdl
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2, // MXdlPerWave
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4, // NXdlPerWave
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S<4, 64, 1>, // ABlockTransferThreadClusterLengths_AK0_M_AK1
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S<1, 0, 2>, // ABlockTransferThreadClusterArrangeOrder
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S<1, 0, 2>, // ABlockTransferSrcAccessOrder
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2, // ABlockTransferSrcVectorDim
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8, // ABlockTransferSrcScalarPerVector
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8, // ABlockTransferDstScalarPerVector_AK1
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1, // ABlockLdsExtraM
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S<4, 64, 1>, // BBlockTransferThreadClusterLengths_BK0_N_BK1
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S<1, 0, 2>, // BBlockTransferThreadClusterArrangeOrder
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S<1, 0, 2>, // BBlockTransferSrcAccessOrder
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2, // BBlockTransferSrcVectorDim
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8, // BBlockTransferSrcScalarPerVector
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8, // BBlockTransferDstScalarPerVector_BK1
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1, // BBlockLdsExtraN
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1,
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1,
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S<1, 32, 1, 8>,
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8>;
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using DeviceGroupedConvNDFwdActivInstance = DeviceGroupedConvNDFwdInstance<OutElementOp>;
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namespace {
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// Use custom implementation to pass two more tensors for post op
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template <ck::index_t NDimSpatial,
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typename InDataType,
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typename WeiDataType,
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typename OutDataType,
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typename InElementOp,
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typename WeiElementOp,
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typename OutElementOp,
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typename DeviceConvNDFwdInstance>
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bool run_grouped_conv_fwd(bool do_verification,
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int init_method,
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bool time_kernel,
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const ck::utils::conv::ConvParam& conv_param,
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const HostTensorDescriptor& in_g_n_c_wis_desc,
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const HostTensorDescriptor& wei_g_k_c_xs_desc,
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const HostTensorDescriptor& out_g_n_k_wos_desc,
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const InElementOp& in_element_op,
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const WeiElementOp& wei_element_op,
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const OutElementOp& out_element_op)
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{
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constexpr ck::index_t NumDs = 2;
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const ck::index_t G = out_g_n_k_wos_desc.GetLengths()[0];
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const ck::index_t K = out_g_n_k_wos_desc.GetLengths()[2];
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// Logical broadcast bias (we have to pass bias lengths in the same format as output - GNKDHW)
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std::array<ck::index_t, NDimSpatial + 3> bias_g_k_lengths;
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std::array<ck::index_t, NDimSpatial + 3> bias_g_k_strides;
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// Fill other lenghts than G,K with 1 and strides with 0
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bias_g_k_lengths.fill(1);
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bias_g_k_strides.fill(0);
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bias_g_k_lengths[0] = G;
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bias_g_k_lengths[2] = K;
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bias_g_k_strides[0] = K; // stride to G
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bias_g_k_strides[2] = 1; // stride to K
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const auto broadcasted_bias_desc = HostTensorDescriptor(bias_g_k_lengths, bias_g_k_strides);
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// y = relu ( alpha1 * conv(x) + alpha2 * z + bias )
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Tensor<InDataType> in(in_g_n_c_wis_desc);
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Tensor<WeiDataType> wei(wei_g_k_c_xs_desc);
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Tensor<OutDataType> out_host(out_g_n_k_wos_desc);
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Tensor<OutDataType> out_device(out_g_n_k_wos_desc);
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std::array<Tensor<OutDataType>, NumDs> d_tensors = {Tensor<OutDataType>(out_g_n_k_wos_desc),
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Tensor<OutDataType>(broadcasted_bias_desc)};
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std::cout << "in: " << in.mDesc << std::endl;
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std::cout << "wei: " << wei.mDesc << std::endl;
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std::cout << "out: " << out_host.mDesc << std::endl;
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std::cout << "z_tensor: " << d_tensors[0].mDesc << std::endl;
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std::cout << "bias_tensor: " << d_tensors[1].mDesc << std::endl;
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// Make sure that we allocated only G * K values for bias
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assert(static_cast<ck::index_t>(d_tensors[1].mData.size()) == G * K);
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switch(init_method)
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{
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case 0: break;
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case 1:
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in.GenerateTensorValue(GeneratorTensor_2<InDataType>{-2, 2});
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wei.GenerateTensorValue(GeneratorTensor_2<WeiDataType>{-2, 2});
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d_tensors[0].GenerateTensorValue(GeneratorTensor_2<OutDataType>{-2, 2});
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d_tensors[1].GenerateTensorValue(GeneratorTensor_2<OutDataType>{-2, 2});
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break;
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default:
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in.GenerateTensorValue(GeneratorTensor_3<InDataType>{-1.0, 1.0});
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wei.GenerateTensorValue(GeneratorTensor_3<WeiDataType>{-0.05, 0.05});
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d_tensors[0].GenerateTensorValue(GeneratorTensor_3<OutDataType>{-0.05, 0.05});
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d_tensors[1].GenerateTensorValue(GeneratorTensor_3<OutDataType>{-0.05, 0.05});
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}
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DeviceMem in_device_buf(sizeof(InDataType) * in.mDesc.GetElementSpaceSize());
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DeviceMem wei_device_buf(sizeof(WeiDataType) * wei.mDesc.GetElementSpaceSize());
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DeviceMem z_buf(sizeof(OutDataType) * d_tensors[0].mDesc.GetElementSpaceSize());
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DeviceMem bias_buf(sizeof(OutDataType) * d_tensors[1].mDesc.GetElementSpaceSize());
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DeviceMem out_device_buf(sizeof(OutDataType) * out_device.mDesc.GetElementSpaceSize());
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in_device_buf.ToDevice(in.mData.data());
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wei_device_buf.ToDevice(wei.mData.data());
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z_buf.ToDevice(d_tensors[0].mData.data());
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bias_buf.ToDevice(d_tensors[1].mData.data());
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std::array<ck::index_t, NDimSpatial + 3> a_g_n_c_wis_lengths{};
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std::array<ck::index_t, NDimSpatial + 3> a_g_n_c_wis_strides{};
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std::array<ck::index_t, NDimSpatial + 3> b_g_k_c_xs_lengths{};
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std::array<ck::index_t, NDimSpatial + 3> b_g_k_c_xs_strides{};
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std::array<ck::index_t, NDimSpatial + 3> e_g_n_k_wos_lengths{};
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std::array<ck::index_t, NDimSpatial + 3> e_g_n_k_wos_strides{};
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std::array<ck::index_t, NDimSpatial> conv_filter_strides{};
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std::array<ck::index_t, NDimSpatial> conv_filter_dilations{};
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std::array<ck::index_t, NDimSpatial> input_left_pads{};
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std::array<ck::index_t, NDimSpatial> input_right_pads{};
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auto copy = [](const auto& x, auto& y) { ck::ranges::copy(x, y.begin()); };
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copy(in_g_n_c_wis_desc.GetLengths(), a_g_n_c_wis_lengths);
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copy(in_g_n_c_wis_desc.GetStrides(), a_g_n_c_wis_strides);
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copy(wei_g_k_c_xs_desc.GetLengths(), b_g_k_c_xs_lengths);
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copy(wei_g_k_c_xs_desc.GetStrides(), b_g_k_c_xs_strides);
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copy(out_g_n_k_wos_desc.GetLengths(), e_g_n_k_wos_lengths);
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copy(out_g_n_k_wos_desc.GetStrides(), e_g_n_k_wos_strides);
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copy(conv_param.conv_filter_strides_, conv_filter_strides);
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copy(conv_param.conv_filter_dilations_, conv_filter_dilations);
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copy(conv_param.input_left_pads_, input_left_pads);
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copy(conv_param.input_right_pads_, input_right_pads);
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const std::array<const void*, NumDs> ds = {z_buf.GetDeviceBuffer(), bias_buf.GetDeviceBuffer()};
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auto conv = DeviceConvNDFwdInstance{};
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auto invoker = conv.MakeInvoker();
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auto argument = conv.MakeArgument(in_device_buf.GetDeviceBuffer(),
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wei_device_buf.GetDeviceBuffer(),
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ds,
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out_device_buf.GetDeviceBuffer(),
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a_g_n_c_wis_lengths,
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a_g_n_c_wis_strides,
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b_g_k_c_xs_lengths,
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b_g_k_c_xs_strides,
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std::array<std::array<ck::index_t, NDimSpatial + 3>, NumDs>{
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e_g_n_k_wos_lengths, bias_g_k_lengths},
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std::array<std::array<ck::index_t, NDimSpatial + 3>, NumDs>{
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e_g_n_k_wos_strides, bias_g_k_strides},
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e_g_n_k_wos_lengths,
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e_g_n_k_wos_strides,
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conv_filter_strides,
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conv_filter_dilations,
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input_left_pads,
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input_right_pads,
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in_element_op,
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wei_element_op,
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out_element_op);
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if(!conv.IsSupportedArgument(argument))
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{
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throw std::runtime_error("The device op with the specified compilation parameters does "
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"not support this convolution problem.");
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}
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float avg_time = invoker.Run(argument, StreamConfig{nullptr, time_kernel});
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std::size_t flop = conv_param.GetFlops() + G * K +
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conv_param.GetOutputByte<OutDataType>() / sizeof(OutDataType);
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std::size_t num_btype = conv_param.GetByte<InDataType, WeiDataType, OutDataType>() +
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G * K * sizeof(OutDataType) + conv_param.GetOutputByte<OutDataType>();
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float tflops = static_cast<float>(flop) / 1.E9 / avg_time;
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float gb_per_sec = num_btype / 1.E6 / avg_time;
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std::cout << "Perf: " << avg_time << " ms, " << tflops << " TFlops, " << gb_per_sec << " GB/s, "
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<< conv.GetTypeString() << std::endl;
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if(do_verification)
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{
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auto ref_conv =
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ck::tensor_operation::host::ReferenceConvFwd<NDimSpatial,
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InDataType,
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WeiDataType,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp,
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0, /*Num A Elementwise Tensors*/
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0, /*Num B Elementwise Tensors*/
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NumDs>();
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auto ref_invoker = ref_conv.MakeInvoker();
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auto ref_argument = ref_conv.MakeArgument(in,
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wei,
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out_host,
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conv_param.conv_filter_strides_,
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conv_param.conv_filter_dilations_,
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conv_param.input_left_pads_,
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conv_param.input_right_pads_,
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in_element_op,
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wei_element_op,
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out_element_op,
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{},
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{},
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d_tensors);
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ref_invoker.Run(ref_argument);
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out_device_buf.FromDevice(out_device.mData.data());
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return ck::utils::check_err(out_device, out_host, "Error: incorrect results!");
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}
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return true;
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}
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} // namespace
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#include "run_convnd_fwd_activ_example.inc"
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int main(int argc, char* argv[]) { return !run_convnd_fwd_example(argc, argv); }
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@@ -24,7 +24,7 @@ bool run_convnd_fwd_example(int argc, char* argv[])
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// Following shapes are selected to avoid overflow. Expect inf in case of
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// size increase for some elementwise ops.
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ck::utils::conv::ConvParam conv_param{
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3, 1, 16, 128, 8, {3, 3, 3}, {17, 17, 17}, {2, 2, 2}, {1, 1, 1}, {1, 1, 1}, {1, 1, 1}};
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3, 2, 16, 128, 8, {3, 3, 3}, {17, 17, 17}, {2, 2, 2}, {1, 1, 1}, {1, 1, 1}, {1, 1, 1}};
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if(argc == 1)
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{
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