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adap gemm_mx_kernel.hpp from flatmm, comment changes needed to mx pipeline from flatmm
This commit is contained in:
381
include/ck_tile/ops/gemm_mx/kernel/gemm_mx_kernel.hpp
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381
include/ck_tile/ops/gemm_mx/kernel/gemm_mx_kernel.hpp
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@@ -0,0 +1,381 @@
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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
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// SPDX-License-Identifier: MIT
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#pragma once
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#include <iostream>
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#include <string>
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#include "ck_tile/core.hpp"
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#include "ck_tile/ops/common.hpp"
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#include "ck_tile/ops/gemm/kernel/universal_gemm_kernel.hpp"
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namespace ck_tile {
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template <typename ScaleM = MXScalePointer<-1>, typename ScaleN = MXScalePointer<-1>, index_t NumATensor = 1, index_t NumBTensor = 1, index_t NumDTensor = 0>
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struct MXGemmKernelArgs : UniversalGemmKernelArgs<NumATensor, NumBTensor, NumDTensor>
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{
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using Base = UniversalGemmKernelArgs<NumATensor, NumBTensor, NumDTensor>;
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CK_TILE_HOST MXGemmKernelArgs(const std::array<const void*, NumATensor>& as_ptr_,
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const std::array<const void*, NumBTensor>& bs_ptr_,
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const std::array<const void*, NumDTensor>& ds_ptr_,
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void* e_ptr_,
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index_t k_batch_,
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index_t M_,
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index_t N_,
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index_t K_,
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const std::array<index_t, NumATensor>& stride_As_,
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const std::array<index_t, NumBTensor>& stride_Bs_,
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const std::array<index_t, NumDTensor>& stride_Ds_,
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index_t stride_E_)
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: Base(as_ptr_,
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bs_ptr_,
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ds_ptr_,
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e_ptr_,
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k_batch_,
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M_,
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N_,
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K_,
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stride_As_,
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stride_Bs_,
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stride_Ds_,
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stride_E_)
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{
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}
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};
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template <typename TilePartitioner_, typename MXGemmPipeline_, typename EpiloguePipeline_>
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struct MXGemmKernel : UniversalGemmKernel<TilePartitioner_, MXGemmPipeline_, EpiloguePipeline_>
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{
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using Underlying = UniversalGemmKernel<TilePartitioner_, MXGemmPipeline_, EpiloguePipeline_>;
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using TilePartitioner = remove_cvref_t<TilePartitioner_>;
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using MXGemmPipeline = remove_cvref_t<MXGemmPipeline_>;
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using BlockGemmShape =
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remove_cvref_t<typename MXGemmPipeline::BlockGemmShape>;
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using EpiloguePipeline = remove_cvref_t<EpiloguePipeline_>;
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using ALayout = remove_cvref_t<typename MXGemmPipeline::ALayout>;
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using BLayout = remove_cvref_t<typename MXGemmPipeline::BLayout>;
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using ELayout = remove_cvref_t<typename MXGemmPipeline::CLayout>;
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using DsLayout = remove_cvref_t<typename EpiloguePipeline::DsLayout>;
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using DsDataType = remove_cvref_t<typename EpiloguePipeline::DsDataType>;
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static constexpr index_t KernelBlockSize = MXGemmPipeline::BlockSize;
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static constexpr bool UsePersistentKernel = MXGemmPipeline::UsePersistentKernel;
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using ADataType = remove_cvref_t<typename MXGemmPipeline::ADataType>;
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using BDataType = remove_cvref_t<typename MXGemmPipeline::BDataType>;
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// Below type is actually accumulation data type - the output of block GEMM.
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using EDataType = remove_cvref_t<typename EpiloguePipeline::ODataType>;
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static constexpr auto I0 = number<0>();
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static constexpr auto I1 = number<1>();
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static constexpr auto I2 = number<2>();
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static constexpr auto I3 = number<3>();
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static constexpr auto I4 = number<4>();
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static constexpr auto I5 = number<5>();
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static constexpr index_t NumATensor = typename Underlying::AsDataType::size();
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static constexpr index_t NumBTensor = typename Underlying::BsDataType::size();
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static constexpr index_t NumDTensor = typename Underlying::DsDataType::size();
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using ADataType = remove_cvref_t<std::tuple_element_t<I0, AsDataType>>;
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using BDataType = remove_cvref_t<std::tuple_element_t<I0, BsDataType>>;
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static constexpr auto MThreadPerXdl = BlockGemmShape::WarpTile::at(number<0>{});
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static constexpr auto NThreadPerXdl = BlockGemmShape::WarpTile::at(number<1>{});
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static constexpr auto KThreadPerXdl = 64 / MThreadPerXdl;
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static constexpr auto APackedSize = numeric_traits<ADataType>::PackedSize;
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static constexpr auto BPackedSize = numeric_traits<BDataType>::PackedSize;
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static constexpr auto MXdlPack = MXGemmPipeline::MXdlPack;
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static constexpr auto NXdlPack = MXGemmPipeline::NXdlPack;
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static constexpr auto KXdlPack = MXGemmPipeline::KXdlPack;
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static_assert(DsLayout::size() == DsDataType::size(),
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"The size of DsLayout and DsDataType should be the same");
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[[nodiscard]] CK_TILE_HOST static const std::string GetName()
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{
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// clang-format off
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return concat('_', "mx_gemm", gemm_prec_str<ADataType, BDataType>, MXGemmPipeline::GetName());
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// clang-format on
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}
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template <typename ScaleM, typename ScaleN>
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using KernelArgs = MXGemmKernelArgs<ScaleM, ScaleN, NumATensor, NumBTensor, NumDTensor>;
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template <class ScaleM, class ScaleN>
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CK_TILE_HOST static constexpr auto
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GridSize(const KernelArgs<ScaleM, ScaleN>& kargs)
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{
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hipDeviceProp_t prop;
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int deviceId = 0; // default device
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int dync_smem_size = 0;
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int maxActiveBlocksPerCU = 0;
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if(hipGetDeviceProperties(&prop, deviceId) != hipSuccess)
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throw std::runtime_error(std::string("hipGetDeviceProperties failed: ") +
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hipGetErrorName(hipGetLastError()));
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if(hipOccupancyMaxActiveBlocksPerMultiprocessor(
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&maxActiveBlocksPerCU,
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reinterpret_cast<void*>(
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kentry<1, MXGemmKernel, remove_cvref_t<decltype(kargs)>>),
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KernelBlockSize,
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dync_smem_size) != hipSuccess)
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throw std::runtime_error(
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std::string("hipOccupancyMaxActiveBlocksPerMultiprocessor failed: ") +
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hipGetErrorName(hipGetLastError()));
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const int persistent_block_size = prop.multiProcessorCount * maxActiveBlocksPerCU;
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const int total_work_tile_cnt = TilePartitioner::GridSize(kargs.M, kargs.N);
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return dim3(min(persistent_block_size, total_work_tile_cnt), 1, 1);
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}
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using SplitKBatchOffset = typename Underlying::SplitKBatchOffset;
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template <memory_operation_enum DstInMemOp = memory_operation_enum::set, typename ScaleM, typename ScaleN>
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CK_TILE_DEVICE static auto
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MakeGemmTensorViews(const std::array<const ADataType*, NumATensor>& as_ptr,
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const std::array<const BDataType*, NumBTensor>& bs_ptr,
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const std::array<const void*, NumDTensor>& ds_ptr,
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EDataType* e_ptr,
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const KernelArgs<ScaleM, ScaleN>& kargs,
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const index_t k_size)
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{
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// Get tensor views from the UniversalGemmKernel
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const auto& gemm_tensor_views_tuple =
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Underlying::template MakeGemmTensorViews<DstInMemOp>(
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as_ptr, bs_ptr, ds_ptr, e_ptr, kargs, k_size);
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auto scale_a = kargs.scale_m_ptr;
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auto scale_b = kargs.scale_n_ptr;
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static constexpr int BlockScaleSize = 32; // decltype(scale_n)::GranularityK;
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const auto&& scale_packs_m = integer_divide_ceil(kargs.M, (MXdlPack * MThreadPerXdl));
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const auto&& scale_packs_n = integer_divide_ceil(kargs.N, (NXdlPack * NThreadPerXdl));
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const auto&& scale_packs_k = kargs.K / BlockScaleSize / (KXdlPack * KThreadPerXdl);
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// A scale tensor view
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const auto& scale_a_tensor_view = [&]() {
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// Pack 2x2 e8m0 over M/K dimension into 1 int32_t to trigger dword width load
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const auto scale_a_naive_desc = make_naive_tensor_descriptor_packed(
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make_tuple(scale_packs_m, scale_packs_k, KThreadPerXdl, MThreadPerXdl));
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const auto scale_a_desc = transform_tensor_descriptor(
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scale_a_naive_desc,
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make_tuple(make_merge_transform(make_tuple(scale_packs_m, MThreadPerXdl)),
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make_merge_transform(make_tuple(scale_packs_k, KThreadPerXdl))),
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make_tuple(sequence<0, 3>{}, sequence<1, 2>{}),
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make_tuple(sequence<0>{}, sequence<1>{}));
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return make_tensor_view<address_space_enum::global>(
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reinterpret_cast<const int32_t*>(scale_a.ptr), scale_a_desc);
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}();
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// B scale tensor view
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const auto& scale_b_tensor_view = [&]() {
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const auto scale_b_navie_desc = make_naive_tensor_descriptor_packed(
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make_tuple(scale_packs_n, scale_packs_k, KThreadPerXdl, NThreadPerXdl));
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const auto scale_b_desc = transform_tensor_descriptor(
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scale_b_navie_desc,
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make_tuple(make_merge_transform(make_tuple(scale_packs_n, NThreadPerXdl)),
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make_merge_transform(make_tuple(scale_packs_k, KThreadPerXdl))),
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make_tuple(sequence<0, 3>{}, sequence<1, 2>{}),
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make_tuple(sequence<0>{}, sequence<1>{}));
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return make_tensor_view<address_space_enum::global>(
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reinterpret_cast<const int32_t*>(scale_b.ptr), scale_b_desc);
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}();
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return concat_tuple(gemm_tensor_views_tuple, make_tuple(scale_a_tensor_view, scale_b_tensor_view));
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}
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template <typename TensorView>
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CK_TILE_DEVICE static auto MakeGemmPadViews(const TensorView& views)
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{
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const auto& padded_views = Underlying::template MakeGemmPadViews(views);
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return make_tuple(
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padded_views.at(I0), padded_views.at(I1), padded_views.at(I2), padded_views.at(I3), views.at(I4), views.at(I5));
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}
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template <typename PadView>
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CK_TILE_DEVICE static auto
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MakeGemmTileWindows(const PadView& views, const index_t i_m, const index_t i_n)
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{
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const auto& tile_windows = Underlying::template MakeGemmTileWindows(views, i_m, i_n);
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static constexpr int BlockScaleSize = 32;
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auto scale_a_block_window = make_tile_window(
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views.at(I4),
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make_tuple(number<TilePartitioner::MPerBlock / MXdlPack>{},
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number<TilePartitioner::KPerBlock / (BlockScaleSize * KXdlPack)>{}),
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{i_m / MXdlPack, 0});
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auto scale_b_block_window = make_tile_window(
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views.at(I5),
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make_tuple(number<TilePartitioner::NPerBlock / NXdlPack>{},
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number<TilePartitioner::KPerBlock / (BlockScaleSize * KXdlPack)>{}),
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{i_n / NXdlPack, 0});
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return make_tuple(tile_windows.at(I0),
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tile_windows.at(I1),
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tile_windows.at(I2),
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tile_windows.at(I3),
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scale_a_block_window,
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scale_b_block_window);
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}
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template <class ScaleM, class ScaleN, bool UseDefaultScheduler = true>
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CK_TILE_DEVICE static void
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RunMxGemm(const ADataType* a_ptr,
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const BDataType* b_ptr,
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const std::array<const void*, NumDTensor>& ds_ptr,
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EDataType* e_ptr,
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void* smem_ptr_ping,
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void* smem_ptr_pong,
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const KernelArgs<ScaleM, ScaleN>& kargs,
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const SplitKBatchOffset& splitk_batch_offset,
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const index_t block_idx_m,
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const index_t block_idx_n)
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{
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// Create Gemm tensor views, pad views and tile windows
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const auto& gemm_tensor_views_tuple =
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MakeGemmTensorViews<EpiloguePipeline::MemoryOperation>(
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a_ptr, b_ptr, ds_ptr, e_ptr, kargs, splitk_batch_offset);
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const auto& gemm_pad_views = MakeGemmPadViews(gemm_tensor_views_tuple);
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auto gemm_tile_windows = MakeGemmTileWindows(gemm_pad_views, block_idx_m, block_idx_n);
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const index_t num_loop = TilePartitioner::GetLoopNum(splitk_batch_offset.splitted_k);
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// Run GEMM cooperatively by whole workgroup.
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const auto& a_block_window = gemm_tile_windows.at(I0);
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const auto& b_flat_block_window = gemm_tile_windows.at(I1);
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const auto& d_block_window = gemm_tile_windows.at(I2);
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const auto& scale_a_block_window = gemm_tile_windows.at(I4);
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const auto& scale_b_block_window = gemm_tile_windows.at(I5);
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static_assert(ScaleM::GranularityK == ScaleN::GranularityK // have the same granK
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|| ScaleM::GranularityMN == -1 // or ScaleA is disable
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|| ScaleN::GranularityMN == -1, // or ScaleB is disable
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"ScaleM and ScaleN should have the same GranularityK");
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constexpr bool DoEpiScale =
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(ScaleM::GranularityMN != -1 && ScaleM::GranularityK == 0) || // per token
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(ScaleN::GranularityMN != -1 && ScaleN::GranularityK == 0); // per channel
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const auto& c_block_tile = MXFlatmmPipeline{}(a_block_window,
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b_flat_block_window,
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scale_a_block_window,
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scale_b_block_window,
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num_loop,
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smem_ptr_ping,
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smem_ptr_pong);
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// Run Epilogue Pipeline
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if constexpr(DoEpiScale)
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{
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auto& c_block_window = gemm_tile_windows.at(I3);
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EpiloguePipeline{}(c_block_window,
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c_block_tile,
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d_block_window,
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smem_ptr_ping,
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kargs.scale_m_ptr + block_idx_m,
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kargs.scale_n_ptr + block_idx_n);
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}
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else if(UseDefaultScheduler || (get_warp_id() == 0))
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{
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// Run Epilogue Pipeline
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auto& c_block_window = gemm_tile_windows.at(I3);
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EpiloguePipeline{}(c_block_window, c_block_tile, d_block_window, smem_ptr_ping);
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}
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}
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CK_TILE_HOST_DEVICE static constexpr index_t GetSmemPingSize()
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{
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return max(MXGemmPipeline::GetSmemSize(), EpiloguePipeline::GetSmemSize());
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}
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CK_TILE_HOST_DEVICE static constexpr index_t GetSmemPongSize()
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{
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return MXGemmPipeline::GetSmemSize();
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}
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template <class ScaleM, class ScaleN>
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CK_TILE_DEVICE void operator()(KernelArgs<ScaleM, ScaleN> kargs,
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int partition_idx = get_block_id()) const
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{
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const int total_work_tile_cnt = amd_wave_read_first_lane(TilePartitioner::GridSize(kargs.M, kargs.N));
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do
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{
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const auto [iM, iN] =
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TilePartitioner{kargs.M, kargs.N}.GetOutputTileIndex(partition_idx);
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const index_t i_m = amd_wave_read_first_lane(iM * TilePartitioner::MPerBlock);
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const index_t i_n = amd_wave_read_first_lane(iN * TilePartitioner::NPerBlock);
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const SplitKBatchOffset splitk_batch_offset(kargs);
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// options
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const auto a_ptr = static_cast<const ADataType*>(kargs.as_ptr) +
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splitk_batch_offset.a_k_split_offset / APackedSize;
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const auto b_ptr = static_cast<const BDataType*>(kargs.b_ptr) +
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splitk_batch_offset.b_k_split_offset / BPackedSize;
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EDataType* e_ptr = static_cast<EDataType*>(kargs.e_ptr);
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// options
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std::array<const ADataType*, NumATensor> as_ptr;
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static_for<0, NumATensor, 1>{}([&](auto i) {
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as_ptr[i] = static_cast<const ADataType*>(kargs.as_ptr[i]) +
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splitk_batch_offset.as_k_split_offset[i] / APackedSize;
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});
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std::array<const BDataType*, NumBTensor> bs_ptr;
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static_for<0, NumBTensor, 1>{}([&](auto i) {
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bs_ptr[i] = static_cast<const BDataType*>(kargs.bs_ptr[i]) +
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splitk_batch_offset.bs_k_split_offset[i] / BPackedSize;
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});
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// Calculate output offset from tile partitioner and apply to output pointer
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EDataType* e_ptr = static_cast<EDataType*>(kargs.e_ptr);
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if constexpr(has_tile_partitioner_output_offset)
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{
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const index_t output_offset = TilePartitioner::GetOutputOffset(kargs, blockIdx.z);
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e_ptr += output_offset;
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}
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// allocate LDS
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__shared__ char smem_ptr_ping[GetSmemPingSize()];
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__shared__ char smem_ptr_pong[GetSmemPongSize()];
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if constexpr(!(EpiloguePipeline::MemoryOperation == memory_operation_enum::atomic_add &&
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EpiloguePipeline::GetVectorSizeC() % 2 != 0 &&
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is_any_of<EDataType, fp16_t, bf16_t>::value))
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{
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constexpr auto scheduler_type = (MXGemmPipeline::NumWaveGroups == 1);
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RunMxGemm<ScaleM, ScaleN, scheduler_type>(as_ptr,
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bs_ptr,
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kargs.ds_ptr,
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e_ptr,
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smem_ptr_ping,
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smem_ptr_pong,
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kargs,
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splitk_batch_offset,
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i_m,
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i_n);
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}
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else
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||||
{
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static_assert(false,
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"Unimplemented: atomic_add with odd vector size for fp16/bf16");
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}
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partition_idx += gridDim.x;
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||||
} while(UsePersistentKernel && partition_idx < total_work_tile_cnt);
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||||
}
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||||
};
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} // namespace ck_tile
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110
include/ck_tile/ops/gemm_mx/kernel/scale_pointer.hpp
Normal file
110
include/ck_tile/ops/gemm_mx/kernel/scale_pointer.hpp
Normal file
@@ -0,0 +1,110 @@
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||||
// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
|
||||
// SPDX-License-Identifier: MIT
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "ck_tile/core.hpp"
|
||||
|
||||
|
||||
namespace ck_tile {
|
||||
|
||||
template <int SharedGranularityMN, int SharedGranularityK = 0>
|
||||
struct MXScalePointer
|
||||
{
|
||||
static constexpr int GranularityMN = SharedGranularityMN;
|
||||
static constexpr int GranularityK = SharedGranularityK;
|
||||
|
||||
const float* ptr;
|
||||
|
||||
CK_TILE_HOST_DEVICE MXScalePointer() = default;
|
||||
CK_TILE_HOST_DEVICE MXScalePointer(const float* ptr_) : ptr(ptr_) {}
|
||||
CK_TILE_HOST_DEVICE MXScalePointer(const float* ptr_, [[maybe_unused]] index_t length_)
|
||||
: ptr(ptr_)
|
||||
{
|
||||
}
|
||||
|
||||
CK_TILE_HOST_DEVICE MXScalePointer operator+(index_t offset) const
|
||||
{
|
||||
MXScalePointer ret;
|
||||
if constexpr(GranularityMN == 0)
|
||||
{
|
||||
ret.ptr = ptr + offset / GranularityK;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret.ptr = ptr + offset / GranularityMN / GranularityK;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
CK_TILE_HOST_DEVICE float operator[](index_t i) const = delete;
|
||||
};
|
||||
|
||||
template <int SharedGranularityMN>
|
||||
struct MXScalePointer<SharedGranularityMN, 0>
|
||||
{
|
||||
static constexpr int GranularityMN = SharedGranularityMN;
|
||||
static constexpr int GranularityK = 0;
|
||||
|
||||
static_assert(GranularityMN != 0);
|
||||
|
||||
const float* ptr;
|
||||
index_t length;
|
||||
|
||||
CK_TILE_HOST_DEVICE MXScalePointer() = default;
|
||||
CK_TILE_HOST_DEVICE MXScalePointer(const float* ptr_) : ptr(ptr_), length(1) {}
|
||||
CK_TILE_HOST_DEVICE MXScalePointer(const float* ptr_, index_t length_)
|
||||
: ptr(ptr_), length(length_)
|
||||
{
|
||||
}
|
||||
|
||||
CK_TILE_HOST_DEVICE MXScalePointer operator+(index_t offset) const
|
||||
{
|
||||
MXScalePointer ret;
|
||||
if constexpr(GranularityMN == 1)
|
||||
{
|
||||
ret.ptr = ptr + offset;
|
||||
ret.length = length - offset;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret.ptr = ptr + offset / GranularityMN;
|
||||
ret.length = length - offset / GranularityMN;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
CK_TILE_HOST_DEVICE float operator[](index_t i) const
|
||||
{
|
||||
// with additional oob check
|
||||
if constexpr(GranularityMN == 1)
|
||||
return i < length ? ptr[i] : 0;
|
||||
else
|
||||
return i / GranularityMN < length ? ptr[i / GranularityMN] : 0;
|
||||
}
|
||||
};
|
||||
|
||||
// shared granularityMN = -1 means no scale
|
||||
template <>
|
||||
struct MXScalePointer<-1, 0>
|
||||
{
|
||||
static constexpr int GranularityMN = -1;
|
||||
static constexpr int GranularityK = 0;
|
||||
|
||||
const float* ptr = nullptr;
|
||||
|
||||
CK_TILE_HOST_DEVICE constexpr MXScalePointer() = default;
|
||||
CK_TILE_HOST_DEVICE constexpr MXScalePointer(const float*) {}
|
||||
CK_TILE_HOST_DEVICE constexpr MXScalePointer(const float*, index_t) {}
|
||||
|
||||
CK_TILE_HOST_DEVICE constexpr MXScalePointer operator+(index_t) const
|
||||
{
|
||||
return MXScalePointer{};
|
||||
}
|
||||
CK_TILE_HOST_DEVICE constexpr float operator[](index_t) const
|
||||
{
|
||||
return 1; // alway return 1, it doesn't change the result
|
||||
}
|
||||
};
|
||||
|
||||
} // namespace ck_tile
|
||||
Reference in New Issue
Block a user