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https://github.com/ROCm/composable_kernel.git
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[CK_TILE] Switch into universal gemms for conv bwds (#2981)
* switch into universal gemms for conv bwds * some fixes and support universal gemm in conv fwd * add reviewer comments
This commit is contained in:
jakpiase
303
example/ck_tile/20_grouped_convolution/gemm_configs.hpp
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303
example/ck_tile/20_grouped_convolution/gemm_configs.hpp
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2025, Advanced Micro Devices, Inc. All rights reserved.
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#pragma once
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#include <string>
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#include <variant>
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#include "ck_tile/core.hpp"
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#include "ck_tile/host/kernel_launch.hpp"
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#include "ck_tile/ops/epilogue.hpp"
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#include "ck_tile/ops/gemm.hpp"
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#include "ck_tile/utility/json_dump.hpp"
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#define CK_TILE_PIPELINE_COMPUTE_V3 1
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#define CK_TILE_PIPELINE_MEMORY 2
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#define CK_TILE_PIPELINE_COMPUTE_V4 3
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#define CK_TILE_PIPELINE_COMPUTE_V5 4
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struct GemmConfigBase
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{
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static constexpr bool kPadM = true;
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static constexpr bool kPadN = true;
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static constexpr bool kPadK = true;
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static constexpr bool PermuteA = false;
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static constexpr bool PermuteB = false;
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static constexpr bool TransposeC = false;
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static constexpr bool UseStructuredSparsity = false;
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static constexpr int kBlockPerCu = 1;
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static constexpr ck_tile::index_t TileParitionerGroupNum = 8;
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static constexpr ck_tile::index_t TileParitionerM01 = 4;
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static constexpr auto Scheduler = ck_tile::GemmPipelineScheduler::Intrawave;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V3;
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static constexpr ck_tile::index_t NumWaveGroups = 1;
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static constexpr bool Preshuffle = false;
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static constexpr bool TiledMMAPermuteN = false;
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};
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template <typename PrecType>
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struct GemmConfigMemoryInterwave : public GemmConfigBase
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{
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// Memory friendly for Interwave scheduler
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static constexpr ck_tile::index_t M_Tile = 128;
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static constexpr ck_tile::index_t N_Tile = 32;
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static constexpr ck_tile::index_t K_Tile = 128 / sizeof(PrecType);
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static constexpr ck_tile::index_t M_Warp = 4;
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static constexpr ck_tile::index_t N_Warp = 1;
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static constexpr ck_tile::index_t K_Warp = 1;
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = 16;
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_MEMORY;
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static constexpr auto Scheduler = ck_tile::GemmPipelineScheduler::Interwave;
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};
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template <typename PrecType>
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struct GemmConfigMemoryIntrawave : public GemmConfigBase
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{
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static constexpr ck_tile::index_t M_Tile = 128;
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static constexpr ck_tile::index_t N_Tile = 32;
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static constexpr ck_tile::index_t K_Tile = 128 / sizeof(PrecType);
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static constexpr ck_tile::index_t M_Warp = 4;
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static constexpr ck_tile::index_t N_Warp = 1;
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static constexpr ck_tile::index_t K_Warp = 1;
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = 16;
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_MEMORY;
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};
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template <typename PrecType>
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struct GemmConfigComputeV3 : public GemmConfigBase
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{
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// Compute V3 only support Intrawave scheduler
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static constexpr ck_tile::index_t M_Tile = 16;
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static constexpr ck_tile::index_t N_Tile = 64;
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static constexpr ck_tile::index_t K_Tile = 64;
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static constexpr ck_tile::index_t M_Warp = 1;
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static constexpr ck_tile::index_t N_Warp = 4;
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static constexpr ck_tile::index_t K_Warp = 1;
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static constexpr ck_tile::index_t M_Warp_Tile = 16;
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static constexpr ck_tile::index_t N_Warp_Tile = 16;
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static constexpr ck_tile::index_t K_Warp_Tile = 32;
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V3;
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};
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template <typename PrecType>
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struct GemmConfigComputeV3_1 : public GemmConfigBase
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{
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static constexpr ck_tile::index_t M_Tile = 256;
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static constexpr ck_tile::index_t N_Tile = 256;
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static constexpr ck_tile::index_t K_Tile = 128 / sizeof(PrecType);
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static constexpr ck_tile::index_t M_Warp = 2;
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static constexpr ck_tile::index_t N_Warp = 2;
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static constexpr ck_tile::index_t K_Warp = 1;
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = 16;
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V3;
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};
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template <typename PrecType>
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struct GemmConfigComputeV3_2 : public GemmConfigBase
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{
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static constexpr ck_tile::index_t M_Tile = 128;
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static constexpr ck_tile::index_t N_Tile = 128;
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static constexpr ck_tile::index_t K_Tile = 128 / sizeof(PrecType);
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static constexpr ck_tile::index_t M_Warp = 2;
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static constexpr ck_tile::index_t N_Warp = 2;
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static constexpr ck_tile::index_t K_Warp = 1;
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static constexpr ck_tile::index_t M_Warp_Tile = 16;
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static constexpr ck_tile::index_t N_Warp_Tile = 16;
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static constexpr ck_tile::index_t K_Warp_Tile = 32;
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V3;
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static constexpr int kBlockPerCu = 2;
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};
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template <typename PrecType>
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struct GemmConfigComputeV3_WMMA : public GemmConfigBase
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{
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static constexpr ck_tile::index_t M_Tile = 128;
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static constexpr ck_tile::index_t N_Tile = 128;
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static constexpr ck_tile::index_t K_Tile = 64 / sizeof(PrecType);
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static constexpr ck_tile::index_t M_Warp = 4;
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static constexpr ck_tile::index_t N_Warp = 2;
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static constexpr ck_tile::index_t K_Warp = 1;
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static constexpr ck_tile::index_t M_Warp_Tile = 16;
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static constexpr ck_tile::index_t N_Warp_Tile = 16;
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static constexpr ck_tile::index_t K_Warp_Tile = 16;
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V3;
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static constexpr int kBlockPerCu = 2;
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};
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template <typename PrecType>
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struct GemmConfigComputeV4 : public GemmConfigBase
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{
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// Compute V4 only support Intrawave scheduler
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// Using the ping pong reader in the lds level
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static constexpr ck_tile::index_t M_Tile = 256;
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static constexpr ck_tile::index_t N_Tile = 256;
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static constexpr ck_tile::index_t K_Tile = 64 / sizeof(PrecType);
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static constexpr ck_tile::index_t M_Warp = 2;
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static constexpr ck_tile::index_t N_Warp = 2;
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static constexpr ck_tile::index_t K_Warp = 1;
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = 16;
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static constexpr bool DoubleSmemBuffer = true;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V4;
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};
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template <typename PrecType>
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struct GemmConfigComputeV4_1 : public GemmConfigBase
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{
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static constexpr ck_tile::index_t M_Tile = 256;
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static constexpr ck_tile::index_t N_Tile = 256;
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static constexpr ck_tile::index_t K_Tile = 128 / sizeof(PrecType);
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static constexpr ck_tile::index_t M_Warp = 2;
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static constexpr ck_tile::index_t N_Warp = 2;
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static constexpr ck_tile::index_t K_Warp = 1;
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = 16;
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static constexpr bool DoubleSmemBuffer = true;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V4;
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};
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template <typename PrecType>
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struct GemmConfigComputeV5 : public GemmConfigBase
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{
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static constexpr ck_tile::index_t M_Tile = 128;
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static constexpr ck_tile::index_t N_Tile = 128;
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static constexpr ck_tile::index_t K_Tile = 64 / sizeof(PrecType);
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static constexpr ck_tile::index_t M_Warp = 1;
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static constexpr ck_tile::index_t N_Warp = 1;
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static constexpr ck_tile::index_t K_Warp = 2;
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = 16;
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V5;
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static constexpr ck_tile::index_t NumWaNumWaveGroups = 2;
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};
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template <typename InDataType, typename WeiDataType = InDataType, typename OutDataType = InDataType>
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struct ConvTypeConfig;
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template <>
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struct ConvTypeConfig<ck_tile::half_t>
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{
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using InDataType = ck_tile::half_t;
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using WeiDataType = ck_tile::half_t;
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using AccDataType = float;
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using OutDataType = ck_tile::half_t;
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// ToDo: Add more bias config to support different categories of GEMM.
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};
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template <>
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struct ConvTypeConfig<ck_tile::bf16_t, ck_tile::bf16_t, ck_tile::bf16_t>
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{
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using InDataType = ck_tile::bf16_t;
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using WeiDataType = ck_tile::bf16_t;
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using AccDataType = float;
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using OutDataType = ck_tile::bf16_t;
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};
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template <typename T>
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struct DataTypeTraits;
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template <>
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struct DataTypeTraits<float>
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{
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static constexpr const char* name = "fp32";
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};
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template <>
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struct DataTypeTraits<ck_tile::half_t>
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{
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static constexpr const char* name = "fp16";
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};
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template <>
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struct DataTypeTraits<ck_tile::bf16_t>
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{
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static constexpr const char* name = "bf16";
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};
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template <ck_tile::index_t PipelineId>
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struct PipelineTypeTraits;
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template <>
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struct PipelineTypeTraits<CK_TILE_PIPELINE_MEMORY>
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{
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template <typename PipelineProblem>
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using GemmPipeline = ck_tile::GemmPipelineAgBgCrMem<PipelineProblem>;
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template <typename PipelineProblem>
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using UniversalGemmPipeline = ck_tile::BaseGemmPipelineAgBgCrMem<PipelineProblem>;
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};
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template <>
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struct PipelineTypeTraits<CK_TILE_PIPELINE_COMPUTE_V3>
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{
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template <typename PipelineProblem>
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using GemmPipeline = ck_tile::GemmPipelineAgBgCrCompV3<PipelineProblem>;
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template <typename PipelineProblem>
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using UniversalGemmPipeline = ck_tile::BaseGemmPipelineAgBgCrCompV3<PipelineProblem>;
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};
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template <>
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struct PipelineTypeTraits<CK_TILE_PIPELINE_COMPUTE_V4>
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{
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template <typename PipelineProblem>
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using GemmPipeline = ck_tile::GemmPipelineAgBgCrCompV4<PipelineProblem>;
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template <typename PipelineProblem>
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using UniversalGemmPipeline = ck_tile::BaseGemmPipelineAgBgCrCompV4<PipelineProblem>;
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};
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template <>
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struct PipelineTypeTraits<CK_TILE_PIPELINE_COMPUTE_V5>
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{
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template <typename PipelineProblem>
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using GemmPipeline = ck_tile::GemmPipelineAgBgCrCompV5<PipelineProblem>;
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template <typename PipelineProblem>
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using UniversalGemmPipeline = ck_tile::BaseGemmPipelineAgBgCrCompV5<PipelineProblem>;
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};
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