mirror of
https://github.com/ROCm/composable_kernel.git
synced 2026-05-05 06:01:23 +00:00
Standalone layernorm (#315)
* Implement layernorm kernel and deviceOp * verify gpu kernel with host code * 1. Separate gamma aand beta from affine 2. Check if argument is valid * clean * Sync the naming * Support sweep once mode if we can put k dimension data inside one block * [What] Get length from upper length. [Why] if we get length directly, we may get length after padding. * We only use one block in K dimension. Hence, we can simplify the indexing of global R/W. * Use 1d descriptor for gamma and beta * Add accElementwiseOp * Extract layernorm host code * Support different YVectorDim in GridwiseLayernorm * Rename XSrcVectorDim to XYSrcVectorDim. Because we use same parameter in deviceOp * Gamma and beta can share the VGPR. * Add test for fp32 and fp16 * Fix bug of concurrency and add test case which may fail orignally * Propagate NaN for layernorm Co-authored-by: Chao Liu <chao.liu2@amd.com>
This commit is contained in:
rocking5566
392
include/ck/tensor_operation/gpu/grid/gridwise_layernorm.hpp
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392
include/ck/tensor_operation/gpu/grid/gridwise_layernorm.hpp
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2018-2022, Advanced Micro Devices, Inc. All rights reserved.
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#pragma once
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#include "ck/utility/data_type.hpp"
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#include "ck/utility/reduction_common.hpp"
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#include "ck/utility/reduction_operator.hpp"
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#include "ck/utility/reduction_functions_accumulate.hpp"
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#include "ck/tensor_operation/gpu/block/reduction_functions_blockwise.hpp"
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#include "ck/tensor_operation/gpu/thread/reduction_functions_threadwise.hpp"
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#include "ck/tensor_operation/gpu/thread/threadwise_tensor_slice_transfer.hpp"
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#include "ck/tensor_operation/gpu/element/element_wise_operation.hpp"
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namespace ck {
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template <typename GridwiseReduction,
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typename XDataType,
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typename GammaDataType,
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typename BetaDataType,
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typename YDataType,
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typename AccDataType,
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typename AccElementwiseOperation,
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typename GridDesc_M_K,
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typename GridDesc_K>
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__global__ void kernel_layernorm(const GridDesc_M_K x_grid_desc_m_k,
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const GridDesc_K gamma_grid_desc_k,
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const GridDesc_K beta_grid_desc_k,
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const GridDesc_M_K y_grid_desc_m_k,
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index_t num_k_block_tile_iteration,
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AccDataType epsilon,
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const XDataType* const __restrict__ p_x_global,
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const GammaDataType* const __restrict__ p_gamma_global,
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const BetaDataType* const __restrict__ p_beta_global,
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YDataType* const __restrict__ p_y_global,
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const AccElementwiseOperation acc_elementwise_op)
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{
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GridwiseReduction::Run(x_grid_desc_m_k,
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gamma_grid_desc_k,
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beta_grid_desc_k,
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y_grid_desc_m_k,
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num_k_block_tile_iteration,
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epsilon,
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p_x_global,
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p_gamma_global,
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p_beta_global,
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p_y_global,
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acc_elementwise_op);
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};
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// Y = LayerNorm(X, Beta, Gamma)
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template <typename XDataType,
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typename GammaDataType,
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typename BetaDataType,
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typename YDataType,
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typename AccDataType,
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typename AccElementwiseOperation,
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typename GridDesc_M_K,
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typename GridDesc_K,
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index_t BlockSize,
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index_t MThreadClusterSize,
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index_t KThreadClusterSize,
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index_t MThreadSliceSize,
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index_t KThreadSliceSize,
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index_t XSrcVectorDim,
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index_t XSrcVectorSize,
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index_t GammaSrcVectorSize,
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index_t BetaSrcVectorSize,
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index_t YDstVectorDim,
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index_t YDstVectorSize,
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bool SweepOnce>
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struct GridwiseLayernorm_mk_to_mk
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{
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static_assert((XSrcVectorDim == 0 && MThreadSliceSize % XSrcVectorSize == 0) ||
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(XSrcVectorDim == 1 && KThreadSliceSize % XSrcVectorSize == 0),
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"Invalid thread slice sizes and/or vector sizes configuration, please check!");
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static_assert((YDstVectorDim == 0 && MThreadSliceSize % YDstVectorSize == 0) ||
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(YDstVectorDim == 1 && KThreadSliceSize % YDstVectorSize == 0),
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"Invalid thread slice sizes and/or vector sizes configuration, please check!");
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static constexpr bool reorder_thread_cluster = (XSrcVectorDim == 0);
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using ThreadClusterLengths_M_K = Sequence<MThreadClusterSize, KThreadClusterSize>;
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using ThreadBufferDimAccessOrder =
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typename conditional<reorder_thread_cluster, Sequence<1, 0>, Sequence<0, 1>>::type;
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using ThreadClusterArrangeOrder =
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typename conditional<reorder_thread_cluster, Sequence<1, 0>, Sequence<0, 1>>::type;
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static constexpr auto thread_cluster_desc =
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make_cluster_descriptor(ThreadClusterLengths_M_K{}, ThreadClusterArrangeOrder{});
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using ThreadReduceSrcDesc_M_K = decltype(make_naive_tensor_descriptor_packed(
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make_tuple(Number<MThreadSliceSize>{}, Number<KThreadSliceSize>{})));
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using ThreadReduceDstDesc_M =
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decltype(make_naive_tensor_descriptor_packed(make_tuple(Number<MThreadSliceSize>{})));
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using BlockwiseSumReduce = PartitionedBlockwiseReduction<AccDataType,
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BlockSize,
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ThreadClusterLengths_M_K,
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ThreadClusterArrangeOrder,
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reduce::Add,
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true>;
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using ThreadwiseSumReduce = ThreadwiseReduction<AccDataType,
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ThreadReduceSrcDesc_M_K,
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ThreadReduceDstDesc_M,
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reduce::Add,
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true>;
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static constexpr auto I0 = Number<0>{};
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static constexpr auto I1 = Number<1>{};
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static constexpr index_t M_BlockTileSize = MThreadClusterSize * MThreadSliceSize;
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static constexpr index_t K_BlockTileSize = KThreadClusterSize * KThreadSliceSize;
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__device__ static void Run(const GridDesc_M_K& x_grid_desc_m_k,
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const GridDesc_K& gamma_grid_desc_k,
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const GridDesc_K& beta_grid_desc_k,
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const GridDesc_M_K& y_grid_desc_m_k,
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index_t num_k_block_tile_iteration,
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AccDataType epsilon,
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const XDataType* const __restrict__ p_x_global,
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const GammaDataType* const __restrict__ p_gamma_global,
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const BetaDataType* const __restrict__ p_beta_global,
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YDataType* const __restrict__ p_y_global,
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const AccElementwiseOperation acc_elementwise_op)
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{
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if constexpr(SweepOnce)
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{
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num_k_block_tile_iteration = 1;
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}
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// LDS
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__shared__ AccDataType p_reduce_work_buffer[BlockSize];
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auto y_global_val_buf = make_dynamic_buffer<AddressSpaceEnum::Global>(
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p_y_global, y_grid_desc_m_k.GetElementSpaceSize());
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auto reduce_work_buf =
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make_dynamic_buffer<AddressSpaceEnum::Lds>(p_reduce_work_buffer, BlockSize);
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StaticBuffer<AddressSpaceEnum::Vgpr, AccDataType, MThreadSliceSize * KThreadSliceSize, true>
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x_thread_buf;
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StaticBuffer<AddressSpaceEnum::Vgpr, AccDataType, KThreadSliceSize, true> gamma_thread_buf;
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StaticBuffer<AddressSpaceEnum::Vgpr, AccDataType, KThreadSliceSize, true>& beta_thread_buf =
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gamma_thread_buf;
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StaticBuffer<AddressSpaceEnum::Vgpr, AccDataType, MThreadSliceSize * KThreadSliceSize, true>
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y_thread_buf;
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StaticBuffer<AddressSpaceEnum::Vgpr,
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AccDataType,
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MThreadSliceSize * KThreadSliceSize,
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true>& x_square_thread_buf = y_thread_buf;
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StaticBuffer<AddressSpaceEnum::Vgpr, AccDataType, MThreadSliceSize, true> mean_thread_buf;
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StaticBuffer<AddressSpaceEnum::Vgpr, AccDataType, MThreadSliceSize, true>
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mean_square_thread_buf;
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StaticBuffer<AddressSpaceEnum::Vgpr, AccDataType, MThreadSliceSize, true>& var_value_buf =
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mean_square_thread_buf;
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static_for<0, MThreadSliceSize, 1>{}([&](auto I) {
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mean_thread_buf(I) = reduce::Add::template GetIdentityValue<AccDataType>();
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mean_square_thread_buf(I) = reduce::Add::template GetIdentityValue<AccDataType>();
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});
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const index_t thread_local_id = get_thread_local_1d_id();
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const index_t block_global_id = get_block_1d_id();
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const auto thread_cluster_idx =
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thread_cluster_desc.CalculateBottomIndex(make_multi_index(thread_local_id));
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const auto thread_m_cluster_id = thread_cluster_idx[I0];
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const auto thread_k_cluster_id = thread_cluster_idx[I1];
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using ThreadBufferLengths_M_K = Sequence<MThreadSliceSize, KThreadSliceSize>;
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using ThreadBufferLengths_K = Sequence<KThreadSliceSize>;
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constexpr auto thread_buffer_desc_m_k = make_naive_tensor_descriptor_packed(
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make_tuple(Number<MThreadSliceSize>{}, Number<KThreadSliceSize>{}));
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constexpr auto thread_buffer_desc_k =
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make_naive_tensor_descriptor_packed(make_tuple(Number<KThreadSliceSize>{}));
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auto threadwise_x_load = ThreadwiseTensorSliceTransfer_v2<XDataType,
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AccDataType,
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GridDesc_M_K,
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decltype(thread_buffer_desc_m_k),
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ThreadBufferLengths_M_K,
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ThreadBufferDimAccessOrder,
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XSrcVectorDim,
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XSrcVectorSize,
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1,
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true>(
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x_grid_desc_m_k,
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make_multi_index(block_global_id * M_BlockTileSize +
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thread_m_cluster_id * MThreadSliceSize,
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thread_k_cluster_id * KThreadSliceSize));
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auto threadwise_gamma_load =
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ThreadwiseTensorSliceTransfer_v2<GammaDataType,
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AccDataType,
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GridDesc_K,
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decltype(thread_buffer_desc_k),
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ThreadBufferLengths_K,
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Sequence<0>,
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0,
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GammaSrcVectorSize,
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1,
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true>(
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gamma_grid_desc_k, make_multi_index(thread_k_cluster_id * KThreadSliceSize));
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auto threadwise_beta_load = ThreadwiseTensorSliceTransfer_v2<BetaDataType,
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AccDataType,
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GridDesc_K,
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decltype(thread_buffer_desc_k),
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ThreadBufferLengths_K,
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Sequence<0>,
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0,
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BetaSrcVectorSize,
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1,
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true>(
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beta_grid_desc_k, make_multi_index(thread_k_cluster_id * KThreadSliceSize));
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auto threadwise_y_store =
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ThreadwiseTensorSliceTransfer_v1r3<AccDataType,
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YDataType,
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decltype(thread_buffer_desc_m_k),
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GridDesc_M_K,
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AccElementwiseOperation,
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ThreadBufferLengths_M_K,
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ThreadBufferDimAccessOrder,
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YDstVectorDim,
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YDstVectorSize,
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InMemoryDataOperationEnum::Set,
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1,
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true>(
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y_grid_desc_m_k,
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make_multi_index(block_global_id * M_BlockTileSize +
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thread_m_cluster_id * MThreadSliceSize,
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thread_k_cluster_id * KThreadSliceSize),
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acc_elementwise_op);
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// Copy x from Cache
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// one pass: fwd, second pass: bwd
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constexpr auto thread_copy_fwd_step_k = make_multi_index(SweepOnce ? 0 : K_BlockTileSize);
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constexpr auto thread_copy_bwd_step_k = make_multi_index(SweepOnce ? 0 : -K_BlockTileSize);
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constexpr auto thread_copy_fwd_step_m_k =
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make_multi_index(0, SweepOnce ? 0 : K_BlockTileSize);
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constexpr auto thread_copy_bwd_step_m_k =
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make_multi_index(0, SweepOnce ? 0 : -K_BlockTileSize);
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const auto x_global_val_buf = make_dynamic_buffer<AddressSpaceEnum::Global>(
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p_x_global, x_grid_desc_m_k.GetElementSpaceSize());
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const auto gamma_global_val_buf = make_dynamic_buffer<AddressSpaceEnum::Global>(
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p_gamma_global, gamma_grid_desc_k.GetElementSpaceSize());
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const auto beta_global_val_buf = make_dynamic_buffer<AddressSpaceEnum::Global>(
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p_beta_global, beta_grid_desc_k.GetElementSpaceSize());
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// E(x), E[x^2], var(x)
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int reduce_length = x_grid_desc_m_k.GetTransforms()[I0].GetUpperLengths()[I1];
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index_t reducedTiles = 0;
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do
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{
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threadwise_x_load.Run(x_grid_desc_m_k,
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x_global_val_buf,
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thread_buffer_desc_m_k,
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make_tuple(I0, I0),
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x_thread_buf);
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static_for<0, MThreadSliceSize, 1>{}([&](auto iM) {
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static_for<0, KThreadSliceSize, 1>{}([&](auto iK) {
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constexpr auto offset_m_k =
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thread_buffer_desc_m_k.CalculateOffset(make_tuple(iM, iK));
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x_square_thread_buf(Number<offset_m_k>{}) =
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x_thread_buf(Number<offset_m_k>{}) * x_thread_buf(Number<offset_m_k>{});
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});
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});
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ThreadwiseSumReduce::Reduce(x_thread_buf, mean_thread_buf);
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ThreadwiseSumReduce::Reduce(x_square_thread_buf, mean_square_thread_buf);
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threadwise_x_load.MoveSrcSliceWindow(x_grid_desc_m_k, thread_copy_fwd_step_m_k);
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++reducedTiles;
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} while(reducedTiles < num_k_block_tile_iteration);
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static_for<0, MThreadSliceSize, 1>{}([&](auto I) {
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if constexpr(I > 0)
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block_sync_lds();
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BlockwiseSumReduce::Reduce(reduce_work_buf, mean_thread_buf(I));
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mean_thread_buf(I) = mean_thread_buf(I) / reduce_length;
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block_sync_lds();
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BlockwiseSumReduce::Reduce(reduce_work_buf, mean_square_thread_buf(I));
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mean_square_thread_buf(I) = mean_square_thread_buf(I) / reduce_length;
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// var(x) = E[x^2] - E[x]^2
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var_value_buf(I) =
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mean_square_thread_buf(I) - (mean_thread_buf(I) * mean_thread_buf(I));
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});
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// y = (x - E[x]) / sqrt(var[x] + epsilon)
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auto thread_copy_tail_m_k = (num_k_block_tile_iteration - 1) * thread_copy_fwd_step_m_k;
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auto thread_copy_tail_k = (num_k_block_tile_iteration - 1) * thread_copy_fwd_step_k;
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threadwise_x_load.MoveSrcSliceWindow(x_grid_desc_m_k, thread_copy_bwd_step_m_k);
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threadwise_gamma_load.MoveSrcSliceWindow(gamma_grid_desc_k, thread_copy_tail_k);
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threadwise_beta_load.MoveSrcSliceWindow(beta_grid_desc_k, thread_copy_tail_k);
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threadwise_y_store.MoveDstSliceWindow(y_grid_desc_m_k, thread_copy_tail_m_k);
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reducedTiles = 0;
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do
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{
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if constexpr(!SweepOnce)
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{
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threadwise_x_load.Run(x_grid_desc_m_k,
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x_global_val_buf,
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thread_buffer_desc_m_k,
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make_tuple(I0, I0),
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x_thread_buf);
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}
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threadwise_gamma_load.Run(gamma_grid_desc_k,
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gamma_global_val_buf,
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thread_buffer_desc_k,
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make_tuple(I0),
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gamma_thread_buf);
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static_for<0, MThreadSliceSize, 1>{}([&](auto iM) {
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static_for<0, KThreadSliceSize, 1>{}([&](auto iK) {
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constexpr auto offset_m_k =
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thread_buffer_desc_m_k.CalculateOffset(make_tuple(iM, iK));
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constexpr auto offset_k = thread_buffer_desc_k.CalculateOffset(make_tuple(iK));
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// normalize
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y_thread_buf(Number<offset_m_k>{}) =
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(x_thread_buf(Number<offset_m_k>{}) - mean_thread_buf(iM)) /
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sqrt(var_value_buf(iM) + epsilon);
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// gamma
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y_thread_buf(Number<offset_m_k>{}) =
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y_thread_buf(Number<offset_m_k>{}) * gamma_thread_buf(Number<offset_k>{});
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});
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});
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threadwise_beta_load.Run(beta_grid_desc_k,
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beta_global_val_buf,
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thread_buffer_desc_k,
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make_tuple(I0),
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beta_thread_buf);
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static_for<0, MThreadSliceSize, 1>{}([&](auto iM) {
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static_for<0, KThreadSliceSize, 1>{}([&](auto iK) {
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constexpr auto offset_m_k =
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thread_buffer_desc_m_k.CalculateOffset(make_tuple(iM, iK));
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constexpr auto offset_k = thread_buffer_desc_k.CalculateOffset(make_tuple(iK));
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// beta
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y_thread_buf(Number<offset_m_k>{}) =
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y_thread_buf(Number<offset_m_k>{}) + beta_thread_buf(Number<offset_k>{});
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});
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});
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threadwise_y_store.Run(thread_buffer_desc_m_k,
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make_tuple(I0, I0),
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y_thread_buf,
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y_grid_desc_m_k,
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y_global_val_buf);
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threadwise_x_load.MoveSrcSliceWindow(x_grid_desc_m_k, thread_copy_bwd_step_m_k);
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threadwise_gamma_load.MoveSrcSliceWindow(gamma_grid_desc_k, thread_copy_bwd_step_k);
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threadwise_beta_load.MoveSrcSliceWindow(beta_grid_desc_k, thread_copy_bwd_step_k);
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threadwise_y_store.MoveDstSliceWindow(y_grid_desc_m_k, thread_copy_bwd_step_m_k);
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++reducedTiles;
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} while(reducedTiles < num_k_block_tile_iteration);
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}
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};
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} // namespace ck
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