mirror of
https://github.com/ROCm/composable_kernel.git
synced 2026-05-03 21:21:22 +00:00
Fused attention instances & padding tests (#395)
* modify comment * trim unnecessary check * add gemm spec in kernel name * add TNTT gemm_gemm + atten kernel instances * refactor attention padding to better fit in unit tests This streamlines usage where "ResetNaNToMinusInf" is now hidden from user facing device op. Also added compile-time conditionals that load OOB value as NaN only after padding is enabled * add adhoc padding test for atten * shrink input value range for attention kernel validation to avoid occasional error by 1e-3 Still unsure whether this kind of deterministic floating point accurary issue is expected or not. May want to try exact same approach as the GPU kernel in the host reference GEMM+Softmax+GEMM function to see if the accuracy discrepancy goes away. Until then, shrink the input value range as it is less likely to produce errors of around ~1e-3. * attention kernel proper granular padding for all 4 dims * IsSupportedArgument checks * test more padded cases * block PadK specialization in attention kernels * workaround clang crash for gfx908 (gfx908 only) workaround for compiler crash in fused kernels on mainline #9110; #10738 seems ok error message was "fatal error: error in backend: Error while trying to spill VGPR0 from class VGPR_32: Cannot scavenge register without an emergency spill slot!" this fall back to less ideal way of handle NPadding in fused attention kernel * comment out kernels giving wrong results on MI100; MI200 doesn't seem affected
This commit is contained in:
Anthony Chang
@@ -456,8 +456,7 @@ struct DeviceBatchedGemmGemm_Xdl_CShuffle : public DeviceBatchedGemmGemm<ALayout
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b_grid_desc_bk0_n_bk1_,
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b1_grid_desc_bk0_n_bk1_,
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c_grid_desc_m_n_,
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block_2_ctile_map_,
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raw_lengths_m_n_k_o_))
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block_2_ctile_map_))
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{
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c_grid_desc_mblock_mperblock_nblock_nperblock_ =
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GridwiseGemm::MakeCGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock(
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@@ -508,8 +507,7 @@ struct DeviceBatchedGemmGemm_Xdl_CShuffle : public DeviceBatchedGemmGemm<ALayout
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arg.b_grid_desc_bk0_n_bk1_,
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arg.b1_grid_desc_bk0_n_bk1_,
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arg.c_grid_desc_m_n_,
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arg.block_2_ctile_map_,
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arg.raw_lengths_m_n_k_o_))
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arg.block_2_ctile_map_))
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{
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throw std::runtime_error("wrong! GridwiseGemm has invalid setting");
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}
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@@ -628,8 +626,7 @@ struct DeviceBatchedGemmGemm_Xdl_CShuffle : public DeviceBatchedGemmGemm<ALayout
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arg.b_grid_desc_bk0_n_bk1_,
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arg.b1_grid_desc_bk0_n_bk1_,
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arg.c_grid_desc_m_n_,
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arg.block_2_ctile_map_,
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arg.raw_lengths_m_n_k_o_);
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arg.block_2_ctile_map_);
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}
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// polymorphic
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@@ -194,6 +194,9 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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GemmGemmPadder<GemmSpec, index_t, index_t, index_t, index_t>{
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MPerBlock, NPerBlock, KPerBlock, Gemm1NPerBlock};
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// FIXME: pad K
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static_assert(!matrix_padder.PadK, "KPadding is currently not supported");
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static auto MakeAGridDescriptor_AK0_M_AK1(index_t MRaw, index_t KRaw, index_t StrideA)
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{
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const auto a_grid_desc_mraw_kraw = [&]() {
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@@ -209,92 +212,18 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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}
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}();
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const auto M = math::integer_divide_ceil(MRaw, MPerBlock) * MPerBlock;
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const auto K = math::integer_divide_ceil(KRaw, KPerBlock) * KPerBlock;
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const auto a_grid_desc_m_k = matrix_padder.PadADescriptor_M_K(a_grid_desc_mraw_kraw);
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const auto MPad = M - MRaw;
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const auto KPad = K - KRaw;
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const auto M = a_grid_desc_m_k.GetLength(I0);
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const auto K = a_grid_desc_m_k.GetLength(I1);
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if constexpr(GemmSpec == GemmSpecialization::MKPadding ||
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GemmSpec == GemmSpecialization::MNKPadding)
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{
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// pad both M and K
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assert(K % AK1 == 0);
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const auto AK0 = K / AK1;
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const auto AK0 = K / AK1;
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const auto a_grid_desc_m_k =
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transform_tensor_descriptor(a_grid_desc_mraw_kraw,
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make_tuple(make_right_pad_transform(MRaw, MPad),
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make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto a_grid_desc_ak0_m_ak1 =
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transform_tensor_descriptor(a_grid_desc_m_k,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_pass_through_transform(M)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_ak0_m_ak1;
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}
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else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
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GemmSpec == GemmSpecialization::MNPadding)
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{
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// pad M, but not K
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assert(KRaw % AK1 == 0);
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const auto AK0 = KRaw / AK1;
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const auto a_grid_desc_ak0_m_ak1 =
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transform_tensor_descriptor(a_grid_desc_mraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_right_pad_transform(MRaw, MPad)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_ak0_m_ak1;
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}
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else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
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GemmSpec == GemmSpecialization::NKPadding)
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{
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// pad K, but not M
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assert(K % AK1 == 0);
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const auto AK0 = K / AK1;
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const auto a_grid_desc_m_k = transform_tensor_descriptor(
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a_grid_desc_mraw_kraw,
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make_tuple(make_pass_through_transform(MRaw), make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto a_grid_desc_ak0_m_ak1 =
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transform_tensor_descriptor(a_grid_desc_m_k,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_pass_through_transform(MRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_ak0_m_ak1;
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}
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else
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{
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// not pad M or K
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assert(KRaw % AK1 == 0);
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const auto AK0 = KRaw / AK1;
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const auto a_grid_desc_ak0_m_ak1 =
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transform_tensor_descriptor(a_grid_desc_mraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_pass_through_transform(MRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_ak0_m_ak1;
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}
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return transform_tensor_descriptor(a_grid_desc_m_k,
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make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
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make_pass_through_transform(M)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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}
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static auto MakeBGridDescriptor_BK0_N_BK1(index_t KRaw, index_t NRaw, index_t StrideB)
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@@ -312,84 +241,18 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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}
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}();
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const auto N = math::integer_divide_ceil(NRaw, NPerBlock) * NPerBlock;
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const auto K = math::integer_divide_ceil(KRaw, KPerBlock) * KPerBlock;
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const auto b_grid_desc_n_k = matrix_padder.PadBDescriptor_N_K(b_grid_desc_nraw_kraw);
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const auto NPad = N - NRaw;
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const auto KPad = K - KRaw;
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const auto N = b_grid_desc_n_k.GetLength(I0);
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const auto K = b_grid_desc_n_k.GetLength(I1);
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if constexpr(GemmSpec == GemmSpecialization::NKPadding ||
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GemmSpec == GemmSpecialization::MNKPadding)
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{
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// pad both N and K
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const auto BK0 = K / BK1;
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const auto BK0 = K / BK1;
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const auto b_grid_desc_n_k =
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transform_tensor_descriptor(b_grid_desc_nraw_kraw,
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make_tuple(make_right_pad_transform(NRaw, NPad),
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make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto b_grid_desc_bk0_n_bk1 =
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transform_tensor_descriptor(b_grid_desc_n_k,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_pass_through_transform(N)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_bk0_n_bk1;
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}
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else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
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GemmSpec == GemmSpecialization::MNPadding)
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{
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// pad N, but not K
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const auto BK0 = KRaw / BK1;
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const auto b_grid_desc_bk0_n_bk1 =
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transform_tensor_descriptor(b_grid_desc_nraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_right_pad_transform(NRaw, NPad)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_bk0_n_bk1;
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}
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else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
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GemmSpec == GemmSpecialization::MKPadding)
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{
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// pad K, but not N
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const auto BK0 = K / BK1;
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const auto b_grid_desc_n_k = transform_tensor_descriptor(
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b_grid_desc_nraw_kraw,
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make_tuple(make_pass_through_transform(NRaw), make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto b_grid_desc_bk0_n_bk1 =
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transform_tensor_descriptor(b_grid_desc_n_k,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_pass_through_transform(NRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_bk0_n_bk1;
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}
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else
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{
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// not pad N or K
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const auto BK0 = KRaw / BK1;
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const auto b_grid_desc_bk0_n_bk1 =
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transform_tensor_descriptor(b_grid_desc_nraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_pass_through_transform(NRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_bk0_n_bk1;
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}
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return transform_tensor_descriptor(b_grid_desc_n_k,
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make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
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make_pass_through_transform(N)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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}
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// Args: Gemm1KRaw, Gemm1NRaw, StrideB1
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@@ -408,47 +271,19 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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}
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}();
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const auto N = math::integer_divide_ceil(NRaw, Gemm1NPerBlock) * Gemm1NPerBlock;
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const auto K = math::integer_divide_ceil(KRaw, Gemm1KPerBlock) * Gemm1KPerBlock;
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const auto b1_grid_desc_n_k = matrix_padder.PadB1Descriptor_N_K(b1_grid_desc_nraw_kraw);
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const auto NPad = N - NRaw;
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const auto KPad = K - KRaw;
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const auto N = b1_grid_desc_n_k.GetLength(I0);
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const auto K = b1_grid_desc_n_k.GetLength(I1);
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// TODO: implement finer-grained padding
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if constexpr(GemmSpec == GemmSpecialization::Default)
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{
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const auto B1K0 = KRaw / B1K1;
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const auto B1K0 = K / B1K1;
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const auto b1_grid_desc_bk0_n_bk1 = transform_tensor_descriptor(
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b1_grid_desc_nraw_kraw,
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make_tuple(make_unmerge_transform(make_tuple(B1K0, B1K1)),
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make_pass_through_transform(NRaw)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b1_grid_desc_bk0_n_bk1;
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}
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else
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{
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// pad both B1N and B1K
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const auto B1K0 = K / B1K1;
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const auto b1_grid_desc_n_k =
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transform_tensor_descriptor(b1_grid_desc_nraw_kraw,
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make_tuple(make_right_pad_transform(NRaw, NPad),
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make_right_pad_transform(KRaw, KPad)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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const auto b1_grid_desc_bk0_n_bk1 = transform_tensor_descriptor(
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b1_grid_desc_n_k,
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make_tuple(make_unmerge_transform(make_tuple(B1K0, B1K1)),
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make_pass_through_transform(N)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b1_grid_desc_bk0_n_bk1;
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}
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return transform_tensor_descriptor(
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b1_grid_desc_n_k,
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make_tuple(make_unmerge_transform(make_tuple(B1K0, B1K1)),
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make_pass_through_transform(N)),
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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}
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// assume C[G0, G1, ..., M0, M1, M2, ..., N0, N1, N2...]
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@@ -662,7 +497,8 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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CShuffleNXdlPerWavePerShuffle,
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CShuffleBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock,
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CShuffleBlockTransferScalarPerVector_NPerBlock,
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LoopSched>;
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LoopSched,
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matrix_padder.PadN>;
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// Argument
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// FIXME: constness
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@@ -711,7 +547,10 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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c_element_op_{c_element_op},
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batch_count_(Batch),
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compute_base_ptr_of_batch_{
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BatchStrideA, BatchStrideB, BatchStrideB1, c_grid_desc_g_m_n_}
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BatchStrideA, BatchStrideB, BatchStrideB1, c_grid_desc_g_m_n_},
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raw_lengths_m_n_k_o_{MRaw, NRaw, KRaw, Gemm1NRaw},
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c_extent_lowest_{c_gs_ms_gemm1ns_lengths.back()},
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c_stride_lowest_{c_gs_ms_gemm1ns_strides.back()}
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{
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if(GridwiseGemm::CheckValidity(a_grid_desc_ak0_m_ak1_,
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b_grid_desc_bk0_n_bk1_,
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@@ -745,6 +584,11 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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CElementwiseOperation c_element_op_;
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index_t batch_count_;
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ComputeBasePtrOfStridedBatch compute_base_ptr_of_batch_;
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// For robust IsSupportedArgument() check
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std::vector<index_t> raw_lengths_m_n_k_o_;
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index_t c_extent_lowest_;
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index_t c_stride_lowest_;
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};
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// Invoker
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@@ -859,7 +703,35 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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return false;
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}
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// TODO: Check A/B0/B1 length & stride and scalar per vector
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// Note: we need raw lengths since threadwise copy can not handle vector load when part of
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// vector is out of bounds
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const auto MRaw = arg.raw_lengths_m_n_k_o_[0];
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const auto NRaw = arg.raw_lengths_m_n_k_o_[1];
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const auto KRaw = arg.raw_lengths_m_n_k_o_[2];
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const auto Gemm1NRaw = arg.raw_lengths_m_n_k_o_[3];
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// Check scalar per vector requirement
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const auto a_extent_lowest =
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is_same_v<tensor_layout::gemm::RowMajor, ALayout> ? KRaw : MRaw;
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const auto b_extent_lowest =
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is_same_v<tensor_layout::gemm::RowMajor, BLayout> ? NRaw : KRaw;
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const auto b1_extent_lowest =
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is_same_v<tensor_layout::gemm::RowMajor, B1Layout> ? Gemm1NRaw : NRaw;
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const auto c_extent_lowest = arg.c_extent_lowest_;
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if(!(a_extent_lowest % ABlockTransferSrcScalarPerVector == 0 &&
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b_extent_lowest % BBlockTransferSrcScalarPerVector == 0 &&
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b1_extent_lowest % B1BlockTransferSrcScalarPerVector == 0 &&
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c_extent_lowest % CShuffleBlockTransferScalarPerVector_NPerBlock == 0))
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{
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return false;
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}
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// Check vector store requirement; assumes last dimension in N to be contiguous
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if(arg.c_stride_lowest_ != 1)
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{
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return false;
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}
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return GridwiseGemm::CheckValidity(arg.a_grid_desc_ak0_m_ak1_,
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arg.b_grid_desc_bk0_n_bk1_,
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@@ -996,7 +868,8 @@ struct DeviceBatchedGemmSoftmaxGemmPermute_Xdl_CShuffle
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<< MPerBlock << ", "
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<< Gemm1NPerBlock << ", "
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<< Gemm1KPerBlock << ", "
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<< B1K1 << ">";
|
||||
<< B1K1 << ", "
|
||||
<< getGemmSpecializationString(GemmSpec) << ">";
|
||||
// clang-format on
|
||||
|
||||
return str.str();
|
||||
|
||||
@@ -12,6 +12,7 @@
|
||||
#include "ck/tensor_operation/gpu/device/tensor_layout.hpp"
|
||||
#include "ck/tensor_operation/gpu/device/device_batched_gemm_softmax_gemm.hpp"
|
||||
#include "ck/tensor_operation/gpu/device/gemm_specialization.hpp"
|
||||
#include "ck/tensor_operation/gpu/device/matrix_padder.hpp"
|
||||
#include "ck/tensor_operation/gpu/grid/gridwise_batched_gemm_softmax_gemm_xdl_cshuffle_v1.hpp"
|
||||
#include "ck/host_utility/device_prop.hpp"
|
||||
#include "ck/host_utility/kernel_launch.hpp"
|
||||
@@ -198,6 +199,13 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
static constexpr auto I1 = Number<1>{};
|
||||
static constexpr auto I2 = Number<2>{};
|
||||
|
||||
static constexpr auto matrix_padder =
|
||||
GemmGemmPadder<GemmSpec, index_t, index_t, index_t, index_t>{
|
||||
MPerBlock, NPerBlock, KPerBlock, Gemm1NPerBlock};
|
||||
|
||||
// FIXME: pad K
|
||||
static_assert(!matrix_padder.PadK, "KPadding is currently not supported");
|
||||
|
||||
static auto MakeAGridDescriptor_AK0_M_AK1(index_t MRaw, index_t KRaw, index_t StrideA)
|
||||
{
|
||||
const auto a_grid_desc_mraw_kraw = [&]() {
|
||||
@@ -213,92 +221,18 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
}
|
||||
}();
|
||||
|
||||
const auto M = math::integer_divide_ceil(MRaw, MPerBlock) * MPerBlock;
|
||||
const auto K = math::integer_divide_ceil(KRaw, KPerBlock) * KPerBlock;
|
||||
const auto a_grid_desc_m_k = matrix_padder.PadADescriptor_M_K(a_grid_desc_mraw_kraw);
|
||||
|
||||
const auto MPad = M - MRaw;
|
||||
const auto KPad = K - KRaw;
|
||||
const auto M = a_grid_desc_m_k.GetLength(I0);
|
||||
const auto K = a_grid_desc_m_k.GetLength(I1);
|
||||
|
||||
if constexpr(GemmSpec == GemmSpecialization::MKPadding ||
|
||||
GemmSpec == GemmSpecialization::MNKPadding)
|
||||
{
|
||||
// pad both M and K
|
||||
assert(K % AK1 == 0);
|
||||
const auto AK0 = K / AK1;
|
||||
|
||||
const auto AK0 = K / AK1;
|
||||
|
||||
const auto a_grid_desc_m_k =
|
||||
transform_tensor_descriptor(a_grid_desc_mraw_kraw,
|
||||
make_tuple(make_right_pad_transform(MRaw, MPad),
|
||||
make_right_pad_transform(KRaw, KPad)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
|
||||
const auto a_grid_desc_ak0_m_ak1 =
|
||||
transform_tensor_descriptor(a_grid_desc_m_k,
|
||||
make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
|
||||
make_pass_through_transform(M)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return a_grid_desc_ak0_m_ak1;
|
||||
}
|
||||
else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
|
||||
GemmSpec == GemmSpecialization::MNPadding)
|
||||
{
|
||||
// pad M, but not K
|
||||
assert(KRaw % AK1 == 0);
|
||||
|
||||
const auto AK0 = KRaw / AK1;
|
||||
|
||||
const auto a_grid_desc_ak0_m_ak1 =
|
||||
transform_tensor_descriptor(a_grid_desc_mraw_kraw,
|
||||
make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
|
||||
make_right_pad_transform(MRaw, MPad)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return a_grid_desc_ak0_m_ak1;
|
||||
}
|
||||
else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
|
||||
GemmSpec == GemmSpecialization::NKPadding)
|
||||
{
|
||||
// pad K, but not M
|
||||
assert(K % AK1 == 0);
|
||||
|
||||
const auto AK0 = K / AK1;
|
||||
|
||||
const auto a_grid_desc_m_k = transform_tensor_descriptor(
|
||||
a_grid_desc_mraw_kraw,
|
||||
make_tuple(make_pass_through_transform(MRaw), make_right_pad_transform(KRaw, KPad)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
|
||||
const auto a_grid_desc_ak0_m_ak1 =
|
||||
transform_tensor_descriptor(a_grid_desc_m_k,
|
||||
make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
|
||||
make_pass_through_transform(MRaw)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return a_grid_desc_ak0_m_ak1;
|
||||
}
|
||||
else
|
||||
{
|
||||
// not pad M or K
|
||||
assert(KRaw % AK1 == 0);
|
||||
|
||||
const auto AK0 = KRaw / AK1;
|
||||
|
||||
const auto a_grid_desc_ak0_m_ak1 =
|
||||
transform_tensor_descriptor(a_grid_desc_mraw_kraw,
|
||||
make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
|
||||
make_pass_through_transform(MRaw)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return a_grid_desc_ak0_m_ak1;
|
||||
}
|
||||
return transform_tensor_descriptor(a_grid_desc_m_k,
|
||||
make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
|
||||
make_pass_through_transform(M)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
}
|
||||
|
||||
static auto MakeBGridDescriptor_BK0_N_BK1(index_t KRaw, index_t NRaw, index_t StrideB)
|
||||
@@ -316,84 +250,18 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
}
|
||||
}();
|
||||
|
||||
const auto N = math::integer_divide_ceil(NRaw, NPerBlock) * NPerBlock;
|
||||
const auto K = math::integer_divide_ceil(KRaw, KPerBlock) * KPerBlock;
|
||||
const auto b_grid_desc_n_k = matrix_padder.PadBDescriptor_N_K(b_grid_desc_nraw_kraw);
|
||||
|
||||
const auto NPad = N - NRaw;
|
||||
const auto KPad = K - KRaw;
|
||||
const auto N = b_grid_desc_n_k.GetLength(I0);
|
||||
const auto K = b_grid_desc_n_k.GetLength(I1);
|
||||
|
||||
if constexpr(GemmSpec == GemmSpecialization::NKPadding ||
|
||||
GemmSpec == GemmSpecialization::MNKPadding)
|
||||
{
|
||||
// pad both N and K
|
||||
const auto BK0 = K / BK1;
|
||||
const auto BK0 = K / BK1;
|
||||
|
||||
const auto b_grid_desc_n_k =
|
||||
transform_tensor_descriptor(b_grid_desc_nraw_kraw,
|
||||
make_tuple(make_right_pad_transform(NRaw, NPad),
|
||||
make_right_pad_transform(KRaw, KPad)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
|
||||
const auto b_grid_desc_bk0_n_bk1 =
|
||||
transform_tensor_descriptor(b_grid_desc_n_k,
|
||||
make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
|
||||
make_pass_through_transform(N)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return b_grid_desc_bk0_n_bk1;
|
||||
}
|
||||
else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
|
||||
GemmSpec == GemmSpecialization::MNPadding)
|
||||
{
|
||||
// pad N, but not K
|
||||
const auto BK0 = KRaw / BK1;
|
||||
|
||||
const auto b_grid_desc_bk0_n_bk1 =
|
||||
transform_tensor_descriptor(b_grid_desc_nraw_kraw,
|
||||
make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
|
||||
make_right_pad_transform(NRaw, NPad)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return b_grid_desc_bk0_n_bk1;
|
||||
}
|
||||
else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
|
||||
GemmSpec == GemmSpecialization::MKPadding)
|
||||
{
|
||||
// pad K, but not N
|
||||
const auto BK0 = K / BK1;
|
||||
|
||||
const auto b_grid_desc_n_k = transform_tensor_descriptor(
|
||||
b_grid_desc_nraw_kraw,
|
||||
make_tuple(make_pass_through_transform(NRaw), make_right_pad_transform(KRaw, KPad)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
|
||||
const auto b_grid_desc_bk0_n_bk1 =
|
||||
transform_tensor_descriptor(b_grid_desc_n_k,
|
||||
make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
|
||||
make_pass_through_transform(NRaw)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return b_grid_desc_bk0_n_bk1;
|
||||
}
|
||||
else
|
||||
{
|
||||
// not pad N or K
|
||||
const auto BK0 = KRaw / BK1;
|
||||
|
||||
const auto b_grid_desc_bk0_n_bk1 =
|
||||
transform_tensor_descriptor(b_grid_desc_nraw_kraw,
|
||||
make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
|
||||
make_pass_through_transform(NRaw)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return b_grid_desc_bk0_n_bk1;
|
||||
}
|
||||
return transform_tensor_descriptor(b_grid_desc_n_k,
|
||||
make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
|
||||
make_pass_through_transform(N)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
}
|
||||
|
||||
// Args: Gemm1KRaw, Gemm1NRaw, StrideB1
|
||||
@@ -412,47 +280,19 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
}
|
||||
}();
|
||||
|
||||
const auto N = math::integer_divide_ceil(NRaw, Gemm1NPerBlock) * Gemm1NPerBlock;
|
||||
const auto K = math::integer_divide_ceil(KRaw, Gemm1KPerBlock) * Gemm1KPerBlock;
|
||||
const auto b1_grid_desc_n_k = matrix_padder.PadB1Descriptor_N_K(b1_grid_desc_nraw_kraw);
|
||||
|
||||
const auto NPad = N - NRaw;
|
||||
const auto KPad = K - KRaw;
|
||||
const auto N = b1_grid_desc_n_k.GetLength(I0);
|
||||
const auto K = b1_grid_desc_n_k.GetLength(I1);
|
||||
|
||||
// TODO: implement finer-grained padding
|
||||
if constexpr(GemmSpec == GemmSpecialization::Default)
|
||||
{
|
||||
const auto B1K0 = KRaw / B1K1;
|
||||
const auto B1K0 = K / B1K1;
|
||||
|
||||
const auto b1_grid_desc_bk0_n_bk1 = transform_tensor_descriptor(
|
||||
b1_grid_desc_nraw_kraw,
|
||||
make_tuple(make_unmerge_transform(make_tuple(B1K0, B1K1)),
|
||||
make_pass_through_transform(NRaw)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return b1_grid_desc_bk0_n_bk1;
|
||||
}
|
||||
else
|
||||
{
|
||||
// pad both B1N and B1K
|
||||
const auto B1K0 = K / B1K1;
|
||||
|
||||
const auto b1_grid_desc_n_k =
|
||||
transform_tensor_descriptor(b1_grid_desc_nraw_kraw,
|
||||
make_tuple(make_right_pad_transform(NRaw, NPad),
|
||||
make_right_pad_transform(KRaw, KPad)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
|
||||
const auto b1_grid_desc_bk0_n_bk1 = transform_tensor_descriptor(
|
||||
b1_grid_desc_n_k,
|
||||
make_tuple(make_unmerge_transform(make_tuple(B1K0, B1K1)),
|
||||
make_pass_through_transform(N)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
|
||||
return b1_grid_desc_bk0_n_bk1;
|
||||
}
|
||||
return transform_tensor_descriptor(
|
||||
b1_grid_desc_n_k,
|
||||
make_tuple(make_unmerge_transform(make_tuple(B1K0, B1K1)),
|
||||
make_pass_through_transform(N)),
|
||||
make_tuple(Sequence<1>{}, Sequence<0>{}),
|
||||
make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
|
||||
}
|
||||
|
||||
static auto MakeCGridDescriptor_M_N(index_t MRaw, index_t NRaw, index_t StrideC)
|
||||
@@ -470,47 +310,7 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
}
|
||||
}();
|
||||
|
||||
const auto M = math::integer_divide_ceil(MRaw, MPerBlock) * MPerBlock;
|
||||
const auto N = math::integer_divide_ceil(NRaw, Gemm1NPerBlock) * Gemm1NPerBlock;
|
||||
|
||||
const auto MPad = M - MRaw;
|
||||
const auto NPad = N - NRaw;
|
||||
|
||||
if constexpr(GemmSpec == GemmSpecialization::MNPadding ||
|
||||
GemmSpec == GemmSpecialization::MNKPadding)
|
||||
{
|
||||
// pad M and N
|
||||
return transform_tensor_descriptor(c_grid_desc_mraw_nraw,
|
||||
make_tuple(make_right_pad_transform(MRaw, MPad),
|
||||
make_right_pad_transform(NRaw, NPad)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
}
|
||||
else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
|
||||
GemmSpec == GemmSpecialization::MKPadding)
|
||||
{
|
||||
// pad M, but not N
|
||||
return transform_tensor_descriptor(
|
||||
c_grid_desc_mraw_nraw,
|
||||
make_tuple(make_right_pad_transform(MRaw, MPad), make_pass_through_transform(NRaw)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
}
|
||||
else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
|
||||
GemmSpec == GemmSpecialization::NKPadding)
|
||||
{
|
||||
// pad N, but not M
|
||||
return transform_tensor_descriptor(
|
||||
c_grid_desc_mraw_nraw,
|
||||
make_tuple(make_pass_through_transform(MRaw), make_right_pad_transform(NRaw, NPad)),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}),
|
||||
make_tuple(Sequence<0>{}, Sequence<1>{}));
|
||||
}
|
||||
else
|
||||
{
|
||||
// not pad M or N
|
||||
return c_grid_desc_mraw_nraw;
|
||||
}
|
||||
return matrix_padder.PadCDescriptor_M_N(c_grid_desc_mraw_nraw);
|
||||
}
|
||||
|
||||
struct ComputeBasePtrOfStridedBatch
|
||||
@@ -617,7 +417,8 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
CShuffleNXdlPerWavePerShuffle,
|
||||
CShuffleBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock,
|
||||
CShuffleBlockTransferScalarPerVector_NPerBlock,
|
||||
LoopSched>;
|
||||
LoopSched,
|
||||
matrix_padder.PadN>;
|
||||
|
||||
// Argument
|
||||
struct Argument : public BaseArgument
|
||||
@@ -661,7 +462,8 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
b1_element_op_{b1_element_op},
|
||||
c_element_op_{c_element_op},
|
||||
batch_count_(Batch),
|
||||
compute_base_ptr_of_batch_{BatchStrideA, BatchStrideB, BatchStrideB1, BatchStrideC}
|
||||
compute_base_ptr_of_batch_{BatchStrideA, BatchStrideB, BatchStrideB1, BatchStrideC},
|
||||
raw_lengths_m_n_k_o_{MRaw, NRaw, KRaw, Gemm1NRaw}
|
||||
{
|
||||
if(GridwiseGemm::CheckValidity(a_grid_desc_ak0_m_ak1_,
|
||||
b_grid_desc_bk0_n_bk1_,
|
||||
@@ -694,6 +496,9 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
CElementwiseOperation c_element_op_;
|
||||
index_t batch_count_;
|
||||
ComputeBasePtrOfStridedBatch compute_base_ptr_of_batch_;
|
||||
|
||||
// For robust IsSupportedArgument() check
|
||||
std::vector<index_t> raw_lengths_m_n_k_o_;
|
||||
};
|
||||
|
||||
// Invoker
|
||||
@@ -797,6 +602,31 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
return false;
|
||||
}
|
||||
|
||||
// Note: we need raw lengths since threadwise copy can not handle vector load when part of
|
||||
// vector is out of bounds
|
||||
const auto MRaw = arg.raw_lengths_m_n_k_o_[0];
|
||||
const auto NRaw = arg.raw_lengths_m_n_k_o_[1];
|
||||
const auto KRaw = arg.raw_lengths_m_n_k_o_[2];
|
||||
const auto Gemm1NRaw = arg.raw_lengths_m_n_k_o_[3];
|
||||
|
||||
// Check scalar per vector requirement
|
||||
const auto a_extent_lowest =
|
||||
is_same_v<tensor_layout::gemm::RowMajor, ALayout> ? KRaw : MRaw;
|
||||
const auto b_extent_lowest =
|
||||
is_same_v<tensor_layout::gemm::RowMajor, BLayout> ? NRaw : KRaw;
|
||||
const auto b1_extent_lowest =
|
||||
is_same_v<tensor_layout::gemm::RowMajor, B1Layout> ? Gemm1NRaw : NRaw;
|
||||
const auto c_extent_lowest =
|
||||
is_same_v<tensor_layout::gemm::RowMajor, CLayout> ? Gemm1NRaw : MRaw;
|
||||
|
||||
if(!(a_extent_lowest % ABlockTransferSrcScalarPerVector == 0 &&
|
||||
b_extent_lowest % BBlockTransferSrcScalarPerVector == 0 &&
|
||||
b1_extent_lowest % B1BlockTransferSrcScalarPerVector == 0 &&
|
||||
c_extent_lowest % CShuffleBlockTransferScalarPerVector_NPerBlock == 0))
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
return GridwiseGemm::CheckValidity(arg.a_grid_desc_ak0_m_ak1_,
|
||||
arg.b_grid_desc_bk0_n_bk1_,
|
||||
arg.b1_grid_desc_bk0_n_bk1_,
|
||||
@@ -913,7 +743,8 @@ struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
|
||||
<< MPerBlock << ", "
|
||||
<< Gemm1NPerBlock << ", "
|
||||
<< Gemm1KPerBlock << ", "
|
||||
<< B1K1 << ">";
|
||||
<< B1K1 << ", "
|
||||
<< getGemmSpecializationString(GemmSpec) << ">";
|
||||
// clang-format on
|
||||
|
||||
return str.str();
|
||||
|
||||
Reference in New Issue
Block a user