mirror of
https://github.com/ROCm/composable_kernel.git
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Add Conv Forward on Navi21 for ResNet50 (#490)
* add device of dl * fix k1 of GridwiseGemmDl_km_kn_mn_v1r3 * init version for dl conv * add example(init) * result right * disable elementwise operation * check parameters * add fp32,int8 example and change check code * change deive file and class name * add check vector access of C * add instance * add to ckProfiler * add Filter1x1Pad0 instances * fix ignore error * fix for CI Co-authored-by: letaoqin <letaoqin@amd.com>
This commit is contained in:
@@ -4,3 +4,7 @@ add_example_executable(example_convnd_fwd_xdl_bf16 convnd_fwd_xdl_bf16.cpp)
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add_example_executable(example_convnd_fwd_xdl_int8 convnd_fwd_xdl_int8.cpp)
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# FIXME: re-enable this exampe as test when SWDEV-335738 is fixed
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add_example_executable_no_testing(example_convnd_fwd_xdl_fp64 convnd_fwd_xdl_fp64.cpp)
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add_example_executable(example_convnd_fwd_dl_fp16 convnd_fwd_dl_fp16.cpp)
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add_example_executable(example_convnd_fwd_dl_fp32 convnd_fwd_dl_fp32.cpp)
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add_example_executable(example_convnd_fwd_dl_int8 convnd_fwd_dl_int8.cpp)
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170
example/09_convnd_fwd/convnd_fwd_dl_common.hpp
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170
example/09_convnd_fwd/convnd_fwd_dl_common.hpp
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@@ -0,0 +1,170 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2018-2022, Advanced Micro Devices, Inc. All rights reserved.
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#include <cstdlib>
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#include <iostream>
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#include <numeric>
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#include <type_traits>
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#include "ck/ck.hpp"
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#include "ck/tensor_operation/gpu/device/tensor_layout.hpp"
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#include "ck/tensor_operation/gpu/element/element_wise_operation.hpp"
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#include "ck/library/utility/check_err.hpp"
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#include "ck/library/utility/device_memory.hpp"
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#include "ck/library/utility/host_tensor.hpp"
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#include "ck/library/utility/host_tensor_generator.hpp"
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#include "ck/library/utility/convolution_parameter.hpp"
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#include "ck/library/utility/convolution_host_tensor_descriptor_helper.hpp"
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#include "ck/library/reference_tensor_operation/cpu/reference_conv_fwd.hpp"
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void print_helper_msg()
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{
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std::cout << "arg1: verification (0=no, 1=yes)\n"
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<< "arg2: initialization (0=no init, 1=integer value, 2=decimal value)\n"
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<< "arg3: time kernel (0=no, 1=yes)\n"
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<< ck::utils::conv::get_conv_param_parser_helper_msg() << std::endl;
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}
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template <ck::index_t NDimSpatial,
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typename InDataType,
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typename WeiDataType,
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typename OutDataType,
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typename InElementOp,
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typename WeiElementOp,
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typename OutElementOp,
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typename DeviceConvNDFwdInstance>
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bool run_grouped_conv_fwd_dl(bool do_verification,
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int init_method,
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bool time_kernel,
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const ck::utils::conv::ConvParam& conv_param,
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const HostTensorDescriptor& in_g_n_c_wis_desc,
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const HostTensorDescriptor& wei_g_k_c_xs_desc,
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const HostTensorDescriptor& out_g_n_k_wos_desc,
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const InElementOp& in_element_op,
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const WeiElementOp& wei_element_op,
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const OutElementOp& out_element_op)
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{
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Tensor<InDataType> in(in_g_n_c_wis_desc);
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Tensor<WeiDataType> wei(wei_g_k_c_xs_desc);
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Tensor<OutDataType> out_host(out_g_n_k_wos_desc);
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Tensor<OutDataType> out_device(out_g_n_k_wos_desc);
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std::cout << "in: " << in.mDesc << std::endl;
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std::cout << "wei: " << wei.mDesc << std::endl;
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std::cout << "out: " << out_host.mDesc << std::endl;
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switch(init_method)
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{
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case 0: break;
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case 1:
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in.GenerateTensorValue(GeneratorTensor_2<InDataType>{-5, 5});
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wei.GenerateTensorValue(GeneratorTensor_2<WeiDataType>{-5, 5});
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break;
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case 2:
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in.GenerateTensorValue(GeneratorTensor_3<InDataType>{0.0, 1.0});
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wei.GenerateTensorValue(GeneratorTensor_3<WeiDataType>{-0.5, 0.5});
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break;
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default:
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in.GenerateTensorValue(GeneratorTensor_1<InDataType>{1});
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wei.GenerateTensorValue(GeneratorTensor_1<WeiDataType>{1});
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}
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DeviceMem in_device_buf(sizeof(InDataType) * in.mDesc.GetElementSpaceSize());
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DeviceMem wei_device_buf(sizeof(WeiDataType) * wei.mDesc.GetElementSpaceSize());
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DeviceMem out_device_buf(sizeof(OutDataType) * out_device.mDesc.GetElementSpaceSize());
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in_device_buf.ToDevice(in.mData.data());
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wei_device_buf.ToDevice(wei.mData.data());
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std::array<ck::index_t, NDimSpatial + 3> a_g_n_c_wis_lengths{};
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std::array<ck::index_t, NDimSpatial + 3> a_g_n_c_wis_strides{};
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std::array<ck::index_t, NDimSpatial + 3> b_g_k_c_xs_lengths{};
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std::array<ck::index_t, NDimSpatial + 3> b_g_k_c_xs_strides{};
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std::array<ck::index_t, NDimSpatial + 3> c_g_n_k_wos_lengths{};
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std::array<ck::index_t, NDimSpatial + 3> c_g_n_k_wos_strides{};
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std::array<ck::index_t, NDimSpatial> conv_filter_strides{};
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std::array<ck::index_t, NDimSpatial> conv_filter_dilations{};
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std::array<ck::index_t, NDimSpatial> input_left_pads{};
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std::array<ck::index_t, NDimSpatial> input_right_pads{};
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auto copy = [](auto& x, auto& y) { std::copy(x.begin(), x.end(), y.begin()); };
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copy(in_g_n_c_wis_desc.GetLengths(), a_g_n_c_wis_lengths);
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copy(in_g_n_c_wis_desc.GetStrides(), a_g_n_c_wis_strides);
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copy(wei_g_k_c_xs_desc.GetLengths(), b_g_k_c_xs_lengths);
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copy(wei_g_k_c_xs_desc.GetStrides(), b_g_k_c_xs_strides);
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copy(out_g_n_k_wos_desc.GetLengths(), c_g_n_k_wos_lengths);
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copy(out_g_n_k_wos_desc.GetStrides(), c_g_n_k_wos_strides);
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copy(conv_param.conv_filter_strides_, conv_filter_strides);
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copy(conv_param.conv_filter_dilations_, conv_filter_dilations);
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copy(conv_param.input_left_pads_, input_left_pads);
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copy(conv_param.input_right_pads_, input_right_pads);
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// do Conv
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auto conv = DeviceConvNDFwdInstance{};
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auto invoker = conv.MakeInvoker();
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auto argument = conv.MakeArgument(in_device_buf.GetDeviceBuffer(),
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wei_device_buf.GetDeviceBuffer(),
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out_device_buf.GetDeviceBuffer(),
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a_g_n_c_wis_lengths,
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a_g_n_c_wis_strides,
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b_g_k_c_xs_lengths,
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b_g_k_c_xs_strides,
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c_g_n_k_wos_lengths,
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c_g_n_k_wos_strides,
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conv_filter_strides,
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conv_filter_dilations,
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input_left_pads,
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input_right_pads,
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in_element_op,
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wei_element_op,
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out_element_op);
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if(!conv.IsSupportedArgument(argument))
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{
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return true;
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}
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float avg_time = invoker.Run(argument, StreamConfig{nullptr, time_kernel});
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std::size_t flop = conv_param.GetFlops();
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std::size_t num_btype = conv_param.GetByte<InDataType, WeiDataType, OutDataType>();
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float tflops = static_cast<float>(flop) / 1.E9 / avg_time;
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float gb_per_sec = num_btype / 1.E6 / avg_time;
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std::cout << "Perf: " << avg_time << " ms, " << tflops << " TFlops, " << gb_per_sec << " GB/s, "
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<< conv.GetTypeString() << std::endl;
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if(do_verification)
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{
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auto ref_conv = ck::tensor_operation::host::ReferenceConvFwd<NDimSpatial,
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InDataType,
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WeiDataType,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp>();
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auto ref_invoker = ref_conv.MakeInvoker();
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auto ref_argument = ref_conv.MakeArgument(in,
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wei,
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out_host,
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conv_param.conv_filter_strides_,
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conv_param.conv_filter_dilations_,
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conv_param.input_left_pads_,
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conv_param.input_right_pads_,
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in_element_op,
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wei_element_op,
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out_element_op);
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ref_invoker.Run(ref_argument);
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out_device_buf.FromDevice(out_device.mData.data());
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return ck::utils::check_err(
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out_device.mData, out_host.mData, "Error: incorrect results!", 1e-5f, 1e-4f);
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}
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return true;
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}
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39
example/09_convnd_fwd/convnd_fwd_dl_fp16.cpp
Normal file
39
example/09_convnd_fwd/convnd_fwd_dl_fp16.cpp
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@@ -0,0 +1,39 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2018-2022, Advanced Micro Devices, Inc. All rights reserved.
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#include "convnd_fwd_dl_common.hpp"
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#include "ck/tensor_operation/gpu/device/device_grouped_conv_fwd_dl_nhwc_kyxc_nhwk.hpp"
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#include "ck/library/utility/convolution_host_tensor_descriptor_helper.hpp"
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using InDataType = ck::half_t;
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using WeiDataType = ck::half_t;
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using AccDataType = float;
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using OutDataType = ck::half_t;
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template <ck::index_t... Is>
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using S = ck::Sequence<Is...>;
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using InElementOp = ck::tensor_operation::element_wise::PassThrough;
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using WeiElementOp = ck::tensor_operation::element_wise::PassThrough;
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using OutElementOp = ck::tensor_operation::element_wise::PassThrough;
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static constexpr auto ConvSpec =
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ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
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static constexpr auto GemmPadingSpec = ck::tensor_operation::device::GemmSpecialization::MNKPadding;
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template <ck::index_t NDimSpatial, typename InLayout, typename WeiLayout, typename OutLayout>
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// clang-format off
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using DeviceGroupedConvNDFwdInstance = ck::tensor_operation::device::DeviceGroupedConvFwdDl_NHWC_KYXC_NHWK
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// ######| NDim| InData| WeiData| OutData| AccData| InLayout| WeiLayout| OutLayout| In| Wei| Out| Convolution| GEMM| Block| MPer| NPer| K0Per| K1| M1Per| N1Per| KPer| M11N11Thread| M11N11Thread| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| CThreadTransfer| CThreadTransfer| CThreadTransfer|
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// ######| Spatial| Type| Type| Type| Type| | | | Elementwise| Elementwise| Elementwise| Forward| Spacialization| Size| Block| Block| Block| | ThreadM111| ThreadN111| Thread| ClusterM110Xs| ClusterN110Xs| ThreadSliceLengths| ThreadClusterLengths| ThreadCluster| SrcAccess| SrcVectorTensor| SrcVectorTensor| DstVectorTensor| ThreadSliceLengths| ThreadClusterLengths| ThreadCluster| SrcAccess| SrcVectorTensor| SrcVectorTensor| DstVectorTensor| SrcDstAccess| SrcDstVectorDim| DstScalarPerVector|
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// ######| | | | | | | | | Operation| Operation| Operation| Specialization| | | | | | | | | | | | K0_M0_M1_K1| K0_M0_M1_K1| ArrangeOrder| Order| Lengths_K0_M0_M1_K1| ContiguousDimOrder| Lengths_K0_M0_M1_K1| K0_N0_N1_K1| K0_N0_N1_K1| ArrangeOrder| Order| Lengths_K0_N0_N1_K1| ContiguousDimOrder| Lengths_K0_N0_N1_K1| Order| | |
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// ######| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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< NDimSpatial, InDataType, WeiDataType, OutDataType, AccDataType, InLayout, WeiLayout, OutLayout, InElementOp, WeiElementOp, OutElementOp, ConvSpec, GemmPadingSpec, 256, 128, 128, 16, 2, 4, 4, 1, S<8, 2>, S<8, 2>, S<8, 1, 1, 2>, S<2, 1, 128, 1>, S<1, 2, 0, 3>, S<1, 2, 0, 3>, S<4, 1, 1, 2>, S<1, 2, 0, 3>, S<1, 1, 1, 2>, S<8, 1, 1, 2>, S<2, 1, 128, 1>, S<1, 2, 0, 3>, S<1, 2, 0, 3>, S<4, 1, 1, 2>, S<1, 2, 0, 3>, S<1, 1, 1, 2>, S<0, 1, 2, 3, 4, 5>, 5, 4>;
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// clang-format on
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#include "run_convnd_fwd_dl_example.inc"
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int main(int argc, char* argv[]) { return run_convnd_fwd_dl_example(argc, argv) ? 0 : 1; }
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39
example/09_convnd_fwd/convnd_fwd_dl_fp32.cpp
Normal file
39
example/09_convnd_fwd/convnd_fwd_dl_fp32.cpp
Normal file
@@ -0,0 +1,39 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2018-2022, Advanced Micro Devices, Inc. All rights reserved.
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#include "convnd_fwd_dl_common.hpp"
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#include "ck/tensor_operation/gpu/device/device_grouped_conv_fwd_dl_nhwc_kyxc_nhwk.hpp"
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#include "ck/library/utility/convolution_host_tensor_descriptor_helper.hpp"
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using InDataType = float;
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using WeiDataType = float;
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using AccDataType = float;
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using OutDataType = float;
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template <ck::index_t... Is>
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using S = ck::Sequence<Is...>;
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using InElementOp = ck::tensor_operation::element_wise::PassThrough;
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using WeiElementOp = ck::tensor_operation::element_wise::PassThrough;
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using OutElementOp = ck::tensor_operation::element_wise::PassThrough;
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static constexpr auto ConvSpec =
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ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
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static constexpr auto GemmPadingSpec = ck::tensor_operation::device::GemmSpecialization::MNKPadding;
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template <ck::index_t NDimSpatial, typename InLayout, typename WeiLayout, typename OutLayout>
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// clang-format off
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using DeviceGroupedConvNDFwdInstance = ck::tensor_operation::device::DeviceGroupedConvFwdDl_NHWC_KYXC_NHWK
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// ######| NDim| InData| WeiData| OutData| AccData| InLayout| WeiLayout| OutLayout| In| Wei| Out| Convolution| GEMM| Block| MPer| NPer| K0Per| K1| M1Per| N1Per| KPer| M11N11Thread| M11N11Thread| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| CThreadTransfer| CThreadTransfer| CThreadTransfer|
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// ######| Spatial| Type| Type| Type| Type| | | | Elementwise| Elementwise| Elementwise| Forward| Spacialization| Size| Block| Block| Block| | ThreadM111| ThreadN111| Thread| ClusterM110Xs| ClusterN110Xs| ThreadSliceLengths| ThreadClusterLengths| ThreadCluster| SrcAccess| SrcVectorTensor| SrcVectorTensor| DstVectorTensor| ThreadSliceLengths| ThreadClusterLengths| ThreadCluster| SrcAccess| SrcVectorTensor| SrcVectorTensor| DstVectorTensor| SrcDstAccess| SrcDstVectorDim| DstScalarPerVector|
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// ######| | | | | | | | | Operation| Operation| Operation| Specialization| | | | | | | | | | | | K0_M0_M1_K1| K0_M0_M1_K1| ArrangeOrder| Order| Lengths_K0_M0_M1_K1| ContiguousDimOrder| Lengths_K0_M0_M1_K1| K0_N0_N1_K1| K0_N0_N1_K1| ArrangeOrder| Order| Lengths_K0_N0_N1_K1| ContiguousDimOrder| Lengths_K0_N0_N1_K1| Order| | |
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// ######| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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< NDimSpatial, InDataType, WeiDataType, OutDataType, AccDataType, InLayout, WeiLayout, OutLayout, InElementOp, WeiElementOp, OutElementOp, ConvSpec, GemmPadingSpec, 256, 128, 128, 16, 1, 4, 4, 1, S<8, 2>, S<8, 2>, S<8, 1, 1, 1>, S<2, 1, 128, 1>, S<1, 2, 0, 3>, S<1, 2, 0, 3>, S<4, 1, 1, 1>, S<1, 2, 0, 3>, S<1, 1, 1, 1>, S<8, 1, 1, 1>, S<2, 1, 128, 1>, S<1, 2, 0, 3>, S<1, 2, 0, 3>, S<4, 1, 1, 1>, S<1, 2, 0, 3>, S<1, 1, 1, 1>, S<0, 1, 2, 3, 4, 5>, 5, 4>;
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// clang-format on
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#include "run_convnd_fwd_dl_example.inc"
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int main(int argc, char* argv[]) { return run_convnd_fwd_dl_example(argc, argv) ? 0 : 1; }
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39
example/09_convnd_fwd/convnd_fwd_dl_int8.cpp
Normal file
39
example/09_convnd_fwd/convnd_fwd_dl_int8.cpp
Normal file
@@ -0,0 +1,39 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2018-2022, Advanced Micro Devices, Inc. All rights reserved.
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#include "convnd_fwd_dl_common.hpp"
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#include "ck/tensor_operation/gpu/device/device_grouped_conv_fwd_dl_nhwc_kyxc_nhwk.hpp"
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#include "ck/library/utility/convolution_host_tensor_descriptor_helper.hpp"
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using InDataType = int8_t;
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using WeiDataType = int8_t;
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using AccDataType = int32_t;
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using OutDataType = int8_t;
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template <ck::index_t... Is>
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using S = ck::Sequence<Is...>;
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using InElementOp = ck::tensor_operation::element_wise::PassThrough;
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using WeiElementOp = ck::tensor_operation::element_wise::PassThrough;
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using OutElementOp = ck::tensor_operation::element_wise::PassThrough;
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static constexpr auto ConvSpec =
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ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
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static constexpr auto GemmPadingSpec = ck::tensor_operation::device::GemmSpecialization::MNKPadding;
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template <ck::index_t NDimSpatial, typename InLayout, typename WeiLayout, typename OutLayout>
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// clang-format off
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using DeviceGroupedConvNDFwdInstance = ck::tensor_operation::device::DeviceGroupedConvFwdDl_NHWC_KYXC_NHWK
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// ######| NDim| InData| WeiData| OutData| AccData| InLayout| WeiLayout| OutLayout| In| Wei| Out| Convolution| GEMM| Block| MPer| NPer| K0Per| K1| M1Per| N1Per| KPer| M11N11Thread| M11N11Thread| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| CThreadTransfer| CThreadTransfer| CThreadTransfer|
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// ######| Spatial| Type| Type| Type| Type| | | | Elementwise| Elementwise| Elementwise| Forward| Spacialization| Size| Block| Block| Block| | ThreadM111| ThreadN111| Thread| ClusterM110Xs| ClusterN110Xs| ThreadSliceLengths| ThreadClusterLengths| ThreadCluster| SrcAccess| SrcVectorTensor| SrcVectorTensor| DstVectorTensor| ThreadSliceLengths| ThreadClusterLengths| ThreadCluster| SrcAccess| SrcVectorTensor| SrcVectorTensor| DstVectorTensor| SrcDstAccess| SrcDstVectorDim| DstScalarPerVector|
|
||||
// ######| | | | | | | | | Operation| Operation| Operation| Specialization| | | | | | | | | | | | K0_M0_M1_K1| K0_M0_M1_K1| ArrangeOrder| Order| Lengths_K0_M0_M1_K1| ContiguousDimOrder| Lengths_K0_M0_M1_K1| K0_N0_N1_K1| K0_N0_N1_K1| ArrangeOrder| Order| Lengths_K0_N0_N1_K1| ContiguousDimOrder| Lengths_K0_N0_N1_K1| Order| | |
|
||||
// ######| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
|
||||
< NDimSpatial, InDataType, WeiDataType, OutDataType, AccDataType, InLayout, WeiLayout, OutLayout, InElementOp, WeiElementOp, OutElementOp, ConvSpec, GemmPadingSpec, 256, 128, 128, 16, 4, 4, 4, 1, S<8, 2>, S<8, 2>, S<8, 1, 1, 4>, S<2, 1, 128, 1>, S<1, 2, 0, 3>, S<1, 2, 0, 3>, S<4, 1, 1, 4>, S<1, 2, 0, 3>, S<1, 1, 1, 4>, S<8, 1, 1, 4>, S<2, 1, 128, 1>, S<1, 2, 0, 3>, S<1, 2, 0, 3>, S<4, 1, 1, 4>, S<1, 2, 0, 3>, S<1, 1, 1, 4>, S<0, 1, 2, 3, 4, 5>, 5, 4>;
|
||||
// clang-format on
|
||||
|
||||
#include "run_convnd_fwd_dl_example.inc"
|
||||
|
||||
int main(int argc, char* argv[]) { return run_convnd_fwd_dl_example(argc, argv) ? 0 : 1; }
|
||||
97
example/09_convnd_fwd/run_convnd_fwd_dl_example.inc
Normal file
97
example/09_convnd_fwd/run_convnd_fwd_dl_example.inc
Normal file
@@ -0,0 +1,97 @@
|
||||
// SPDX-License-Identifier: MIT
|
||||
// Copyright (c) 2018-2022, Advanced Micro Devices, Inc. All rights reserved.
|
||||
|
||||
#pragma once
|
||||
|
||||
bool run_convnd_fwd_dl_example(int argc, char* argv[])
|
||||
{
|
||||
print_helper_msg();
|
||||
bool do_verification = true;
|
||||
int init_method = 1;
|
||||
bool time_kernel = false;
|
||||
|
||||
ck::utils::conv::ConvParam conv_param{
|
||||
2, 1, 128, 256, 192, {3, 3}, {71, 71}, {2, 2}, {1, 1}, {1, 1}, {1, 1}};
|
||||
|
||||
if(argc == 1)
|
||||
{
|
||||
// use default
|
||||
}
|
||||
else if(argc == 4)
|
||||
{
|
||||
do_verification = std::stoi(argv[1]);
|
||||
init_method = std::stoi(argv[2]);
|
||||
time_kernel = std::stoi(argv[3]);
|
||||
}
|
||||
else
|
||||
{
|
||||
do_verification = std::stoi(argv[1]);
|
||||
init_method = std::stoi(argv[2]);
|
||||
time_kernel = std::stoi(argv[3]);
|
||||
const ck::index_t num_dim_spatial = std::stoi(argv[4]);
|
||||
|
||||
conv_param = ck::utils::conv::parse_conv_param(num_dim_spatial, 5, argv);
|
||||
}
|
||||
|
||||
const auto in_element_op = InElementOp{};
|
||||
const auto wei_element_op = WeiElementOp{};
|
||||
const auto out_element_op = OutElementOp{};
|
||||
|
||||
const auto run = [&](auto ndim_spatial, auto in_layout, auto wei_layout, auto out_layout) {
|
||||
constexpr ck::index_t ndim_spatial_value = ndim_spatial.value;
|
||||
std::cout << "ndim_spatial_value: " << ndim_spatial_value << std::endl;
|
||||
|
||||
using InLayout = decltype(in_layout);
|
||||
using WeiLayout = decltype(wei_layout);
|
||||
using OutLayout = decltype(out_layout);
|
||||
|
||||
const auto in_g_n_c_wis_desc =
|
||||
ck::utils::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(
|
||||
conv_param);
|
||||
|
||||
const auto wei_g_k_c_xs_desc =
|
||||
ck::utils::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(
|
||||
conv_param);
|
||||
|
||||
const auto out_g_n_k_wos_desc =
|
||||
ck::utils::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(
|
||||
conv_param);
|
||||
|
||||
return run_grouped_conv_fwd_dl<
|
||||
ndim_spatial_value,
|
||||
InDataType,
|
||||
WeiDataType,
|
||||
OutDataType,
|
||||
InElementOp,
|
||||
WeiElementOp,
|
||||
OutElementOp,
|
||||
DeviceGroupedConvNDFwdInstance<ndim_spatial_value, InLayout, WeiLayout, OutLayout>>(
|
||||
do_verification,
|
||||
init_method,
|
||||
time_kernel,
|
||||
conv_param,
|
||||
in_g_n_c_wis_desc,
|
||||
wei_g_k_c_xs_desc,
|
||||
out_g_n_k_wos_desc,
|
||||
in_element_op,
|
||||
wei_element_op,
|
||||
out_element_op);
|
||||
};
|
||||
|
||||
namespace ctc = ck::tensor_layout::convolution;
|
||||
|
||||
if(conv_param.num_dim_spatial_ == 1)
|
||||
{
|
||||
return run(ck::Number<1>{}, ctc::GNWC{}, ctc::GKXC{}, ctc::GNWK{});
|
||||
}
|
||||
else if(conv_param.num_dim_spatial_ == 2)
|
||||
{
|
||||
return run(ck::Number<2>{}, ctc::GNHWC{}, ctc::GKYXC{}, ctc::GNHWK{});
|
||||
}
|
||||
else if(conv_param.num_dim_spatial_ == 3)
|
||||
{
|
||||
return run(ck::Number<3>{}, ctc::GNDHWC{}, ctc::GKZYXC{}, ctc::GNDHWK{});
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
Reference in New Issue
Block a user