mirror of
https://github.com/ROCm/composable_kernel.git
synced 2026-05-16 19:09:59 +00:00
[CK Tile] Int8 Support on CK Tile GEMM (#2267)
* updates to support int8 in 03_gemm example
* added comments, using aliases, helper functions
* test(gemm_universal): add test cases for int8 gemm pipeline
* fix(test_gemm): fix for failing test unit test for int8
* test(ck_tile): add int8 unit test for gemm universal
* refactor(gemm_universal): GPU reference verification for GEMM code improved
* style(gemm_universal): removed extra comments and did clang format
* merging recent changes to universal gemm to tile_engine
* ck tile engine integration work
* feat(tile_engine): add int8 support to tile engine ops/gemm
* feat(tile_engine): added 32 32 16 mfma instances to tile engine for int8
* style: Format code with clang-format-12
* refactor(tile_engine): address review comments
* style: removed unhelpful comments & unused variables.
* build: tile engine uses default config
* feat: add int8 support for CK_TILE GEMM
* style: added trailing commas to codegen_utils.py
* refactor: tile engine
* refactor: formatting and code review
* refactor: code formatting for python files
* fix: suppress build warning
* add support for gfx950
* refactor:KWarpTile size in gemms util
* Fix the branch and wrap up the k warp tile
* Add bf8 integration
* refactor: clang format and rebase
---------
Co-authored-by: zjli2013 <leezhengjiang@gmail.com>
Co-authored-by: AviralGoelAMD <aviral.goel@amd.com>
Co-authored-by: Khushbu Agarwal <khuagarw@amd.com>
[ROCm/composable_kernel commit: e03293ebce]
This commit is contained in:
@@ -30,7 +30,7 @@ args:
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-stride_c Tensor C stride (default:0)
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-v 0. No validation, 1. Validation on CPU, 2. Validation on GPU (default:2)
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-e Absolute error tolerance (default:1e-5)
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-prec data type. fp16/bf16/fp8/bf8 (default:fp16)
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-prec data type. fp16/bf16/fp8/bf8/int8 (default:fp16)
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-warmup number of iterations before benchmark the kernel (default:10)
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-repeat number of iterations to benchmark the kernel (default:100)
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-timer gpu:gpu timer, cpu:cpu timer (default:gpu)
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@@ -212,6 +212,11 @@ int run_gemm_example(int argc, char* argv[])
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return run_gemm_example_prec_type<ck_tile::bf8_t, ck_tile::bf8_t, ck_tile::half_t>(
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a_layout, b_layout, argc, argv);
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}
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else if(data_type == "i8")
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{
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return run_gemm_example_prec_type<ck_tile::int8_t, ck_tile::int8_t, int32_t>(
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a_layout, b_layout, argc, argv);
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}
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else if(data_type == "pk_int4_t")
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{
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// TODO: Add support for bhalf_t ADataType
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@@ -1,4 +1,3 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2024-2025, Advanced Micro Devices, Inc. All rights reserved.
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@@ -16,6 +15,25 @@
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#define CK_TILE_PIPELINE_COMPUTE_V4 3
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#define CK_TILE_PIPELINE_COMPUTE_V5 4
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// temporary workaround to get k_warp_tile based on PrecType and gfx950 or not
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template <typename PrecType, ck_tile::index_t M_Warp_Tile>
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constexpr ck_tile::index_t get_k_warp_tile()
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{
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#if defined(__gfx950__)
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constexpr bool is_8bit_float =
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std::is_same_v<PrecType, ck_tile::fp8_t> || std::is_same_v<PrecType, ck_tile::bf8_t>;
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if constexpr(M_Warp_Tile == 32)
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return is_8bit_float ? 64 : 16;
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else
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return is_8bit_float ? 128 : 32;
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#else
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if constexpr(M_Warp_Tile == 32)
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return 16;
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else
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return 32;
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#endif
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}
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struct GemmConfigBase
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{
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static constexpr bool kPadM = false;
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@@ -90,7 +108,7 @@ struct GemmConfigComputeV3 : public GemmConfigBase
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = sizeof(PrecType) == 2 ? 16 : 64;
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static constexpr ck_tile::index_t K_Warp_Tile = get_k_warp_tile<PrecType, M_Warp_Tile>();
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V3;
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@@ -109,7 +127,7 @@ struct GemmConfigComputeV3_1 : public GemmConfigBase
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = sizeof(PrecType) == 2 ? 16 : 64;
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static constexpr ck_tile::index_t K_Warp_Tile = get_k_warp_tile<PrecType, M_Warp_Tile>();
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V3;
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@@ -128,7 +146,7 @@ struct GemmConfigComputeV3_2 : public GemmConfigBase
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static constexpr ck_tile::index_t M_Warp_Tile = 16;
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static constexpr ck_tile::index_t N_Warp_Tile = 16;
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static constexpr ck_tile::index_t K_Warp_Tile = sizeof(PrecType) == 2 ? 32 : 128;
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static constexpr ck_tile::index_t K_Warp_Tile = get_k_warp_tile<PrecType, M_Warp_Tile>();
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V3;
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@@ -151,7 +169,7 @@ struct GemmConfigComputeV4 : public GemmConfigBase
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = sizeof(PrecType) == 2 ? 16 : 64;
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static constexpr ck_tile::index_t K_Warp_Tile = get_k_warp_tile<PrecType, M_Warp_Tile>();
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static constexpr bool DoubleSmemBuffer = true;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V4;
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@@ -170,7 +188,7 @@ struct GemmConfigComputeV4_1 : public GemmConfigBase
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = sizeof(PrecType) == 2 ? 16 : 64;
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static constexpr ck_tile::index_t K_Warp_Tile = get_k_warp_tile<PrecType, M_Warp_Tile>();
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static constexpr bool DoubleSmemBuffer = true;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V4;
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@@ -189,7 +207,7 @@ struct GemmConfigComputeV5 : public GemmConfigBase
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static constexpr ck_tile::index_t M_Warp_Tile = 32;
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static constexpr ck_tile::index_t N_Warp_Tile = 32;
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static constexpr ck_tile::index_t K_Warp_Tile = sizeof(PrecType) == 2 ? 16 : 64;
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static constexpr ck_tile::index_t K_Warp_Tile = get_k_warp_tile<PrecType, M_Warp_Tile>();
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static constexpr bool DoubleSmemBuffer = false;
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static constexpr ck_tile::index_t Pipeline = CK_TILE_PIPELINE_COMPUTE_V5;
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@@ -245,6 +263,15 @@ struct GemmTypeConfig<ck_tile::half_t, ck_tile::pk_int4_t, ck_tile::half_t>
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using CDataType = ck_tile::half_t;
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};
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template <>
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struct GemmTypeConfig<ck_tile::int8_t, ck_tile::int8_t, int32_t>
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{
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using ADataType = ck_tile::int8_t;
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using BDataType = ck_tile::int8_t;
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using AccDataType = int32_t;
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using CDataType = int32_t;
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};
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template <typename T>
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struct DataTypeTraits;
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@@ -260,6 +287,12 @@ struct DataTypeTraits<double>
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static constexpr const char* name = "fp64";
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};
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template <>
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struct DataTypeTraits<int32_t>
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{
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static constexpr const char* name = "int32";
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};
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template <>
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struct DataTypeTraits<ck_tile::half_t>
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{
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@@ -290,6 +323,12 @@ struct DataTypeTraits<ck_tile::pk_int4_t>
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static constexpr const char* name = "pk_int4_t";
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};
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template <>
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struct DataTypeTraits<ck_tile::int8_t>
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{
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static constexpr const char* name = "int8";
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};
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template <ck_tile::index_t PipelineId>
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struct PipelineTypeTraits;
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@@ -297,8 +297,8 @@ int run_gemm_example_with_layouts(int argc,
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if(init_method == 0)
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{
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ck_tile::FillUniformDistribution<ADataType>{-1.f, 1.f}(a_m_k);
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ck_tile::FillUniformDistribution<BDataType>{-1.f, 1.f}(b_k_n);
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ck_tile::FillUniformDistribution<ADataType>{-5.f, 5.f}(a_m_k);
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ck_tile::FillUniformDistribution<BDataType>{-5.f, 5.f}(b_k_n);
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}
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else if(init_method == 1)
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{
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@@ -415,29 +415,19 @@ int run_gemm_example_with_layouts(int argc,
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// Restore input for B for gpu reference
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b_k_n_dev_buf.ToDevice(b_k_n.data());
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}
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// memory on host to store gpu reference result
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ck_tile::HostTensor<CDataType> c_m_n_gpu_ref(
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ck_tile::host_tensor_descriptor(M, N, stride_C, is_row_major(CLayout{})));
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// memory on device to store gpu reference result
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ck_tile::DeviceMem c_m_n_gpu_buf_ref(c_m_n_gpu_ref.get_element_space_size_in_bytes());
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c_m_n_gpu_ref.SetZero();
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c_m_n_gpu_buf_ref.SetZero();
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ADataType* d_A;
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BDataType* d_B;
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CDataType* d_C;
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ck_tile::hip_check_error(hipMalloc(&d_A, a_m_k.get_element_space_size_in_bytes()));
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ck_tile::hip_check_error(hipMalloc(&d_B, b_k_n.get_element_space_size_in_bytes()));
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ck_tile::hip_check_error(
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hipMalloc(&d_C, c_m_n_dev_result.get_element_space_size_in_bytes()));
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ck_tile::hip_check_error(hipMemcpy(d_A,
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a_m_k_dev_buf.GetDeviceBuffer(),
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a_m_k.get_element_space_size_in_bytes(),
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hipMemcpyHostToDevice));
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ck_tile::hip_check_error(hipMemcpy(d_B,
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b_k_n_dev_buf.GetDeviceBuffer(),
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b_k_n.get_element_space_size_in_bytes(),
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hipMemcpyHostToDevice));
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ADataType* d_A = static_cast<ADataType*>(a_m_k_dev_buf.GetDeviceBuffer());
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BDataType* d_B = static_cast<BDataType*>(b_k_n_dev_buf.GetDeviceBuffer());
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CDataType* d_C = static_cast<CDataType*>(c_m_n_gpu_buf_ref.GetDeviceBuffer());
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ck_tile::reference_gemm_gpu<ADataType,
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BDataType,
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@@ -447,16 +437,8 @@ int run_gemm_example_with_layouts(int argc,
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BLayout,
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CLayout>(d_A, d_B, d_C, M, N, K, stride_A, stride_B, stride_C);
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ck_tile::hip_check_error(hipMemcpy(c_m_n_gpu_buf_ref.GetDeviceBuffer(),
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d_C,
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c_m_n_dev_result.get_element_space_size_in_bytes(),
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hipMemcpyDeviceToHost));
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ck_tile::hip_check_error(hipFree(d_A));
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ck_tile::hip_check_error(hipFree(d_B));
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ck_tile::hip_check_error(hipFree(d_C));
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c_m_n_gpu_buf_ref.FromDevice(c_m_n_gpu_ref.data());
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const float max_accumulated_value =
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*std::max_element(c_m_n_gpu_ref.mData.begin(), c_m_n_gpu_ref.mData.end());
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const auto rtol_atol = calculate_rtol_atol<ADataType, BDataType, AccDataType, CDataType>(
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@@ -299,6 +299,13 @@ int run_gemm_example(int argc, char* argv[])
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ck_tile::bf8_t,
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ck_tile::half_t>(a_layout, b_layout, argc, argv);
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}
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else if(data_type == "int8")
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{
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return run_gemm_example_prec_type<GemmConfig<ck_tile::int8_t>,
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ck_tile::int8_t,
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ck_tile::int8_t,
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ck_tile::int32_t>(a_layout, b_layout, argc, argv);
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}
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else if(data_type == "pk_int4_t")
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{
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// TODO: Add support for bhalf_t ADataType
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