From 993a823cd1fa32c7a87b3eb4fbc5e4d8c027fc27 Mon Sep 17 00:00:00 2001 From: qin letao Date: Wed, 5 Mar 2025 01:32:35 +0000 Subject: [PATCH] format and limit the range of N --- .../tensor_operation/gpu/device/device_gemm_multiple_d.hpp | 2 +- .../gridwise_gemm_xdl_cshuffle_v3_multi_d_b_preshuffle.hpp | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/include/ck/tensor_operation/gpu/device/device_gemm_multiple_d.hpp b/include/ck/tensor_operation/gpu/device/device_gemm_multiple_d.hpp index a6b18a9d06..0875a2a640 100644 --- a/include/ck/tensor_operation/gpu/device/device_gemm_multiple_d.hpp +++ b/include/ck/tensor_operation/gpu/device/device_gemm_multiple_d.hpp @@ -147,7 +147,7 @@ struct DeviceGemmMultipleDSplitKBPreShuffle : public BaseOperator virtual int GetPreShuffleParameters() = 0; }; -#define ShufflePadded 256 +#define ShufflePadded 256 } // namespace device } // namespace tensor_operation } // namespace ck diff --git a/include/ck/tensor_operation/gpu/grid/gridwise_gemm_xdl_cshuffle_v3_multi_d_b_preshuffle.hpp b/include/ck/tensor_operation/gpu/grid/gridwise_gemm_xdl_cshuffle_v3_multi_d_b_preshuffle.hpp index 62867f3590..49a2f47539 100644 --- a/include/ck/tensor_operation/gpu/grid/gridwise_gemm_xdl_cshuffle_v3_multi_d_b_preshuffle.hpp +++ b/include/ck/tensor_operation/gpu/grid/gridwise_gemm_xdl_cshuffle_v3_multi_d_b_preshuffle.hpp @@ -936,6 +936,11 @@ struct GridwiseGemmMultiD_xdl_cshuffle_v3_b_preshuffle return false; } + if(karg.N % NPerXdl != 0) + { + return false; + } + if constexpr(!(GemmSpec == tensor_operation::device::GemmSpecialization::MPadding || GemmSpec == tensor_operation::device::GemmSpecialization::MNPadding || GemmSpec == tensor_operation::device::GemmSpecialization::MKPadding ||