[CK] [CK_Tile] Add GroupConv to Kernel Dispatcher (#5168)

## Motivation

This PR adds CK Tile group convolution (forward, backward-data,
backward-weight) support to the kernel dispatcher, matching and unifying
with the existing dispatcher GEMM infrastructure in architecture and
usability. The dispatcher provides a unified kernel dispatch system with
both C++ and Python frontends, and until now only supported GEMM
operations. This PR enables framework integrators to use the same
declarative kernel workflow for convolutions as they do for GEMM:
declare kernels, build a registry JIT, select kernels within the
registry at runtime, and dispatch to GPU. Future PRs will include
runtime kernel selection heuristics for autotuning of kernel parameters
based on (problem, hardware arch).

## Technical Details

Grouped convolution support has been added to the CK Tile Dispatcher
with generated_conv_backend.hpp enabling dispatcher.run(in, wei, out,
problem) for all 6 conv variants (fwd/bwdd/bwdw x 2D/3D), runtime
heuristic kernel selection, and GroupedConvKernelKey with full
ConvConfigBase fields. Python side adds parallel JIT via
registry.build(max_workers) and heuristic registry.select(). Includes 7
C++ and 6 Python examples covering all directions with CPU reference
validation, and shared infrastructure improvements (BaseRegistry CRTP,
structured exceptions). As a sanity check, JIT compile times for a
single kernel remains the same and for multiple kernels there is better
parallelism:
Kernels | 1 worker | 8 workers
1 | 7.7 s | 7.7 s
2 | 15.9 s | 8.2 s
4 | 33.4 s | 9.7 s
6 | 52.3 s | 10.2 s

## Test Plan

145 ephemeral unit tests have been added to test basic functionality.
All 30 examples/integration tests run end-to-end on gfx950 (MI350): 7
C++ conv, 7 C++ GEMM, 6 Python conv, 10 Python GEMM. CPU reference
validation for forward, backward-data, and backward-weight (2D) in both
C++ and Python examples pass.

## Test Result

30 examples pass. Peak performance: 132 TFLOPS (Batch-32 forward 56x56),
53 TFLOPS (pointwise 1x1). CPU reference accuracy: max_abs_diff < 0.002
for all directions (fp16 vs fp32 reference).

## Submission Checklist

- [x] Look over the contributing guidelines at
https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.

---------

Co-authored-by: Yaswanth Raparti <113389104+yraparti@users.noreply.github.com>
This commit is contained in:
Vidyasagar Ananthan
2026-04-09 10:38:33 -07:00
committed by GitHub
parent fb22cd0c69
commit a2b844d335
86 changed files with 15538 additions and 1500 deletions

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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
// SPDX-License-Identifier: MIT
// Example 01: Basic Grouped Convolution
//
// Demonstrates three declaration patterns (mirrors GEMM 01):
// 1. AUTOFILL - tile + pipeline only, wave/warp auto-filled
// 2. AUTOCORRECT - invalid wave(1,1,1) corrected to valid config
// 3. FULL - all parameters explicit (matches validated gfx942 config)
//
// Then runs the forward convolution on GPU and verifies output.
//
// Build: cd dispatcher/build && cmake .. && make grouped_conv_01_basic
#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <cmath>
#include "ck_tile/core.hpp"
#include "ck_tile/host.hpp"
#include "ck_tile/host/convolution_parameter.hpp"
#include "ck_tile/ops/grouped_convolution.hpp"
#include "ck_tile/dispatcher/grouped_conv_utils.hpp"
#include "ck_tile/dispatcher/example_args.hpp"
using namespace ck_tile::dispatcher;
using namespace ck_tile::dispatcher::grouped_conv_utils;
using GroupedConvSig = grouped_conv_decl::GroupedConvSignature;
using GroupedConvAlgo = grouped_conv_decl::GroupedConvAlgorithm;
using InDataType = ck_tile::half_t;
using WeiDataType = ck_tile::half_t;
using OutDataType = ck_tile::half_t;
// Three declaration patterns -- codegen auto-fills/auto-corrects as needed
DECL_GROUPED_CONV_KERNEL_SET(
basic_conv_kernels,
// Pattern 1: AUTOFILL - only tile + pipeline, rest auto-filled
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo().tile(1, 128, 128).pipeline("compv4").scheduler("intrawave"),
"gfx950")
// Pattern 2: AUTOCORRECT - wave(1,1,1) invalid, corrected to (1,4,1)
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo()
.tile(1, 64, 64)
.wave(1, 1, 1)
.warp(16, 16, 32)
.pipeline("compv3")
.scheduler("intrawave")
.epilogue("cshuffle")
.vector_sizes(4, 8, 8),
"gfx950")
// Pattern 3: FULL - all parameters explicit (validated config)
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo()
.tile(1, 128, 128)
.wave(2, 2, 1)
.warp(32, 32, 16)
.pipeline("compv3")
.scheduler("intrawave")
.epilogue("cshuffle")
.vector_sizes(4, 8, 8)
.block_per_cu(1),
"gfx950"));
int main(int argc, char* argv[])
{
utils::ExampleArgs args("Example 01: Basic Grouped Convolution",
"Declaration patterns + GPU execution");
args.add_option("--arch", "gfx950", "GPU architecture");
args.add_option("--size", "14", "Spatial size (H=W)");
args.add_option("-n", "1", "Batch size");
args.add_option("-g", "1", "Groups");
args.add_option("-c", "64", "Input channels C");
args.add_option("-k", "128", "Output channels K");
if(!args.parse(argc, argv))
return 0;
utils::print_header("Example 01: Basic Grouped Convolution");
std::string gfx_arch = args.get("--arch", "gfx950");
int N = args.get_int("-n", 1);
int G = args.get_int("-g", 1);
int C = args.get_int("-c", 64);
int K = args.get_int("-k", 128);
int HW = args.get_int("--size", 14);
int Y = 3, X = 3;
// Step 1: Show declared kernel sets
std::cout << "\nStep 1: Declared Kernel Sets\n";
GroupedConvKernelSetRegistry::instance().print();
// Step 2: Register kernels
std::cout << "\nStep 2: Register Kernels\n";
GroupedConvRegistry registry;
registry.set_name("basic_conv");
REGISTER_GENERATED_KERNELS(registry, gfx_arch);
std::cout << " Registered " << registry.size() << " kernel(s)\n";
// Step 3: Create dispatcher
std::cout << "\nStep 3: Create Dispatcher\n";
GroupedConvDispatcher dispatcher(&registry);
// Step 4: Build problem using CK Tile ConvParam
std::cout << "\nStep 4: Problem\n";
auto problem = create_grouped_conv2d_problem(N, C, K, HW, HW, Y, X, 1, 1);
problem.op = GroupedConvOp::Forward;
print_grouped_conv_problem(problem);
ck_tile::conv::ConvParam conv_param{
2,
static_cast<ck_tile::index_t>(G),
static_cast<ck_tile::index_t>(N),
static_cast<ck_tile::index_t>(K),
static_cast<ck_tile::index_t>(C),
{static_cast<ck_tile::index_t>(Y), static_cast<ck_tile::index_t>(X)},
{static_cast<ck_tile::index_t>(HW), static_cast<ck_tile::index_t>(HW)},
{1, 1},
{1, 1},
{1, 1},
{1, 1}};
using InLayout = ck_tile::tensor_layout::convolution::NHWGC;
using WeiLayout = ck_tile::tensor_layout::convolution::GKYXC;
using OutLayout = ck_tile::tensor_layout::convolution::NHWGK;
auto in_desc =
ck_tile::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(conv_param);
auto wei_desc =
ck_tile::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(conv_param);
auto out_desc =
ck_tile::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(conv_param);
ck_tile::HostTensor<InDataType> input_host(in_desc);
ck_tile::HostTensor<WeiDataType> weight_host(wei_desc);
ck_tile::HostTensor<OutDataType> output_host(out_desc);
ck_tile::FillUniformDistribution<InDataType>{-0.5f, 0.5f}(input_host);
ck_tile::FillUniformDistribution<WeiDataType>{-0.5f, 0.5f}(weight_host);
ck_tile::DeviceMem input_dev(input_host.get_element_space_size_in_bytes());
ck_tile::DeviceMem weight_dev(weight_host.get_element_space_size_in_bytes());
ck_tile::DeviceMem output_dev(output_host.get_element_space_size_in_bytes());
input_dev.ToDevice(input_host.data());
weight_dev.ToDevice(weight_host.data());
// Step 5: Select and run
std::cout << "\nStep 5: Select and Run\n";
auto* selected = dispatcher.select_kernel(problem);
if(!selected)
{
std::cerr << " ERROR: No kernel found for problem!\n";
return 1;
}
std::cout << " Selected: " << selected->name() << "\n";
float time_ms = dispatcher.run(input_dev.GetDeviceBuffer(),
weight_dev.GetDeviceBuffer(),
output_dev.GetDeviceBuffer(),
problem,
nullptr);
double tflops = calculate_conv_tflops(problem, time_ms);
std::cout << " Time: " << std::fixed << std::setprecision(4) << time_ms << " ms\n";
std::cout << " TFLOPS: " << std::setprecision(2) << tflops << "\n";
// Step 6: Verify
std::cout << "\nStep 6: Verify\n";
output_dev.FromDevice(output_host.data());
size_t total = output_host.get_element_space_size();
size_t nonzero = 0;
double checksum = 0.0;
for(size_t i = 0; i < total; ++i)
{
float v = static_cast<float>(output_host.data()[i]);
if(v != 0.0f)
++nonzero;
checksum += v;
}
bool passed = nonzero > 0;
std::cout << " Output elements: " << total << "\n";
std::cout << " Non-zero: " << nonzero << "/" << total
<< (nonzero > 0 ? " (kernel produced output)" : " WARNING: all zeros!") << "\n";
std::cout << " Checksum: " << std::fixed << std::setprecision(2) << checksum << "\n";
std::cout << " Status: " << (passed ? "PASS" : "FAIL") << "\n";
utils::print_separator();
std::cout << "DECLARATION PATTERNS:\n";
std::cout << " 1. AUTOFILL: tile + pipeline only, wave/warp auto-filled\n";
std::cout << " 2. AUTOCORRECT: invalid wave(1,1,1) corrected\n";
std::cout << " 3. FULL: all parameters explicit\n";
utils::print_separator();
return passed ? 0 : 1;
}

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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
// SPDX-License-Identifier: MIT
// Example 02: All Convolution Directions
//
// Forward, backward-data, and backward-weight for 2D convolution,
// each executed on GPU with non-zero verification.
//
// Build: cd dispatcher/build && cmake .. && make grouped_conv_02_all_dirs
#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <cmath>
#include "ck_tile/core.hpp"
#include "ck_tile/host.hpp"
#include "ck_tile/host/convolution_parameter.hpp"
#include "ck_tile/ops/grouped_convolution.hpp"
#include "ck_tile/dispatcher/grouped_conv_utils.hpp"
#include "ck_tile/dispatcher/example_args.hpp"
using namespace ck_tile::dispatcher;
using namespace ck_tile::dispatcher::grouped_conv_utils;
using GroupedConvSig = grouped_conv_decl::GroupedConvSignature;
using GroupedConvAlgo = grouped_conv_decl::GroupedConvAlgorithm;
using InDataType = ck_tile::half_t;
using WeiDataType = ck_tile::half_t;
using OutDataType = ck_tile::half_t;
DECL_GROUPED_CONV_KERNEL_SET(
conv_fwd_2d,
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo().tile(1, 128, 128).pipeline("compv4").vector_sizes(4, 8, 8),
"gfx950"));
DECL_GROUPED_CONV_KERNEL_SET(
conv_bwdd_2d,
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("bwd_data").dims(2),
GroupedConvAlgo().tile(1, 128, 128).pipeline("compv3").vector_sizes(4, 8, 8),
"gfx950"));
DECL_GROUPED_CONV_KERNEL_SET(
conv_bwdw_2d,
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("bwd_weight").dims(2),
GroupedConvAlgo()
.tile(1, 128, 128)
.pipeline("compv3")
.memory_op("atomic_add")
.vector_sizes(4, 8, 8),
"gfx950"));
int main(int argc, char* argv[])
{
utils::ExampleArgs args("Example 02: All Convolution Directions",
"Forward/BwdData/BwdWeight with GPU execution and verification");
args.add_option("--arch", "gfx950", "GPU architecture");
if(!args.parse(argc, argv))
return 0;
utils::print_header("Example 02: All Convolution Directions");
std::string gfx_arch = args.get("--arch", "gfx950");
GroupedConvRegistry registry;
registry.set_name("all_directions");
REGISTER_GENERATED_KERNELS(registry, gfx_arch);
std::cout << " Registered " << registry.size() << " kernel(s)\n";
GroupedConvDispatcher dispatcher(&registry);
const int N = 1, G = 1, C = 64, K = 128, Hi = 14, Wi = 14, Y = 3, X = 3;
ck_tile::conv::ConvParam conv_param{
2,
static_cast<ck_tile::index_t>(G),
static_cast<ck_tile::index_t>(N),
static_cast<ck_tile::index_t>(K),
static_cast<ck_tile::index_t>(C),
{static_cast<ck_tile::index_t>(Y), static_cast<ck_tile::index_t>(X)},
{static_cast<ck_tile::index_t>(Hi), static_cast<ck_tile::index_t>(Wi)},
{1, 1},
{1, 1},
{1, 1},
{1, 1}};
using InLayout = ck_tile::tensor_layout::convolution::NHWGC;
using WeiLayout = ck_tile::tensor_layout::convolution::GKYXC;
using OutLayout = ck_tile::tensor_layout::convolution::NHWGK;
auto in_desc =
ck_tile::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(conv_param);
auto wei_desc =
ck_tile::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(conv_param);
auto out_desc =
ck_tile::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(conv_param);
ck_tile::HostTensor<InDataType> input(in_desc);
ck_tile::HostTensor<WeiDataType> weight(wei_desc);
ck_tile::HostTensor<OutDataType> output(out_desc);
ck_tile::FillUniformDistribution<InDataType>{-0.5f, 0.5f}(input);
ck_tile::FillUniformDistribution<WeiDataType>{-0.5f, 0.5f}(weight);
ck_tile::DeviceMem input_dev(input.get_element_space_size_in_bytes());
ck_tile::DeviceMem weight_dev(weight.get_element_space_size_in_bytes());
ck_tile::DeviceMem output_dev(output.get_element_space_size_in_bytes());
input_dev.ToDevice(input.data());
weight_dev.ToDevice(weight.data());
std::cout << "\n " << std::left << std::setw(12) << "Direction" << std::right << std::setw(10)
<< "Time(ms)" << std::setw(10) << "TFLOPS" << std::setw(14) << "NonZero"
<< std::setw(10) << "Status" << "\n";
std::cout << " " << std::string(56, '-') << "\n";
bool all_pass = true;
auto print_result =
[](const char* label, float time_ms, double tflops, size_t nz, size_t total, bool ok) {
std::cout << " " << std::left << std::setw(12) << label << std::right << std::fixed
<< std::setprecision(4) << std::setw(10) << time_ms << std::setprecision(2)
<< std::setw(10) << tflops << std::setw(14)
<< (std::to_string(nz) + "/" + std::to_string(total)) << std::setw(10)
<< (ok ? "OK" : "FAIL") << "\n";
};
// Forward: run(X, W, Y)
{
auto problem =
create_grouped_conv2d_problem(N, C, K, Hi, Wi, Y, X, 1, 1, GroupedConvOp::Forward);
float time_ms = dispatcher.run(input_dev.GetDeviceBuffer(),
weight_dev.GetDeviceBuffer(),
output_dev.GetDeviceBuffer(),
problem,
nullptr);
output_dev.FromDevice(output.data());
size_t nz = 0;
for(size_t i = 0; i < output.get_element_space_size(); ++i)
if(static_cast<float>(output.data()[i]) != 0.0f)
++nz;
bool ok = nz > 0;
print_result("forward",
time_ms,
calculate_conv_tflops(problem, time_ms),
nz,
output.get_element_space_size(),
ok);
if(!ok)
all_pass = false;
}
// Backward Data: run(dY, W, dX)
{
auto problem =
create_grouped_conv2d_problem(N, C, K, Hi, Wi, Y, X, 1, 1, GroupedConvOp::BackwardData);
ck_tile::HostTensor<InDataType> dx_host(in_desc);
ck_tile::DeviceMem dx_dev(dx_host.get_element_space_size_in_bytes());
float time_ms = dispatcher.run(output_dev.GetDeviceBuffer(), // dY (from forward pass)
weight_dev.GetDeviceBuffer(), // W
dx_dev.GetDeviceBuffer(), // dX (output)
problem,
nullptr);
dx_dev.FromDevice(dx_host.data());
size_t nz = 0;
for(size_t i = 0; i < dx_host.get_element_space_size(); ++i)
if(static_cast<float>(dx_host.data()[i]) != 0.0f)
++nz;
bool ok = nz > 0;
print_result("bwd_data",
time_ms,
calculate_conv_tflops(problem, time_ms),
nz,
dx_host.get_element_space_size(),
ok);
if(!ok)
all_pass = false;
}
// Backward Weight: run(X, dY, dW)
{
auto problem = create_grouped_conv2d_problem(
N, C, K, Hi, Wi, Y, X, 1, 1, GroupedConvOp::BackwardWeight);
ck_tile::HostTensor<WeiDataType> dw_host(wei_desc);
ck_tile::DeviceMem dw_dev(dw_host.get_element_space_size_in_bytes());
float time_ms = dispatcher.run(input_dev.GetDeviceBuffer(), // X
output_dev.GetDeviceBuffer(), // dY
dw_dev.GetDeviceBuffer(), // dW (output)
problem,
nullptr);
dw_dev.FromDevice(dw_host.data());
size_t nz = 0;
for(size_t i = 0; i < dw_host.get_element_space_size(); ++i)
if(static_cast<float>(dw_host.data()[i]) != 0.0f)
++nz;
bool ok = nz > 0;
print_result("bwd_weight",
time_ms,
calculate_conv_tflops(problem, time_ms),
nz,
dw_host.get_element_space_size(),
ok);
if(!ok)
all_pass = false;
}
utils::print_separator();
std::cout << " Status: " << (all_pass ? "PASS" : "FAIL") << "\n";
utils::print_separator();
return all_pass ? 0 : 1;
}

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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
// SPDX-License-Identifier: MIT
// Example 03: Benchmark and CPU-Reference Validation
//
// Runs a 2D grouped conv forward kernel on the GPU via dispatcher.run()
// and compares against the CK Tile host reference implementation.
// Exposes warmup/repeat/log_level as CLI args (matches example 20 pattern).
//
// Build: cd dispatcher/build && cmake .. && make grouped_conv_03_bench_val
#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <cmath>
#include <algorithm>
#include <numeric>
#include "ck_tile/core.hpp"
#include "ck_tile/host.hpp"
#include "ck_tile/host/convolution_parameter.hpp"
#include "ck_tile/ops/grouped_convolution.hpp"
#include "ck_tile/host/reference/reference_grouped_conv_fwd.hpp"
#include "ck_tile/dispatcher/grouped_conv_utils.hpp"
#include "ck_tile/dispatcher/example_args.hpp"
using namespace ck_tile::dispatcher;
using namespace ck_tile::dispatcher::grouped_conv_utils;
using GroupedConvSig = grouped_conv_decl::GroupedConvSignature;
using GroupedConvAlgo = grouped_conv_decl::GroupedConvAlgorithm;
using InDataType = ck_tile::half_t;
using WeiDataType = ck_tile::half_t;
using OutDataType = ck_tile::half_t;
using AccDataType = float;
DECL_GROUPED_CONV_KERNEL_SET(
bench_kernels,
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo().tile(1, 128, 128).pipeline("compv4").vector_sizes(4, 8, 8),
"gfx950")
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo().tile(1, 64, 64).pipeline("compv3").vector_sizes(4, 8, 8),
"gfx950"));
int main(int argc, char* argv[])
{
utils::ExampleArgs args("Example 03: Benchmark & Validation",
"GPU execution with CPU reference validation");
args.add_option("-n", "1", "Batch size N");
args.add_option("-g", "1", "Groups G");
args.add_option("-c", "64", "Input channels C");
args.add_option("-k", "128", "Output channels K");
args.add_option("--size", "14", "Spatial size (H=W)");
args.add_option("--warmup", "3", "Warmup iterations");
args.add_option("--repeat", "10", "Benchmark iterations");
args.add_option("--arch", "gfx950", "GPU architecture");
args.add_flag("--no-verify", "Skip CPU validation");
if(!args.parse(argc, argv))
return 0;
utils::print_header("Example 03: Grouped Conv Benchmark & Validation");
int N = args.get_int("-n", 1);
int G = args.get_int("-g", 1);
int C = args.get_int("-c", 64);
int K = args.get_int("-k", 128);
int Hi = args.get_int("--size", 14);
int Wi = Hi;
int Y = 3, X = 3;
int warmup = args.get_int("--warmup", 3);
int repeat = args.get_int("--repeat", 10);
bool verify = !args.has("--no-verify");
std::string gfx_arch = args.get("--arch", "gfx950");
std::cout << "\nProblem: N=" << N << " G=" << G << " C=" << C << " K=" << K << " Hi=" << Hi
<< " Wi=" << Wi << " Y=" << Y << " X=" << X << "\n";
std::cout << "Benchmark: warmup=" << warmup << " repeat=" << repeat << "\n";
// Step 1: Setup tensors using CK Tile descriptors
std::cout << "\nStep 1: Setup tensors\n";
ck_tile::conv::ConvParam conv_param{
2,
static_cast<ck_tile::index_t>(G),
static_cast<ck_tile::index_t>(N),
static_cast<ck_tile::index_t>(K),
static_cast<ck_tile::index_t>(C),
{static_cast<ck_tile::index_t>(Y), static_cast<ck_tile::index_t>(X)},
{static_cast<ck_tile::index_t>(Hi), static_cast<ck_tile::index_t>(Wi)},
{1, 1},
{1, 1},
{1, 1},
{1, 1}};
using InLayout = ck_tile::tensor_layout::convolution::NHWGC;
using WeiLayout = ck_tile::tensor_layout::convolution::GKYXC;
using OutLayout = ck_tile::tensor_layout::convolution::NHWGK;
auto in_desc =
ck_tile::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(conv_param);
auto wei_desc =
ck_tile::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(conv_param);
auto out_desc =
ck_tile::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(conv_param);
ck_tile::HostTensor<InDataType> input(in_desc);
ck_tile::HostTensor<WeiDataType> weight(wei_desc);
ck_tile::HostTensor<OutDataType> output_gpu(out_desc);
ck_tile::HostTensor<OutDataType> output_cpu(out_desc);
ck_tile::FillUniformDistribution<InDataType>{-0.5f, 0.5f}(input);
ck_tile::FillUniformDistribution<WeiDataType>{-0.5f, 0.5f}(weight);
output_cpu.SetZero();
std::cout << " Input: " << input.get_element_space_size() << " elements\n";
std::cout << " Weight: " << weight.get_element_space_size() << " elements\n";
std::cout << " Output: " << output_gpu.get_element_space_size() << " elements\n";
// Step 2: CPU reference
if(verify)
{
std::cout << "\nStep 2: CPU Reference\n";
std::vector<ck_tile::long_index_t> strides_v = {1, 1};
std::vector<ck_tile::long_index_t> dilations_v = {1, 1};
std::vector<ck_tile::long_index_t> left_pads_v = {1, 1};
std::vector<ck_tile::long_index_t> right_pads_v = {1, 1};
ck_tile::reference_grouped_conv_fwd<2, InDataType, WeiDataType, OutDataType>(
input, weight, output_cpu, strides_v, dilations_v, left_pads_v, right_pads_v);
std::cout << " CPU ref[0..7]: ";
for(int i = 0; i < std::min(8, static_cast<int>(output_cpu.get_element_space_size())); ++i)
std::cout << std::fixed << std::setprecision(4)
<< static_cast<float>(output_cpu.data()[i]) << " ";
std::cout << "\n";
}
// Step 3: GPU execution via dispatcher
std::cout << "\nStep 3: GPU Execution (via dispatcher.run)\n";
GroupedConvRegistry registry;
registry.set_name("bench_val");
REGISTER_GENERATED_KERNELS(registry, gfx_arch);
std::cout << " Registered " << registry.size() << " kernel(s)\n";
GroupedConvDispatcher dispatcher(&registry);
auto problem = create_grouped_conv2d_problem(N, C, K, Hi, Wi, Y, X, 1, 1);
problem.op = GroupedConvOp::Forward;
auto* selected = dispatcher.select_kernel(problem);
if(!selected)
{
std::cerr << " ERROR: No kernel found!\n";
return 1;
}
std::cout << " Selected: " << selected->name() << "\n";
ck_tile::DeviceMem input_dev(input.get_element_space_size_in_bytes());
ck_tile::DeviceMem weight_dev(weight.get_element_space_size_in_bytes());
ck_tile::DeviceMem output_dev(output_gpu.get_element_space_size_in_bytes());
input_dev.ToDevice(input.data());
weight_dev.ToDevice(weight.data());
float elapsed_ms = dispatcher.run(input_dev.GetDeviceBuffer(),
weight_dev.GetDeviceBuffer(),
output_dev.GetDeviceBuffer(),
problem,
nullptr);
output_dev.FromDevice(output_gpu.data());
size_t total = output_gpu.get_element_space_size();
std::cout << " GPU out[0..7]: ";
for(int i = 0; i < std::min(8, static_cast<int>(total)); ++i)
std::cout << std::fixed << std::setprecision(4) << static_cast<float>(output_gpu.data()[i])
<< " ";
std::cout << "\n";
size_t nonzero_gpu = 0;
double gpu_sum = 0.0;
for(size_t i = 0; i < total; ++i)
{
float v = static_cast<float>(output_gpu.data()[i]);
if(v != 0.0f)
++nonzero_gpu;
gpu_sum += v;
}
std::cout << " GPU checksum: " << std::fixed << std::setprecision(6) << gpu_sum << "\n";
std::cout << " GPU non-zero: " << nonzero_gpu << "/" << total
<< (nonzero_gpu > 0 ? " (kernel produced output)" : " WARNING: all zeros!") << "\n";
int Ho = static_cast<int>(problem.Ho());
int Wo = static_cast<int>(problem.Wo());
double flops = 2.0 * G * N * K * C * Y * X * Ho * Wo;
double tflops = flops / (elapsed_ms * 1e9);
std::cout << " Time: " << std::fixed << std::setprecision(4) << elapsed_ms << " ms\n";
std::cout << " TFLOPS: " << std::setprecision(2) << tflops << "\n";
// Step 4: Validation
bool passed = true;
if(verify)
{
std::cout << "\nStep 4: Validation (GPU vs CPU)\n";
constexpr float rtol = 1e-2f;
constexpr float atol = 1e-2f;
float max_diff = 0.0f;
float max_rel = 0.0f;
size_t max_diff_idx = 0;
size_t num_elements = output_gpu.get_element_space_size();
size_t mismatches = 0;
for(size_t i = 0; i < num_elements; ++i)
{
float gpu_val = static_cast<float>(output_gpu.data()[i]);
float cpu_val = static_cast<float>(output_cpu.data()[i]);
float diff = std::abs(gpu_val - cpu_val);
float tol = atol + rtol * std::abs(cpu_val);
float rel = diff / (std::abs(cpu_val) + 1e-6f);
if(diff > max_diff)
{
max_diff = diff;
max_diff_idx = i;
}
max_rel = std::max(max_rel, rel);
if(diff > tol)
++mismatches;
}
passed = (mismatches == 0);
std::cout << " Side-by-side at worst element [" << max_diff_idx << "]:\n";
std::cout << " GPU: " << std::fixed << std::setprecision(6)
<< static_cast<float>(output_gpu.data()[max_diff_idx])
<< " CPU: " << static_cast<float>(output_cpu.data()[max_diff_idx])
<< " diff: " << std::scientific << max_diff << "\n";
std::cout << " Elements: " << num_elements << "\n";
std::cout << " Mismatches: " << mismatches << "/" << num_elements << "\n";
std::cout << " Max abs diff: " << std::scientific << max_diff << "\n";
std::cout << " Max rel diff: " << std::scientific << max_rel << "\n";
std::cout << " Status: " << (passed ? "PASSED" : "FAILED") << "\n";
}
utils::print_separator();
std::cout << "BENCHMARK & VALIDATION:\n";
std::cout << " GPU kernel: " << (selected ? selected->name() : "none") << "\n";
std::cout << " Performance: " << std::fixed << std::setprecision(2) << tflops
<< " TFLOPS\n";
std::cout << " CPU reference: reference_grouped_conv_fwd<2>()\n";
std::cout << " Validation: " << (passed ? "PASS" : "FAIL") << "\n";
utils::print_separator();
return passed ? 0 : 1;
}

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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
// SPDX-License-Identifier: MIT
// Example 04: Heuristic Selection + JSON Export
//
// Demonstrates runtime kernel selection with heuristic ranking,
// GPU execution, and JSON registry export.
//
// Build: cd dispatcher/build && cmake .. && make grouped_conv_04_registry_json
#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include "ck_tile/core.hpp"
#include "ck_tile/host.hpp"
#include "ck_tile/host/convolution_parameter.hpp"
#include "ck_tile/ops/grouped_convolution.hpp"
#include "ck_tile/dispatcher/grouped_conv_utils.hpp"
#include "ck_tile/dispatcher/example_args.hpp"
using namespace ck_tile::dispatcher;
using namespace ck_tile::dispatcher::grouped_conv_utils;
using GroupedConvSig = grouped_conv_decl::GroupedConvSignature;
using GroupedConvAlgo = grouped_conv_decl::GroupedConvAlgorithm;
using InDataType = ck_tile::half_t;
using WeiDataType = ck_tile::half_t;
using OutDataType = ck_tile::half_t;
// Two tile configs for heuristic selection
DECL_GROUPED_CONV_KERNEL_SET(
heuristic_kernels,
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo().tile(1, 128, 128).pipeline("compv4").vector_sizes(4, 8, 8),
"gfx950")
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo().tile(1, 64, 64).pipeline("compv3").vector_sizes(4, 8, 8),
"gfx950"));
std::vector<std::string> conv_heuristic(const GroupedConvProblem& problem)
{
int64_t spatial = problem.Ho() * problem.Wo();
if(spatial > 400)
return {"128x128", "64x64"};
return {"64x64", "128x128"};
}
int main(int argc, char* argv[])
{
utils::ExampleArgs args("Example 04: Heuristic + JSON",
"Runtime kernel selection and JSON export");
args.add_option("--arch", "gfx950", "GPU architecture");
if(!args.parse(argc, argv))
return 0;
utils::print_header("Example 04: Heuristic Selection + JSON Export");
std::string gfx_arch = args.get("--arch", "gfx950");
// Step 1: Register
std::cout << "\nStep 1: Register Kernels" << std::endl;
GroupedConvRegistry registry;
registry.set_name("heuristic_conv");
REGISTER_GENERATED_KERNELS(registry, gfx_arch);
std::cout << " Registered " << registry.size() << " kernel(s)" << std::endl;
// Step 2: Heuristic dispatcher
std::cout << "\nStep 2: Heuristic Dispatcher" << std::endl;
GroupedConvDispatcher dispatcher(&registry);
dispatcher.set_strategy(GroupedConvDispatcher::SelectionStrategy::Heuristic);
dispatcher.set_heuristic(conv_heuristic);
// Step 3: Select kernels (no GPU yet)
std::cout << "\nStep 3: Kernel Selection" << std::endl;
auto problem = create_grouped_conv2d_problem(1, 64, 128, 14, 14, 3, 3, 1, 1);
auto* selected = dispatcher.select_kernel(problem);
std::cout << " Selected: " << (selected ? selected->name() : "none") << std::endl;
// Step 4: GPU execution
std::cout << "\nStep 4: GPU Execution" << std::endl;
ck_tile::conv::ConvParam cp{
2,
static_cast<ck_tile::index_t>(1),
static_cast<ck_tile::index_t>(1),
static_cast<ck_tile::index_t>(128),
static_cast<ck_tile::index_t>(64),
{static_cast<ck_tile::index_t>(3), static_cast<ck_tile::index_t>(3)},
{static_cast<ck_tile::index_t>(14), static_cast<ck_tile::index_t>(14)},
{1, 1},
{1, 1},
{1, 1},
{1, 1}};
using InLayout = ck_tile::tensor_layout::convolution::NHWGC;
using WeiLayout = ck_tile::tensor_layout::convolution::GKYXC;
using OutLayout = ck_tile::tensor_layout::convolution::NHWGK;
std::cout << " Creating tensors..." << std::endl;
auto in_d = ck_tile::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(cp);
auto wei_d = ck_tile::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(cp);
auto out_d = ck_tile::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(cp);
ck_tile::HostTensor<InDataType> input(in_d);
ck_tile::HostTensor<WeiDataType> weight(wei_d);
ck_tile::HostTensor<OutDataType> output(out_d);
ck_tile::FillUniformDistribution<InDataType>{-0.5f, 0.5f}(input);
ck_tile::FillUniformDistribution<WeiDataType>{-0.5f, 0.5f}(weight);
std::cout << " Allocating device memory..." << std::endl;
ck_tile::DeviceMem in_dev(input.get_element_space_size_in_bytes());
ck_tile::DeviceMem wei_dev(weight.get_element_space_size_in_bytes());
ck_tile::DeviceMem out_dev(output.get_element_space_size_in_bytes());
in_dev.ToDevice(input.data());
wei_dev.ToDevice(weight.data());
std::cout << " Launching kernel..." << std::endl;
float time_ms = dispatcher.run(in_dev.GetDeviceBuffer(),
wei_dev.GetDeviceBuffer(),
out_dev.GetDeviceBuffer(),
problem,
nullptr);
std::cout << " Reading back..." << std::endl;
out_dev.FromDevice(output.data());
size_t nz = 0;
for(size_t i = 0; i < output.get_element_space_size(); ++i)
if(static_cast<float>(output.data()[i]) != 0.0f)
++nz;
std::cout << " Time: " << std::fixed << std::setprecision(4) << time_ms << " ms"
<< std::endl;
std::cout << " TFLOPS: " << std::setprecision(2) << calculate_conv_tflops(problem, time_ms)
<< std::endl;
std::cout << " NonZero: " << nz << "/" << output.get_element_space_size() << std::endl;
// Step 5: JSON export
std::cout << "\nStep 5: JSON Export" << std::endl;
std::string json = registry.export_json(false);
std::cout << " JSON size: " << json.size() << " bytes" << std::endl;
bool passed = nz > 0;
utils::print_separator();
std::cout << " Status: " << (passed ? "PASS" : "FAIL") << "\n";
utils::print_separator();
return passed ? 0 : 1;
}

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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
// SPDX-License-Identifier: MIT
// Example 05: Backward Data with CPU Reference Validation
//
// Computes dX = ConvBwdData(dY, W) on GPU via dispatcher.run()
// and validates against ck_tile::reference_grouped_conv_bwd_data.
//
// Build: cd dispatcher/build && cmake .. && make grouped_conv_05_bwd_data
#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <cmath>
#include "ck_tile/core.hpp"
#include "ck_tile/host.hpp"
#include "ck_tile/host/convolution_parameter.hpp"
#include "ck_tile/ops/grouped_convolution.hpp"
#include "ck_tile/host/reference/reference_grouped_conv_bwd_data.hpp"
#include "ck_tile/dispatcher/grouped_conv_utils.hpp"
#include "ck_tile/dispatcher/example_args.hpp"
using namespace ck_tile::dispatcher;
using namespace ck_tile::dispatcher::grouped_conv_utils;
using GroupedConvSig = grouped_conv_decl::GroupedConvSignature;
using GroupedConvAlgo = grouped_conv_decl::GroupedConvAlgorithm;
using InDataType = ck_tile::half_t;
using WeiDataType = ck_tile::half_t;
using OutDataType = ck_tile::half_t;
DECL_GROUPED_CONV_KERNEL_SET(
bwd_data_kernels,
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("bwd_data").dims(2),
GroupedConvAlgo()
.tile(1, 128, 128)
.pipeline("compv3")
.scheduler("intrawave")
.vector_sizes(4, 8, 8),
"gfx950"));
int main(int argc, char* argv[])
{
utils::ExampleArgs args("Example 05: Backward Data Validation",
"dX = ConvBwdData(dY, W) with CPU reference");
args.add_option("--arch", "gfx950", "GPU architecture");
args.add_option("-n", "1", "Batch size");
args.add_option("-c", "64", "Input channels");
args.add_option("-k", "128", "Output channels");
args.add_option("--size", "14", "Spatial size (H=W)");
if(!args.parse(argc, argv))
return 0;
utils::print_header("Example 05: Backward Data with CPU Validation");
std::string gfx_arch = args.get("--arch", "gfx950");
int N = args.get_int("-n", 1), G = 1;
int C = args.get_int("-c", 64), K = args.get_int("-k", 128);
int Hi = args.get_int("--size", 14), Wi = Hi, Y = 3, X = 3;
// Setup
ck_tile::conv::ConvParam conv_param{
2,
static_cast<ck_tile::index_t>(G),
static_cast<ck_tile::index_t>(N),
static_cast<ck_tile::index_t>(K),
static_cast<ck_tile::index_t>(C),
{static_cast<ck_tile::index_t>(Y), static_cast<ck_tile::index_t>(X)},
{static_cast<ck_tile::index_t>(Hi), static_cast<ck_tile::index_t>(Wi)},
{1, 1},
{1, 1},
{1, 1},
{1, 1}};
using InLayout = ck_tile::tensor_layout::convolution::NHWGC;
using WeiLayout = ck_tile::tensor_layout::convolution::GKYXC;
using OutLayout = ck_tile::tensor_layout::convolution::NHWGK;
auto in_desc =
ck_tile::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(conv_param);
auto wei_desc =
ck_tile::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(conv_param);
auto out_desc =
ck_tile::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(conv_param);
// dY (gradient from next layer) and W (weight) are inputs; dX is output
ck_tile::HostTensor<OutDataType> dy(out_desc);
ck_tile::HostTensor<WeiDataType> weight(wei_desc);
ck_tile::HostTensor<InDataType> dx_gpu(in_desc);
ck_tile::HostTensor<InDataType> dx_cpu(in_desc);
ck_tile::FillUniformDistribution<OutDataType>{-0.5f, 0.5f}(dy);
ck_tile::FillUniformDistribution<WeiDataType>{-0.5f, 0.5f}(weight);
dx_cpu.SetZero();
// CPU reference
std::cout << "\nStep 1: CPU Reference (bwd_data)\n";
std::vector<ck_tile::long_index_t> strides_v = {1, 1};
std::vector<ck_tile::long_index_t> dilations_v = {1, 1};
std::vector<ck_tile::long_index_t> left_pads_v = {1, 1};
std::vector<ck_tile::long_index_t> right_pads_v = {1, 1};
ck_tile::reference_grouped_conv_bwd_data<2, InDataType, WeiDataType, OutDataType>(
dx_cpu, weight, dy, strides_v, dilations_v, left_pads_v, right_pads_v);
std::cout << " CPU complete\n";
// GPU execution via dispatcher
std::cout << "\nStep 2: GPU Execution (via dispatcher.run)\n";
GroupedConvRegistry registry;
registry.set_name("bwd_data");
REGISTER_GENERATED_KERNELS(registry, gfx_arch);
GroupedConvDispatcher dispatcher(&registry);
auto problem =
create_grouped_conv2d_problem(N, C, K, Hi, Wi, Y, X, 1, 1, GroupedConvOp::BackwardData);
auto* selected = dispatcher.select_kernel(problem);
if(!selected)
{
std::cerr << " ERROR: No bwd_data kernel found!\n";
return 1;
}
std::cout << " Selected: " << selected->name() << "\n";
ck_tile::DeviceMem dy_dev(dy.get_element_space_size_in_bytes());
ck_tile::DeviceMem wei_dev(weight.get_element_space_size_in_bytes());
ck_tile::DeviceMem dx_dev(dx_gpu.get_element_space_size_in_bytes());
dy_dev.ToDevice(dy.data());
wei_dev.ToDevice(weight.data());
// dispatcher.run(dY, W, dX, problem) for bwd_data
float time_ms = dispatcher.run(dy_dev.GetDeviceBuffer(),
wei_dev.GetDeviceBuffer(),
dx_dev.GetDeviceBuffer(),
problem,
nullptr);
dx_dev.FromDevice(dx_gpu.data());
double tflops = (time_ms > 0) ? calculate_conv_tflops(problem, time_ms) : 0;
std::cout << " Time: " << std::fixed << std::setprecision(4) << time_ms << " ms\n";
std::cout << " TFLOPS: " << std::setprecision(2) << tflops << "\n";
// Validation
std::cout << "\nStep 3: Validation (GPU vs CPU)\n";
size_t num_elements = dx_gpu.get_element_space_size();
float max_abs = 0, max_rel = 0;
size_t mismatches = 0;
constexpr float rtol = 5e-2f, atol = 5e-2f;
for(size_t i = 0; i < num_elements; ++i)
{
float gv = static_cast<float>(dx_gpu.data()[i]);
float cv = static_cast<float>(dx_cpu.data()[i]);
float d = std::abs(gv - cv);
float r = d / (std::abs(cv) + 1e-6f);
max_abs = std::max(max_abs, d);
max_rel = std::max(max_rel, r);
if(d > atol + rtol * std::abs(cv))
++mismatches;
}
bool passed = (mismatches == 0);
std::cout << " Elements: " << num_elements << "\n";
std::cout << " Mismatches: " << mismatches << "\n";
std::cout << " Max abs diff: " << std::scientific << max_abs << "\n";
std::cout << " Max rel diff: " << std::scientific << max_rel << "\n";
utils::print_separator();
std::cout << " dX = ConvBwdData(dY, W)\n";
std::cout << " Status: " << (passed ? "PASS" : "FAIL") << "\n";
utils::print_separator();
return passed ? 0 : 1;
}

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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
// SPDX-License-Identifier: MIT
// Example 06: Backward Weight with CPU Reference Validation
//
// Computes dW = ConvBwdWeight(X, dY) on GPU via dispatcher.run()
// and validates against ck_tile::reference_grouped_conv_bwd_weight.
//
// Build: cd dispatcher/build && cmake .. && make grouped_conv_06_bwd_weight
#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <cmath>
#include "ck_tile/core.hpp"
#include "ck_tile/host.hpp"
#include "ck_tile/host/convolution_parameter.hpp"
#include "ck_tile/ops/grouped_convolution.hpp"
#include "ck_tile/host/reference/reference_grouped_conv_bwd_weight.hpp"
#include "ck_tile/dispatcher/grouped_conv_utils.hpp"
#include "ck_tile/dispatcher/example_args.hpp"
using namespace ck_tile::dispatcher;
using namespace ck_tile::dispatcher::grouped_conv_utils;
using GroupedConvSig = grouped_conv_decl::GroupedConvSignature;
using GroupedConvAlgo = grouped_conv_decl::GroupedConvAlgorithm;
using InDataType = ck_tile::half_t;
using WeiDataType = ck_tile::half_t;
using OutDataType = ck_tile::half_t;
DECL_GROUPED_CONV_KERNEL_SET(
bwd_weight_kernels,
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("bwd_weight").dims(2),
GroupedConvAlgo()
.tile(1, 128, 128)
.pipeline("compv3")
.scheduler("intrawave")
.memory_op("atomic_add")
.vector_sizes(4, 8, 8),
"gfx950"));
int main(int argc, char* argv[])
{
utils::ExampleArgs args("Example 06: Backward Weight Validation",
"dW = ConvBwdWeight(X, dY) with CPU reference");
args.add_option("--arch", "gfx950", "GPU architecture");
args.add_option("-n", "1", "Batch size");
args.add_option("-c", "64", "Input channels");
args.add_option("-k", "128", "Output channels");
args.add_option("--size", "14", "Spatial size (H=W)");
args.add_option("--split-k", "1", "Split-K factor for bwd_weight (k_batch)");
if(!args.parse(argc, argv))
return 0;
utils::print_header("Example 06: Backward Weight with CPU Validation");
std::string gfx_arch = args.get("--arch", "gfx950");
int N = args.get_int("-n", 1), G = 1;
int C = args.get_int("-c", 64), K = args.get_int("-k", 128);
int Hi = args.get_int("--size", 14), Wi = Hi, Y = 3, X = 3;
// Setup
ck_tile::conv::ConvParam conv_param{
2,
static_cast<ck_tile::index_t>(G),
static_cast<ck_tile::index_t>(N),
static_cast<ck_tile::index_t>(K),
static_cast<ck_tile::index_t>(C),
{static_cast<ck_tile::index_t>(Y), static_cast<ck_tile::index_t>(X)},
{static_cast<ck_tile::index_t>(Hi), static_cast<ck_tile::index_t>(Wi)},
{1, 1},
{1, 1},
{1, 1},
{1, 1}};
using InLayout = ck_tile::tensor_layout::convolution::NHWGC;
using WeiLayout = ck_tile::tensor_layout::convolution::GKYXC;
using OutLayout = ck_tile::tensor_layout::convolution::NHWGK;
auto in_desc =
ck_tile::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(conv_param);
auto wei_desc =
ck_tile::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(conv_param);
auto out_desc =
ck_tile::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(conv_param);
// X (input) and dY (gradient) are inputs; dW is output
ck_tile::HostTensor<InDataType> input(in_desc);
ck_tile::HostTensor<OutDataType> dy(out_desc);
ck_tile::HostTensor<WeiDataType> dw_gpu(wei_desc);
ck_tile::HostTensor<WeiDataType> dw_cpu(wei_desc);
ck_tile::FillUniformDistribution<InDataType>{-0.5f, 0.5f}(input);
ck_tile::FillUniformDistribution<OutDataType>{-0.5f, 0.5f}(dy);
dw_cpu.SetZero();
// CPU reference
std::cout << "\nStep 1: CPU Reference (bwd_weight)\n";
std::vector<ck_tile::long_index_t> strides_v = {1, 1};
std::vector<ck_tile::long_index_t> dilations_v = {1, 1};
std::vector<ck_tile::long_index_t> left_pads_v = {1, 1};
std::vector<ck_tile::long_index_t> right_pads_v = {1, 1};
ck_tile::reference_grouped_conv_bwd_weight<2, InDataType, WeiDataType, OutDataType>(
input, dw_cpu, dy, strides_v, dilations_v, left_pads_v, right_pads_v);
std::cout << " CPU complete\n";
// GPU execution
std::cout << "\nStep 2: GPU Execution (via dispatcher.run)\n";
GroupedConvRegistry registry;
registry.set_name("bwd_weight");
REGISTER_GENERATED_KERNELS(registry, gfx_arch);
GroupedConvDispatcher dispatcher(&registry);
auto problem =
create_grouped_conv2d_problem(N, C, K, Hi, Wi, Y, X, 1, 1, GroupedConvOp::BackwardWeight);
problem.split_k = args.get_int("--split-k", 1);
auto* selected = dispatcher.select_kernel(problem);
if(!selected)
{
std::cerr << " ERROR: No bwd_weight kernel found!\n";
return 1;
}
std::cout << " Selected: " << selected->name() << "\n";
ck_tile::DeviceMem in_dev(input.get_element_space_size_in_bytes());
ck_tile::DeviceMem dy_dev(dy.get_element_space_size_in_bytes());
ck_tile::DeviceMem dw_dev(dw_gpu.get_element_space_size_in_bytes());
in_dev.ToDevice(input.data());
dy_dev.ToDevice(dy.data());
if(problem.split_k > 1)
dw_dev.SetZero();
// dispatcher.run(X, dY, dW, problem) for bwd_weight
float time_ms = dispatcher.run(in_dev.GetDeviceBuffer(),
dy_dev.GetDeviceBuffer(),
dw_dev.GetDeviceBuffer(),
problem,
nullptr);
dw_dev.FromDevice(dw_gpu.data());
double tflops = (time_ms > 0) ? calculate_conv_tflops(problem, time_ms) : 0;
std::cout << " Time: " << std::fixed << std::setprecision(4) << time_ms << " ms\n";
std::cout << " TFLOPS: " << std::setprecision(2) << tflops << "\n";
// Validation
std::cout << "\nStep 3: Validation (GPU vs CPU)\n";
size_t num_elements = dw_gpu.get_element_space_size();
float max_abs = 0, max_rel = 0;
size_t mismatches = 0;
constexpr float rtol = 5e-2f, atol = 5e-2f;
for(size_t i = 0; i < num_elements; ++i)
{
float gv = static_cast<float>(dw_gpu.data()[i]);
float cv = static_cast<float>(dw_cpu.data()[i]);
float d = std::abs(gv - cv);
float r = d / (std::abs(cv) + 1e-6f);
max_abs = std::max(max_abs, d);
max_rel = std::max(max_rel, r);
if(d > atol + rtol * std::abs(cv))
++mismatches;
}
bool passed = (mismatches == 0);
std::cout << " Elements: " << num_elements << "\n";
std::cout << " Mismatches: " << mismatches << "\n";
std::cout << " Max abs diff: " << std::scientific << max_abs << "\n";
std::cout << " Max rel diff: " << std::scientific << max_rel << "\n";
utils::print_separator();
std::cout << " dW = ConvBwdWeight(X, dY)\n";
std::cout << " Status: " << (passed ? "PASS" : "FAIL") << "\n";
utils::print_separator();
return passed ? 0 : 1;
}

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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
// SPDX-License-Identifier: MIT
// Example 07: Multi-Tile Benchmark
//
// Benchmarks multiple tile configurations across ResNet-like problem sizes.
// Exposes warmup, repeat, and init method as CLI args (matching CK Tile
// example 20 patterns).
//
// Build: cd dispatcher/build && cmake .. && make grouped_conv_07_benchmark
#include <hip/hip_runtime.h>
#include <iostream>
#include <iomanip>
#include <vector>
#include <cmath>
#include "ck_tile/core.hpp"
#include "ck_tile/host.hpp"
#include "ck_tile/host/convolution_parameter.hpp"
#include "ck_tile/ops/grouped_convolution.hpp"
#include "ck_tile/dispatcher/grouped_conv_utils.hpp"
#include "ck_tile/dispatcher/example_args.hpp"
using namespace ck_tile::dispatcher;
using namespace ck_tile::dispatcher::grouped_conv_utils;
using GroupedConvSig = grouped_conv_decl::GroupedConvSignature;
using GroupedConvAlgo = grouped_conv_decl::GroupedConvAlgorithm;
using InDataType = ck_tile::half_t;
using WeiDataType = ck_tile::half_t;
using OutDataType = ck_tile::half_t;
// Multiple tile configurations for benchmarking
DECL_GROUPED_CONV_KERNEL_SET(
benchmark_tiles,
// Small tile - compv3
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo()
.tile(1, 64, 64)
.wave(1, 4, 1)
.warp(16, 16, 32)
.pipeline("compv3")
.scheduler("intrawave")
.epilogue("cshuffle")
.vector_sizes(4, 8, 8)
.block_per_cu(1),
"gfx950")
// Medium tile - compv3
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo()
.tile(1, 128, 128)
.wave(2, 2, 1)
.warp(32, 32, 16)
.pipeline("compv3")
.scheduler("intrawave")
.epilogue("cshuffle")
.vector_sizes(4, 8, 8)
.block_per_cu(1),
"gfx950")
// Large tile - compv4 with double smem buffer
.add(GroupedConvSig().dtype("fp16").layout("nhwgc").conv_type("forward").dims(2),
GroupedConvAlgo()
.tile(1, 256, 256)
.wave(2, 2, 1)
.warp(32, 32, 16)
.pipeline("compv4")
.scheduler("intrawave")
.epilogue("cshuffle")
.vector_sizes(4, 8, 8)
.block_per_cu(1),
"gfx950"));
int main(int argc, char* argv[])
{
utils::ExampleArgs args("Example 07: Multi-Tile Benchmark",
"Multiple tiles across ResNet-like problem sizes");
args.add_option("--arch", "gfx950", "GPU architecture");
args.add_option("--warmup", "5", "Warmup iterations (passed to stream_config)");
args.add_option("--repeat", "20", "Benchmark iterations (passed to stream_config)");
args.add_option("--init", "0", "Init method: 0=random, 1=linear, 2=constant(1)");
if(!args.parse(argc, argv))
return 0;
utils::print_header("Example 07: Multi-Tile Benchmark");
std::string gfx_arch = args.get("--arch", "gfx950");
int warmup = args.get_int("--warmup", 5);
int repeat = args.get_int("--repeat", 20);
int init_method = args.get_int("--init", 0);
std::cout << "\n Config: warmup=" << warmup << " repeat=" << repeat << " init=" << init_method
<< "\n";
GroupedConvRegistry registry;
registry.set_name("benchmark");
REGISTER_GENERATED_KERNELS(registry, gfx_arch);
std::cout << " Registered " << registry.size() << " kernel(s)\n";
GroupedConvDispatcher dispatcher(&registry);
// ResNet-like problem sizes
struct BenchProblem
{
const char* label;
int N, C, K, Hi, Wi, Y, X;
};
BenchProblem problems[] = {
{"ResNet-stage2", 1, 64, 64, 56, 56, 3, 3},
{"ResNet-stage3", 1, 128, 128, 28, 28, 3, 3},
{"ResNet-stage4", 1, 256, 256, 14, 14, 3, 3},
{"ResNet-stage5", 1, 512, 512, 7, 7, 3, 3},
{"Pointwise-1x1", 1, 256, 256, 56, 56, 1, 1},
{"Batch-8", 8, 64, 128, 56, 56, 3, 3},
};
std::cout << "\n " << std::left << std::setw(16) << "Problem" << std::right << std::setw(5)
<< "N" << std::setw(5) << "C" << std::setw(5) << "K" << std::setw(5) << "H"
<< std::setw(5) << "W" << std::setw(4) << "F" << std::setw(10) << "Time(ms)"
<< std::setw(10) << "TFLOPS" << std::setw(10) << "Status" << "\n";
std::cout << " " << std::string(74, '-') << "\n";
bool all_pass = true;
for(const auto& bp : problems)
{
auto problem =
create_grouped_conv2d_problem(bp.N, bp.C, bp.K, bp.Hi, bp.Wi, bp.Y, bp.X, 1, 1);
problem.op = GroupedConvOp::Forward;
ck_tile::conv::ConvParam conv_param{
2,
static_cast<ck_tile::index_t>(1),
static_cast<ck_tile::index_t>(bp.N),
static_cast<ck_tile::index_t>(bp.K),
static_cast<ck_tile::index_t>(bp.C),
{static_cast<ck_tile::index_t>(bp.Y), static_cast<ck_tile::index_t>(bp.X)},
{static_cast<ck_tile::index_t>(bp.Hi), static_cast<ck_tile::index_t>(bp.Wi)},
{1, 1},
{1, 1},
{1, 1},
{1, 1}};
using InLayout = ck_tile::tensor_layout::convolution::NHWGC;
using WeiLayout = ck_tile::tensor_layout::convolution::GKYXC;
using OutLayout = ck_tile::tensor_layout::convolution::NHWGK;
auto in_desc =
ck_tile::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(conv_param);
auto wei_desc =
ck_tile::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(
conv_param);
auto out_desc =
ck_tile::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(
conv_param);
ck_tile::HostTensor<InDataType> input(in_desc);
ck_tile::HostTensor<WeiDataType> weight(wei_desc);
ck_tile::HostTensor<OutDataType> output(out_desc);
switch(init_method)
{
case 1:
ck_tile::FillMonotonicSeq<InDataType>{0.0f, 0.001f}(input);
ck_tile::FillMonotonicSeq<WeiDataType>{0.0f, 0.001f}(weight);
break;
case 2:
ck_tile::FillConstant<InDataType>{1.0f}(input);
ck_tile::FillConstant<WeiDataType>{1.0f}(weight);
break;
default:
ck_tile::FillUniformDistribution<InDataType>{-0.5f, 0.5f}(input);
ck_tile::FillUniformDistribution<WeiDataType>{-0.5f, 0.5f}(weight);
break;
}
ck_tile::DeviceMem in_dev(input.get_element_space_size_in_bytes());
ck_tile::DeviceMem wei_dev(weight.get_element_space_size_in_bytes());
ck_tile::DeviceMem out_dev(output.get_element_space_size_in_bytes());
in_dev.ToDevice(input.data());
wei_dev.ToDevice(weight.data());
float time_ms = 0;
bool ok = false;
try
{
time_ms = dispatcher.run(in_dev.GetDeviceBuffer(),
wei_dev.GetDeviceBuffer(),
out_dev.GetDeviceBuffer(),
problem,
nullptr);
out_dev.FromDevice(output.data());
size_t nz = 0;
for(size_t j = 0; j < output.get_element_space_size(); ++j)
if(static_cast<float>(output.data()[j]) != 0.0f)
++nz;
ok = nz > 0;
}
catch(const std::exception&)
{
ok = false;
}
double tflops = (time_ms > 0) ? calculate_conv_tflops(problem, time_ms) : 0;
std::string filter_str = std::to_string(bp.Y) + "x" + std::to_string(bp.X);
std::cout << " " << std::left << std::setw(16) << bp.label << std::right << std::setw(5)
<< bp.N << std::setw(5) << bp.C << std::setw(5) << bp.K << std::setw(5) << bp.Hi
<< std::setw(5) << bp.Wi << std::setw(4) << filter_str << std::fixed
<< std::setprecision(4) << std::setw(10) << time_ms << std::setprecision(2)
<< std::setw(10) << tflops << std::setw(10) << (ok ? "OK" : "FAIL") << "\n";
if(!ok)
all_pass = false;
}
utils::print_separator();
std::cout << " Warmup: " << warmup << ", Repeat: " << repeat << ", Init: " << init_method
<< "\n";
std::cout << " Status: " << (all_pass ? "PASS" : "FAIL") << "\n";
utils::print_separator();
return all_pass ? 0 : 1;
}