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https://github.com/ROCm/composable_kernel.git
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[CK] Integrate GPU reference into ckProfiler for convolutions (#3379)
Refactor and integrate CK GPU references into ckProfiler. - All convolution layouts and groupings supported for all three directions - Unit tests verifying GPU and CPU reference is the same - Support added to profiler (do_verification = 2 enables GPU reference) - One profiler-based test per direction changed to GPU reference to demonstrate usag Closes AICK-427
This commit is contained in:
Johannes Graner
11
test/gpu_reference/CMakeLists.txt
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11
test/gpu_reference/CMakeLists.txt
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# Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
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# SPDX-License-Identifier: MIT
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add_gtest_executable(test_gpu_reference_conv_fwd test_gpu_reference_conv_fwd.cpp)
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target_link_libraries(test_gpu_reference_conv_fwd PRIVATE utility)
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add_gtest_executable(test_gpu_reference_conv_bwd_data test_gpu_reference_conv_bwd_data.cpp)
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target_link_libraries(test_gpu_reference_conv_bwd_data PRIVATE utility)
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add_gtest_executable(test_gpu_reference_conv_bwd_weight test_gpu_reference_conv_bwd_weight.cpp)
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target_link_libraries(test_gpu_reference_conv_bwd_weight PRIVATE utility)
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137
test/gpu_reference/common_test_params.hpp
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137
test/gpu_reference/common_test_params.hpp
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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
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// SPDX-License-Identifier: MIT
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#pragma once
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#include "ck/ck.hpp"
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#include "ck/library/utility/convolution_parameter.hpp"
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#include <vector>
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namespace ck {
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namespace test {
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// Common test shapes for all convolution tests (fwd, bwd_data, bwd_weight)
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namespace conv_test_shapes {
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// 2D Conv, FP16, Small
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inline ck::utils::conv::ConvParam get_2d_small()
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{
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return ck::utils::conv::ConvParam(2, // num_dim_spatial
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1, // G
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2, // N
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8, // K
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8, // C
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{3, 3}, // filter_spatial
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{7, 7}, // input_spatial
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{1, 1}, // strides
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{1, 1}, // dilations
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{0, 0}, // left_pads
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{0, 0} // right_pads
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);
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}
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// 2D Conv, FP32, Medium
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inline ck::utils::conv::ConvParam get_2d_medium()
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{
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return ck::utils::conv::ConvParam(2, // num_dim_spatial
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1, // G
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4, // N
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16, // K
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16, // C
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{3, 3}, // filter_spatial
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{14, 14}, // input_spatial
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{1, 1}, // strides
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{1, 1}, // dilations
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{0, 0}, // left_pads
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{0, 0} // right_pads
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);
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}
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// 1D Conv, FP16
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inline ck::utils::conv::ConvParam get_1d()
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{
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return ck::utils::conv::ConvParam(1, // num_dim_spatial
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1, // G
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2, // N
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8, // K
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8, // C
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{3}, // filter_spatial
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{16}, // input_spatial
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{1}, // strides
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{1}, // dilations
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{0}, // left_pads
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{0} // right_pads
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);
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}
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// 3D Conv, FP16, Small
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inline ck::utils::conv::ConvParam get_3d_small()
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{
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return ck::utils::conv::ConvParam(3, // num_dim_spatial
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1, // G
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1, // N
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8, // K
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8, // C
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{3, 3, 3}, // filter_spatial
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{5, 5, 5}, // input_spatial
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{1, 1, 1}, // strides
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{1, 1, 1}, // dilations
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{0, 0, 0}, // left_pads
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{0, 0, 0} // right_pads
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);
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}
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// 2D Conv with stride
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inline ck::utils::conv::ConvParam get_2d_stride2()
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{
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return ck::utils::conv::ConvParam(2, // num_dim_spatial
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1, // G
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2, // N
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8, // K
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8, // C
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{3, 3}, // filter_spatial
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{8, 8}, // input_spatial
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{2, 2}, // strides
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{1, 1}, // dilations
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{0, 0}, // left_pads
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{0, 0} // right_pads
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);
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}
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// 2D Grouped Conv, FP16, G=2
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inline ck::utils::conv::ConvParam get_2d_grouped_g2()
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{
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return ck::utils::conv::ConvParam(2, // num_dim_spatial
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2, // G
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2, // N
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8, // K (8 total output channels)
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16, // C (16 total input channels, 8 per group with G=2)
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{3, 3}, // filter_spatial
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{7, 7}, // input_spatial
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{1, 1}, // strides
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{1, 1}, // dilations
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{0, 0}, // left_pads
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{0, 0} // right_pads
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);
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}
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// 2D Grouped Conv, FP32, G=4
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inline ck::utils::conv::ConvParam get_2d_grouped_g4()
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{
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return ck::utils::conv::ConvParam(2, // num_dim_spatial
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4, // G
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1, // N
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16, // K (16 total output channels)
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16, // C (16 total input channels, 4 per group with G=4)
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{3, 3}, // filter_spatial
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{8, 8}, // input_spatial
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{1, 1}, // strides
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{1, 1}, // dilations
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{0, 0}, // left_pads
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{0, 0} // right_pads
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);
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}
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} // namespace conv_test_shapes
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} // namespace test
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} // namespace ck
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385
test/gpu_reference/gpu_reference_utils.hpp
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385
test/gpu_reference/gpu_reference_utils.hpp
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@@ -0,0 +1,385 @@
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// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
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// SPDX-License-Identifier: MIT
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#pragma once
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#include "ck/ck.hpp"
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#include "ck/host_utility/hip_check_error.hpp"
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#include "ck/tensor_operation/gpu/element/element_wise_operation.hpp"
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#include "ck/library/utility/check_err.hpp"
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#include "ck/library/utility/device_memory.hpp"
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#include "ck/library/utility/host_tensor.hpp"
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#include "ck/library/utility/host_tensor_generator.hpp"
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#include "ck/library/utility/convolution_host_tensor_descriptor_helper.hpp"
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// CPU references
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#include "ck/library/reference_tensor_operation/cpu/reference_conv_fwd.hpp"
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#include "ck/library/reference_tensor_operation/cpu/reference_conv_bwd_data.hpp"
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#include "ck/library/reference_tensor_operation/cpu/reference_conv_bwd_weight.hpp"
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// GPU references
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#include "ck/library/reference_tensor_operation/gpu/naive_conv_fwd_gpu.hpp"
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#include "ck/library/reference_tensor_operation/gpu/naive_conv_bwd_data_gpu.hpp"
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#include "ck/library/reference_tensor_operation/gpu/naive_conv_bwd_weight_gpu.hpp"
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#include "ck/tensor_operation/gpu/device/tensor_layout.hpp"
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#include "common_test_params.hpp"
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namespace ck {
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namespace test {
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enum class ConvKernelType
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{
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Forward,
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BackwardData,
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BackwardWeight
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};
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// Helper function to initialize and copy a tensor to device
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template <typename DataType>
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void initialize_and_copy_tensor(Tensor<DataType>& host_tensor, DeviceMem& device_mem)
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{
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host_tensor.GenerateTensorValue(GeneratorTensor_2<DataType>{-5, 5});
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device_mem.ToDevice(host_tensor.mData.data());
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}
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// Helper to get default layout types based on NDimSpatial
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template <index_t NDimSpatial>
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struct DefaultConvLayouts
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{
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using InLayout = std::conditional_t<NDimSpatial == 3,
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tensor_layout::convolution::GNCDHW,
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std::conditional_t<NDimSpatial == 2,
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tensor_layout::convolution::GNCHW,
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tensor_layout::convolution::GNCW>>;
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using WeiLayout = std::conditional_t<NDimSpatial == 3,
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tensor_layout::convolution::GKCZYX,
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std::conditional_t<NDimSpatial == 2,
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tensor_layout::convolution::GKCYX,
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tensor_layout::convolution::GKCX>>;
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using OutLayout = std::conditional_t<NDimSpatial == 3,
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tensor_layout::convolution::GNKDHW,
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std::conditional_t<NDimSpatial == 2,
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tensor_layout::convolution::GNKHW,
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tensor_layout::convolution::GNKW>>;
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};
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// Forward convolution implementation
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template <index_t NDimSpatial,
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typename InDataType,
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typename WeiDataType,
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typename OutDataType,
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typename InLayout,
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typename WeiLayout,
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typename OutLayout>
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bool test_conv_fwd_impl(const ck::utils::conv::ConvParam& params,
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const Tensor<InDataType>& input_cpu,
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const Tensor<WeiDataType>& weight_cpu,
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DeviceMem& input_dev,
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DeviceMem& weight_dev,
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DeviceMem& output_dev)
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{
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using InElementOp = tensor_operation::element_wise::PassThrough;
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using WeiElementOp = tensor_operation::element_wise::PassThrough;
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using OutElementOp = tensor_operation::element_wise::PassThrough;
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// Call GPU reference with ConvParam directly
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ref::naive_conv_fwd<InLayout,
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WeiLayout,
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OutLayout,
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InDataType,
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WeiDataType,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp>(
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reinterpret_cast<const InDataType*>(input_dev.GetDeviceBuffer()),
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reinterpret_cast<const WeiDataType*>(weight_dev.GetDeviceBuffer()),
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reinterpret_cast<OutDataType*>(output_dev.GetDeviceBuffer()),
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params);
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HIP_CHECK_ERROR(hipDeviceSynchronize());
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// Run CPU reference
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std::vector<long_index_t> strides_long(params.conv_filter_strides_.begin(),
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params.conv_filter_strides_.end());
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std::vector<long_index_t> dilations_long(params.conv_filter_dilations_.begin(),
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params.conv_filter_dilations_.end());
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std::vector<long_index_t> pads_long(params.input_left_pads_.begin(),
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params.input_left_pads_.end());
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Tensor<InDataType> input_ref = input_cpu;
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Tensor<WeiDataType> weight_ref = weight_cpu;
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Tensor<OutDataType> output_ref(
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ck::utils::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(params));
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auto ref_conv = tensor_operation::host::ReferenceConvFwd<NDimSpatial,
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InDataType,
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WeiDataType,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp>();
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auto ref_invoker = ref_conv.MakeInvoker();
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auto ref_arg = ref_conv.MakeArgument(input_ref,
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weight_ref,
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output_ref,
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strides_long,
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dilations_long,
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pads_long,
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pads_long,
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InElementOp{},
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WeiElementOp{},
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OutElementOp{});
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ref_invoker.Run(ref_arg);
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// Copy result from device and compare
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Tensor<OutDataType> output_gpu(output_ref.mDesc);
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output_dev.FromDevice(output_gpu.mData.data());
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HIP_CHECK_ERROR(hipDeviceSynchronize());
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// Compare results
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return ck::utils::check_err(output_gpu, output_ref);
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}
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// Backward data convolution implementation
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template <index_t NDimSpatial,
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typename InDataType,
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typename WeiDataType,
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typename OutDataType,
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typename InLayout,
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typename WeiLayout,
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typename OutLayout>
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bool test_conv_bwd_data_impl(const ck::utils::conv::ConvParam& params,
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const Tensor<WeiDataType>& weight_cpu,
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const Tensor<OutDataType>& output_cpu,
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DeviceMem& weight_dev,
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DeviceMem& output_dev,
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DeviceMem& input_dev)
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{
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using InElementOp = tensor_operation::element_wise::PassThrough;
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using WeiElementOp = tensor_operation::element_wise::PassThrough;
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using OutElementOp = tensor_operation::element_wise::PassThrough;
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// Call GPU reference with ConvParam directly
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ref::naive_conv_bwd_data<InLayout,
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WeiLayout,
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OutLayout,
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InDataType,
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WeiDataType,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp>(
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reinterpret_cast<InDataType*>(input_dev.GetDeviceBuffer()),
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reinterpret_cast<const WeiDataType*>(weight_dev.GetDeviceBuffer()),
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reinterpret_cast<const OutDataType*>(output_dev.GetDeviceBuffer()),
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params);
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HIP_CHECK_ERROR(hipDeviceSynchronize());
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// Run CPU reference
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std::vector<long_index_t> strides_long(params.conv_filter_strides_.begin(),
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params.conv_filter_strides_.end());
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std::vector<long_index_t> dilations_long(params.conv_filter_dilations_.begin(),
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params.conv_filter_dilations_.end());
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std::vector<long_index_t> pads_long(params.input_left_pads_.begin(),
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params.input_left_pads_.end());
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Tensor<InDataType> input_ref(
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ck::utils::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(params));
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Tensor<WeiDataType> weight_ref = weight_cpu;
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Tensor<OutDataType> output_ref = output_cpu;
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auto ref_conv = tensor_operation::host::ReferenceConvBwdData<NDimSpatial,
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InDataType,
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WeiDataType,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp>();
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auto ref_invoker = ref_conv.MakeInvoker();
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auto ref_arg = ref_conv.MakeArgument(input_ref,
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weight_ref,
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output_ref,
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strides_long,
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dilations_long,
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pads_long,
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pads_long,
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InElementOp{},
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WeiElementOp{},
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OutElementOp{});
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ref_invoker.Run(ref_arg);
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// Copy result from device and compare
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Tensor<InDataType> input_gpu(input_ref.mDesc);
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input_dev.FromDevice(input_gpu.mData.data());
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HIP_CHECK_ERROR(hipDeviceSynchronize());
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// Compare results
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return ck::utils::check_err(input_gpu, input_ref);
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}
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// Backward weight convolution implementation
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template <index_t NDimSpatial,
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typename InDataType,
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typename WeiDataType,
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typename OutDataType,
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typename InLayout,
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typename WeiLayout,
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typename OutLayout>
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bool test_conv_bwd_weight_impl(const ck::utils::conv::ConvParam& params,
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const Tensor<InDataType>& input_cpu,
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const Tensor<OutDataType>& output_cpu,
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DeviceMem& input_dev,
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DeviceMem& output_dev,
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DeviceMem& weight_dev)
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{
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using InElementOp = tensor_operation::element_wise::PassThrough;
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using WeiElementOp = tensor_operation::element_wise::PassThrough;
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using OutElementOp = tensor_operation::element_wise::PassThrough;
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// Call GPU reference with ConvParam directly
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ref::naive_conv_bwd_weight<InLayout,
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WeiLayout,
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OutLayout,
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InDataType,
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WeiDataType,
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OutDataType,
|
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InElementOp,
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WeiElementOp,
|
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OutElementOp>(
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reinterpret_cast<const InDataType*>(input_dev.GetDeviceBuffer()),
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reinterpret_cast<WeiDataType*>(weight_dev.GetDeviceBuffer()),
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reinterpret_cast<const OutDataType*>(output_dev.GetDeviceBuffer()),
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params);
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HIP_CHECK_ERROR(hipDeviceSynchronize());
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// Run CPU reference
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std::vector<long_index_t> strides_long(params.conv_filter_strides_.begin(),
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params.conv_filter_strides_.end());
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std::vector<long_index_t> dilations_long(params.conv_filter_dilations_.begin(),
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params.conv_filter_dilations_.end());
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std::vector<long_index_t> pads_long(params.input_left_pads_.begin(),
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params.input_left_pads_.end());
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Tensor<InDataType> input_ref = input_cpu;
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Tensor<WeiDataType> weight_ref(
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ck::utils::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(params));
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Tensor<OutDataType> output_ref = output_cpu;
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auto ref_conv = tensor_operation::host::ReferenceConvBwdWeight<NDimSpatial,
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InDataType,
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WeiDataType,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp>();
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auto ref_invoker = ref_conv.MakeInvoker();
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auto ref_arg = ref_conv.MakeArgument(input_ref,
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weight_ref,
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output_ref,
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strides_long,
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dilations_long,
|
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pads_long,
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pads_long,
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InElementOp{},
|
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WeiElementOp{},
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OutElementOp{});
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ref_invoker.Run(ref_arg);
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// Copy result from device and compare
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Tensor<WeiDataType> weight_gpu(weight_ref.mDesc);
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weight_dev.FromDevice(weight_gpu.mData.data());
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HIP_CHECK_ERROR(hipDeviceSynchronize());
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// Compare results
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return ck::utils::check_err(weight_gpu, weight_ref);
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}
|
||||
|
||||
// Main test function - dispatches to specific implementations
|
||||
template <index_t NDimSpatial,
|
||||
typename InDataType,
|
||||
typename WeiDataType,
|
||||
typename OutDataType,
|
||||
typename InLayout = typename DefaultConvLayouts<NDimSpatial>::InLayout,
|
||||
typename WeiLayout = typename DefaultConvLayouts<NDimSpatial>::WeiLayout,
|
||||
typename OutLayout = typename DefaultConvLayouts<NDimSpatial>::OutLayout>
|
||||
bool test_conv_gpu_ref(const ck::utils::conv::ConvParam& params, ConvKernelType kernel_type)
|
||||
{
|
||||
// Create tensor descriptors using the specified layouts
|
||||
const auto in_g_n_c_wis_desc =
|
||||
ck::utils::conv::make_input_host_tensor_descriptor_g_n_c_wis_packed<InLayout>(params);
|
||||
|
||||
const auto wei_g_k_c_xs_desc =
|
||||
ck::utils::conv::make_weight_host_tensor_descriptor_g_k_c_xs_packed<WeiLayout>(params);
|
||||
|
||||
const auto out_g_n_k_wos_desc =
|
||||
ck::utils::conv::make_output_host_tensor_descriptor_g_n_k_wos_packed<OutLayout>(params);
|
||||
|
||||
// Create tensors using tensor descriptors (supports multiple layouts)
|
||||
Tensor<InDataType> input(in_g_n_c_wis_desc);
|
||||
Tensor<WeiDataType> weight(wei_g_k_c_xs_desc);
|
||||
Tensor<OutDataType> output(out_g_n_k_wos_desc);
|
||||
|
||||
// Allocate device memory
|
||||
DeviceMem input_dev(input.mData.size() * sizeof(InDataType));
|
||||
DeviceMem weight_dev(weight.mData.size() * sizeof(WeiDataType));
|
||||
DeviceMem output_dev(output.mData.size() * sizeof(OutDataType));
|
||||
|
||||
// Initialize and copy tensors based on kernel type
|
||||
if(kernel_type == ConvKernelType::Forward)
|
||||
{
|
||||
initialize_and_copy_tensor(input, input_dev);
|
||||
initialize_and_copy_tensor(weight, weight_dev);
|
||||
}
|
||||
else if(kernel_type == ConvKernelType::BackwardData)
|
||||
{
|
||||
initialize_and_copy_tensor(weight, weight_dev);
|
||||
initialize_and_copy_tensor(output, output_dev);
|
||||
}
|
||||
else // BackwardWeight
|
||||
{
|
||||
initialize_and_copy_tensor(input, input_dev);
|
||||
initialize_and_copy_tensor(output, output_dev);
|
||||
}
|
||||
|
||||
// Dispatch to appropriate implementation with layout types
|
||||
if(kernel_type == ConvKernelType::Forward)
|
||||
{
|
||||
return test_conv_fwd_impl<NDimSpatial,
|
||||
InDataType,
|
||||
WeiDataType,
|
||||
OutDataType,
|
||||
InLayout,
|
||||
WeiLayout,
|
||||
OutLayout>(
|
||||
params, input, weight, input_dev, weight_dev, output_dev);
|
||||
}
|
||||
else if(kernel_type == ConvKernelType::BackwardData)
|
||||
{
|
||||
return test_conv_bwd_data_impl<NDimSpatial,
|
||||
InDataType,
|
||||
WeiDataType,
|
||||
OutDataType,
|
||||
InLayout,
|
||||
WeiLayout,
|
||||
OutLayout>(
|
||||
params, weight, output, weight_dev, output_dev, input_dev);
|
||||
}
|
||||
else // BackwardWeight
|
||||
{
|
||||
return test_conv_bwd_weight_impl<NDimSpatial,
|
||||
InDataType,
|
||||
WeiDataType,
|
||||
OutDataType,
|
||||
InLayout,
|
||||
WeiLayout,
|
||||
OutLayout>(
|
||||
params, input, output, input_dev, output_dev, weight_dev);
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace test
|
||||
} // namespace ck
|
||||
224
test/gpu_reference/test_gpu_reference_conv_bwd_data.cpp
Normal file
224
test/gpu_reference/test_gpu_reference_conv_bwd_data.cpp
Normal file
@@ -0,0 +1,224 @@
|
||||
// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
|
||||
// SPDX-License-Identifier: MIT
|
||||
|
||||
#include <gtest/gtest.h>
|
||||
#include "gpu_reference_utils.hpp"
|
||||
|
||||
using namespace ck;
|
||||
using ck::test::ConvKernelType;
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP16Small)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_small();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP32Medium)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_medium();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, float, float, float>(params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv1DFP16)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_1d();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<1, half_t, half_t, half_t>(params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv3DFP16Small)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<3, half_t, half_t, half_t>(params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP16Stride2)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_stride2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP16GroupedG2)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP32GroupedG4)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g4();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, float, float, float>(params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP32GroupedNHWGC_GKYXC_NHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NHWGC,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NHWGK>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP16GroupedNHWGC_GKYXC_NHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NHWGC,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NHWGK>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP32GroupedNGCHW_GKYXC_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NGKHW>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP16GroupedNGCHW_GKYXC_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NGKHW>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP32GroupedNGCHW_GKCYX_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKCYX,
|
||||
tensor_layout::convolution::NGKHW>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv2DFP16GroupedNGCHW_GKCYX_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKCYX,
|
||||
tensor_layout::convolution::NGKHW>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv3DFP32GroupedNDHWGC_GKZYXC_NDHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NDHWGC,
|
||||
tensor_layout::convolution::GKZYXC,
|
||||
tensor_layout::convolution::NDHWGK>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv3DFP16GroupedNDHWGC_GKZYXC_NDHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NDHWGC,
|
||||
tensor_layout::convolution::GKZYXC,
|
||||
tensor_layout::convolution::NDHWGK>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv3DFP32GroupedNGCDHW_GKCZYX_NGKDHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCDHW,
|
||||
tensor_layout::convolution::GKCZYX,
|
||||
tensor_layout::convolution::NGKDHW>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdData, Conv3DFP16GroupedNGCDHW_GKCZYX_NGKDHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCDHW,
|
||||
tensor_layout::convolution::GKCZYX,
|
||||
tensor_layout::convolution::NGKDHW>(
|
||||
params, ConvKernelType::BackwardData);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
224
test/gpu_reference/test_gpu_reference_conv_bwd_weight.cpp
Normal file
224
test/gpu_reference/test_gpu_reference_conv_bwd_weight.cpp
Normal file
@@ -0,0 +1,224 @@
|
||||
// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
|
||||
// SPDX-License-Identifier: MIT
|
||||
|
||||
#include <gtest/gtest.h>
|
||||
#include "gpu_reference_utils.hpp"
|
||||
|
||||
using namespace ck;
|
||||
using ck::test::ConvKernelType;
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP16Small)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_small();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP32Medium)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_medium();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, float, float, float>(params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv1DFP16)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_1d();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<1, half_t, half_t, half_t>(params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv3DFP16Small)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<3, half_t, half_t, half_t>(params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP16Stride2)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_stride2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP16GroupedG2)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP32GroupedG4)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g4();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, float, float, float>(params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP32GroupedNHWGC_GKYXC_NHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NHWGC,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NHWGK>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP16GroupedNHWGC_GKYXC_NHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NHWGC,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NHWGK>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP32GroupedNGCHW_GKYXC_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NGKHW>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP16GroupedNGCHW_GKYXC_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NGKHW>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP32GroupedNGCHW_GKCYX_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKCYX,
|
||||
tensor_layout::convolution::NGKHW>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv2DFP16GroupedNGCHW_GKCYX_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result = test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKCYX,
|
||||
tensor_layout::convolution::NGKHW>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv3DFP32GroupedNDHWGC_GKZYXC_NDHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NDHWGC,
|
||||
tensor_layout::convolution::GKZYXC,
|
||||
tensor_layout::convolution::NDHWGK>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv3DFP16GroupedNDHWGC_GKZYXC_NDHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NDHWGC,
|
||||
tensor_layout::convolution::GKZYXC,
|
||||
tensor_layout::convolution::NDHWGK>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv3DFP32GroupedNGCDHW_GKCZYX_NGKDHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCDHW,
|
||||
tensor_layout::convolution::GKCZYX,
|
||||
tensor_layout::convolution::NGKDHW>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvBwdWeight, Conv3DFP16GroupedNGCDHW_GKCZYX_NGKDHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCDHW,
|
||||
tensor_layout::convolution::GKCZYX,
|
||||
tensor_layout::convolution::NGKDHW>(
|
||||
params, ConvKernelType::BackwardWeight);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
222
test/gpu_reference/test_gpu_reference_conv_fwd.cpp
Normal file
222
test/gpu_reference/test_gpu_reference_conv_fwd.cpp
Normal file
@@ -0,0 +1,222 @@
|
||||
// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
|
||||
// SPDX-License-Identifier: MIT
|
||||
|
||||
#include <gtest/gtest.h>
|
||||
#include "gpu_reference_utils.hpp"
|
||||
|
||||
using namespace ck;
|
||||
using ck::test::ConvKernelType;
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP16Small)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_small();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP32Medium)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_medium();
|
||||
bool result = test::test_conv_gpu_ref<2, float, float, float>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv1DFP16)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_1d();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<1, half_t, half_t, half_t>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv3DFP16Small)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<3, half_t, half_t, half_t>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP16Stride2)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_stride2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP16GroupedG2)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2, half_t, half_t, half_t>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP32GroupedG4)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g4();
|
||||
bool result = test::test_conv_gpu_ref<2, float, float, float>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP32GroupedNHWGC_GKYXC_NHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NHWGC,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NHWGK>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP16GroupedNHWGC_GKYXC_NHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NHWGC,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NHWGK>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP32GroupedNGCHW_GKYXC_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NGKHW>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP16GroupedNGCHW_GKYXC_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKYXC,
|
||||
tensor_layout::convolution::NGKHW>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP32GroupedNGCHW_GKCYX_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKCYX,
|
||||
tensor_layout::convolution::NGKHW>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv2DFP16GroupedNGCHW_GKCYX_NGKHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_2d_grouped_g2();
|
||||
bool result =
|
||||
test::test_conv_gpu_ref<2,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCHW,
|
||||
tensor_layout::convolution::GKCYX,
|
||||
tensor_layout::convolution::NGKHW>(params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv3DFP32GroupedNDHWGC_GKZYXC_NDHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NDHWGC,
|
||||
tensor_layout::convolution::GKZYXC,
|
||||
tensor_layout::convolution::NDHWGK>(
|
||||
params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv3DFP16GroupedNDHWGC_GKZYXC_NDHWGK)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NDHWGC,
|
||||
tensor_layout::convolution::GKZYXC,
|
||||
tensor_layout::convolution::NDHWGK>(
|
||||
params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv3DFP32GroupedNGCDHW_GKCZYX_NGKDHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
float,
|
||||
float,
|
||||
float,
|
||||
tensor_layout::convolution::NGCDHW,
|
||||
tensor_layout::convolution::GKCZYX,
|
||||
tensor_layout::convolution::NGKDHW>(
|
||||
params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
|
||||
TEST(GpuReferenceConvFwd, Conv3DFP16GroupedNGCDHW_GKCZYX_NGKDHW)
|
||||
{
|
||||
auto params = test::conv_test_shapes::get_3d_small();
|
||||
// Modify to be grouped (G=2)
|
||||
params.G_ = 2;
|
||||
params.C_ = 16; // 8 per group
|
||||
params.K_ = 16; // 8 per group
|
||||
|
||||
bool result = test::test_conv_gpu_ref<3,
|
||||
half_t,
|
||||
half_t,
|
||||
half_t,
|
||||
tensor_layout::convolution::NGCDHW,
|
||||
tensor_layout::convolution::GKCZYX,
|
||||
tensor_layout::convolution::NGKDHW>(
|
||||
params, ConvKernelType::Forward);
|
||||
EXPECT_TRUE(result);
|
||||
}
|
||||
Reference in New Issue
Block a user