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https://github.com/ROCm/composable_kernel.git
synced 2026-05-13 09:45:56 +00:00
use ford/for instead of static_ford/static_for in threadwise copy, somehow register spill is greatly reduced on AMD
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@@ -112,14 +112,14 @@ void device_convolution_implicit_gemm_v4r1_nchw_kcyx_nkhw(InDesc,
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constexpr index_t GemmDataPerReadA = 4;
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constexpr index_t GemmDataPerReadB = 4;
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using InBlockCopySubLengths_E_N1_B_N2 = Sequence<1, 1, 4, 1>;
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using InBlockCopyClusterLengths_E_N1_B_N2 = Sequence<8, 2, 4, 4>;
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using InBlockCopySubLengths_E_N1_B_N2 = Sequence<1, 1, 2, 2>;
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using InBlockCopyClusterLengths_E_N1_B_N2 = Sequence<8, 2, 8, 2>;
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using InBlockCopyThreadClusterArrangeOrder = Sequence<0, 1, 3, 2>; // [E, N1, N2, B]
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using InBlockCopySrcAccessOrder = Sequence<0, 1, 3, 2>; // [E, N1, N2, B]
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using InBlockCopyDstAccessOrder = Sequence<0, 1, 2, 3>; // [E, N1, B, N2]
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constexpr index_t InBlockCopySrcDataPerRead_B = 4;
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constexpr index_t InBlockCopyDstDataPerWrite_N2 = 1;
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constexpr index_t InBlockCopySrcDataPerRead_B = 2;
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constexpr index_t InBlockCopyDstDataPerWrite_N2 = 2;
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using WeiBlockCopySubLengths_E_K = Sequence<2, 2>;
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using WeiBlockCopyClusterLengths_E_K = Sequence<4, 64>;
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@@ -16,7 +16,7 @@
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#include "device_convolution_implicit_gemm_v4r1_nchw_kcyx_nkhw.hpp"
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//#include "device_convolution_implicit_gemm_v4r2_nchw_kcyx_nkhw.hpp"
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//#include "device_convolution_implicit_gemm_v4r3_nchw_kcyx_nkhw.hpp"
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//#include "device_convolution_implicit_gemm_v4r4_nchw_kcyx_nkhw.hpp"
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#include "device_convolution_implicit_gemm_v4r4_nchw_kcyx_nkhw.hpp"
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struct GeneratorTensor_1
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{
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@@ -379,7 +379,7 @@ int main(int argc, char* argv[])
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#elif 0
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device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw(
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(in_nchw_desc, in_nchw, wei_kcyx_desc, wei_kcyx, out_nkhw_desc, out_nkhw_device, nrepeat);
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#elif 1
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#elif 0
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device_convolution_implicit_gemm_v4r1_nchw_kcyx_nkhw(in_nchw_desc,
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in_nchw,
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wei_kcyx_desc,
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