[CK_BUILDER] Convolution forward transfer concepts. (#3535)

* Rename member variable to better reflect its actuall meaning.

* Add transfer checks for conv fwd xdl.

* Validate tensor layouts & vector size conv fwd v3.

* Add combined transfer concepts.

* Add transfer concepts for conv fwd factories.

* Fix clang format

* Add helper instruction to get max mem vector instruction width.

* Apply review comments.

* Rename thread cluster access(->arrange) order concept

* FIx merge artifacts.

* Add generic access order limits into block transfer concept.

[ROCm/composable_kernel commit: 1a6d1b59ef]

include/ck_tile/core/arch/arch.hpp

@@ -1173,4 +1173,11 @@ enum LLVMSchedGroupMask : int32_t
     DS_WRITE   = 1 << 9,
     ALL        = (DS_WRITE << 1) - 1,
 };
+
+CK_TILE_HOST_DEVICE static constexpr auto get_max_mem_vec_inst_width()
+{
+    // Currently on all arch max memory vector instruction width is 16 bytes.
+    return 16;
+}
+
 } // namespace ck_tile