mirror of
https://github.com/ROCm/composable_kernel.git
synced 2026-05-03 13:11:25 +00:00
refactored deviceBatchedGemm; removed GridwiseBatchedGemm; added fp32 and int8 to profiler (#120)
changed long_index_t to index_t when computing memory offset uncomment other ops in profiler added test for batched_gemm
This commit is contained in:
Jianfeng Yan
@@ -10,12 +10,68 @@
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#include "tensor_layout.hpp"
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#include "tensor_descriptor.hpp"
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#include "tensor_descriptor_helper.hpp"
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#include "gridwise_batched_gemm_xdlops_v2r3.hpp"
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#include "gridwise_gemm_xdlops_v2r3.hpp"
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namespace ck {
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namespace tensor_operation {
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namespace device {
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template <typename GridwiseGemm,
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typename FloatAB,
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typename FloatC,
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typename AGridDesc_K0_M_K1,
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typename BGridDesc_K0_N_K1,
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typename CGridDesc_M0_N0_M1_N1_M2_M3_M4_N2,
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typename AElementwiseOperation,
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typename BElementwiseOperation,
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typename CElementwiseOperation,
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typename ComputeBasePrtOfBatch,
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typename Block2CTileMap,
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bool HasMainKBlockLoop>
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__global__ void
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#if CK_USE_LAUNCH_BOUNDS
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__launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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#endif
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kernel_batched_gemm_xdlops_v2r3(
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const FloatAB* __restrict__ p_a_grid,
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const FloatAB* __restrict__ p_b_grid,
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FloatC* __restrict__ p_c_grid,
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const index_t num_batches,
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const AGridDesc_K0_M_K1 a_grid_desc_k0_m_k1,
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const BGridDesc_K0_N_K1 b_grid_desc_k0_n_k1,
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const CGridDesc_M0_N0_M1_N1_M2_M3_M4_N2 c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2,
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const AElementwiseOperation a_element_op,
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const BElementwiseOperation b_element_op,
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const CElementwiseOperation c_element_op,
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const ComputeBasePrtOfBatch compute_base_ptr_of_batch_,
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const Block2CTileMap block_2_ctile_map)
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{
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const index_t num_blocks_per_batch =
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__builtin_amdgcn_readfirstlane(get_grid_size() / num_batches);
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const index_t g_idx = __builtin_amdgcn_readfirstlane(get_block_1d_id() / num_blocks_per_batch);
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const long_index_t a_batch_offset = __builtin_amdgcn_readfirstlane(
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static_cast<long_index_t>(compute_base_ptr_of_batch_.GetABasePtr(g_idx)));
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const long_index_t b_batch_offset = __builtin_amdgcn_readfirstlane(
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static_cast<long_index_t>(compute_base_ptr_of_batch_.GetBBasePtr(g_idx)));
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const long_index_t c_batch_offset = __builtin_amdgcn_readfirstlane(
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static_cast<long_index_t>(compute_base_ptr_of_batch_.GetCBasePtr(g_idx)));
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__shared__ char p_shared[GridwiseGemm::GetSharedMemoryNumberOfByte()];
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GridwiseGemm::template Run<HasMainKBlockLoop>(p_a_grid + a_batch_offset,
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p_b_grid + b_batch_offset,
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p_c_grid + c_batch_offset,
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p_shared,
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a_grid_desc_k0_m_k1,
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b_grid_desc_k0_n_k1,
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c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2,
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a_element_op,
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b_element_op,
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c_element_op,
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block_2_ctile_map);
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}
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template <typename ADataType,
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typename BDataType,
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typename CDataType,
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@@ -35,14 +91,14 @@ template <typename ADataType,
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ck::index_t NPerXDL,
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ck::index_t MXdlPerWave,
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ck::index_t NXdlPerWave,
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typename ABlockTransferThreadClusterLengths_G_K0_M_K1,
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typename ABlockTransferThreadClusterLengths_K0_M_K1,
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typename ABlockTransferThreadClusterArrangeOrder,
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typename ABlockTransferSrcAccessOrder,
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ck::index_t ABlockTransferSrcVectorDim,
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ck::index_t ABlockTransferSrcScalarPerVector,
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ck::index_t ABlockTransferDstScalarPerVector_K1,
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bool ABlockLdsAddExtraM,
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typename BBlockTransferThreadClusterLengths_G_K0_N_K1,
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typename BBlockTransferThreadClusterLengths_K0_N_K1,
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typename BBlockTransferThreadClusterArrangeOrder,
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typename BBlockTransferSrcAccessOrder,
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ck::index_t BBlockTransferSrcVectorDim,
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@@ -57,149 +113,215 @@ struct DeviceBatchedGemmXdl
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static constexpr auto I0 = Number<0>{};
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static constexpr auto I1 = Number<1>{};
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static constexpr auto I2 = Number<2>{};
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static constexpr auto I3 = Number<3>{};
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static constexpr auto K1Number = Number<K1>{};
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static auto
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MakeAGridDescriptor_G_K0_M_K1(index_t BatchCount, index_t M, index_t K, index_t StrideA)
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static auto MakeAGridDescriptor_K0_M_K1(index_t M, index_t K, index_t StrideA)
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{
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assert(K % K1 == 0);
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const index_t K0 = K / K1;
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const auto a_grid_desc_g_m_k = [&]() {
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const auto a_grid_desc_m_k = [&]() {
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if constexpr(is_same<tensor_layout::gemm::RowMajor, ALayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(BatchCount, M, K),
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make_tuple(M * StrideA, StrideA, I1));
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return make_naive_tensor_descriptor(make_tuple(M, K), make_tuple(StrideA, I1));
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}
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else if constexpr(is_same<tensor_layout::gemm::ColumnMajor, ALayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(BatchCount, M, K),
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make_tuple(K * StrideA, I1, StrideA));
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return make_naive_tensor_descriptor(make_tuple(M, K), make_tuple(I1, M));
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}
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}();
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const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
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const auto a_grid_desc_g_k0_mp_k1 =
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transform_tensor_descriptor(a_grid_desc_g_m_k,
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make_tuple(make_pass_through_transform(BatchCount),
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make_unmerge_transform(make_tuple(K0, K1Number)),
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const auto a_grid_desc_k0_mp_k1 =
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transform_tensor_descriptor(a_grid_desc_m_k,
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make_tuple(make_unmerge_transform(make_tuple(K0, K1Number)),
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make_right_pad_transform(M, PadM)),
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make_tuple(Sequence<0>{}, Sequence<2>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1, 3>{}, Sequence<2>{}));
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make_tuple(Sequence<1>{}, Sequence<0>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return a_grid_desc_g_k0_mp_k1;
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return a_grid_desc_k0_mp_k1;
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}
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static auto
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MakeBGridDescriptor_G_K0_N_K1(index_t BatchCount, index_t K, index_t N, index_t StrideB)
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static auto MakeBGridDescriptor_K0_N_K1(index_t K, index_t N, index_t StrideB)
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{
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assert(K % K1 == 0);
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const index_t K0 = K / K1;
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const auto b_grid_desc_g_k_n = [&]() {
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const auto b_grid_desc_k_n = [&]() {
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if constexpr(is_same<tensor_layout::gemm::RowMajor, BLayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(BatchCount, K, N),
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make_tuple(K * StrideB, StrideB, I1));
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return make_naive_tensor_descriptor(make_tuple(K, N), make_tuple(StrideB, I1));
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}
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else if constexpr(is_same<tensor_layout::gemm::ColumnMajor, BLayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(BatchCount, K, N),
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make_tuple(N * StrideB, I1, StrideB));
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return make_naive_tensor_descriptor(make_tuple(K, N), make_tuple(I1, K));
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}
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}();
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const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
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const auto b_grid_desc_g_k0_np_k1 =
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transform_tensor_descriptor(b_grid_desc_g_k_n,
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make_tuple(make_pass_through_transform(BatchCount),
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make_unmerge_transform(make_tuple(K0, K1Number)),
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const auto b_grid_desc_k0_np_k1 =
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transform_tensor_descriptor(b_grid_desc_k_n,
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make_tuple(make_unmerge_transform(make_tuple(K0, K1Number)),
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make_right_pad_transform(N, PadN)),
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make_tuple(Sequence<0>{}, Sequence<1>{}, Sequence<2>{}),
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make_tuple(Sequence<0>{}, Sequence<1, 3>{}, Sequence<2>{}));
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
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return b_grid_desc_g_k0_np_k1;
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return b_grid_desc_k0_np_k1;
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}
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static auto MakeCGridDescriptor_G_M_N(index_t BatchCount, index_t M, index_t N, index_t StrideC)
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static auto MakeCGridDescriptor_M_N(index_t M, index_t N, index_t StrideC)
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{
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const auto c_grid_desc_g_m_n = [&]() {
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const auto c_grid_desc_m_n = [&]() {
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if constexpr(is_same<tensor_layout::gemm::RowMajor, CLayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(BatchCount, M, N),
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make_tuple(M * StrideC, StrideC, I1));
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return make_naive_tensor_descriptor(make_tuple(M, N), make_tuple(StrideC, I1));
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}
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else if constexpr(is_same<tensor_layout::gemm::ColumnMajor, CLayout>::value)
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{
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return make_naive_tensor_descriptor(make_tuple(BatchCount, M, N),
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make_tuple(N * StrideC, I1, StrideC));
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return make_naive_tensor_descriptor(make_tuple(M, N), make_tuple(I1, M));
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}
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}();
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const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
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const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
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const auto c_grid_desc_g_mp_np =
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transform_tensor_descriptor(c_grid_desc_g_m_n,
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make_tuple(make_pass_through_transform(BatchCount),
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make_right_pad_transform(M, PadM),
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make_right_pad_transform(N, PadN)),
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make_tuple(Sequence<0>{}, Sequence<1>{}, Sequence<2>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}, Sequence<2>{}));
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const auto c_grid_desc_mp_np = transform_tensor_descriptor(
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c_grid_desc_m_n,
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make_tuple(make_right_pad_transform(M, PadM), make_right_pad_transform(N, PadN)),
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make_tuple(Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1>{}));
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return c_grid_desc_g_mp_np;
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return c_grid_desc_mp_np;
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}
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using AGridDesc_G_K0_M_K1 = decltype(MakeAGridDescriptor_G_K0_M_K1(1, 1, 1, 1));
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using BGridDesc_G_K0_N_K1 = decltype(MakeBGridDescriptor_G_K0_N_K1(1, 1, 1, 1));
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using CGridDesc_G_M_N = decltype(MakeCGridDescriptor_G_M_N(1, 1, 1, 1));
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using AGridDesc_K0_M_K1 = decltype(MakeAGridDescriptor_K0_M_K1(1, 1, 1));
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using BGridDesc_K0_N_K1 = decltype(MakeBGridDescriptor_K0_N_K1(1, 1, 1));
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using CGridDesc_M_N = decltype(MakeCGridDescriptor_M_N(1, 1, 1));
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// GridwiseBatchedGemm
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using GridwiseBatchedGemm = GridwiseBatchedGemm_gk0mk1_gk0nk1_gmn_xdlops_v2r3<
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BlockSize,
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ADataType, // TODO: distinguish A/B datatype
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AccDataType,
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CDataType,
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InMemoryDataOperationEnum_t::Set,
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AGridDesc_G_K0_M_K1,
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BGridDesc_G_K0_N_K1,
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CGridDesc_G_M_N,
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AElementwiseOperation,
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BElementwiseOperation,
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CElementwiseOperation,
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MPerBlock,
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NPerBlock,
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K0PerBlock,
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MPerXDL,
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NPerXDL,
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K1,
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MXdlPerWave,
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NXdlPerWave,
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ABlockTransferThreadClusterLengths_G_K0_M_K1,
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ABlockTransferThreadClusterArrangeOrder,
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ABlockTransferSrcAccessOrder,
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ABlockTransferSrcVectorDim,
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ABlockTransferSrcScalarPerVector,
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ABlockTransferDstScalarPerVector_K1,
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false, // AThreadTransferSrcResetCoordinateAfterRun,
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ABlockLdsAddExtraM,
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BBlockTransferThreadClusterLengths_G_K0_N_K1,
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BBlockTransferThreadClusterArrangeOrder,
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BBlockTransferSrcAccessOrder,
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BBlockTransferSrcVectorDim,
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BBlockTransferSrcScalarPerVector,
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BBlockTransferDstScalarPerVector_K1,
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false, // BThreadTransferSrcResetCoordinateAfterRun,
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BBlockLdsAddExtraN,
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Sequence<0, 1, 3, 5, 6, 7, 2, 4, 8>, // CThreadTransferSrcDstAccessOrder,
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CThreadTransferSrcDstVectorDim,
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CThreadTransferDstScalarPerVector>;
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struct Block2CTileMapMaker
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{
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Block2CTileMapMaker(index_t num_batches) : num_batches_(num_batches) {}
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__host__ __device__ constexpr auto
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MakeBlock2CTileMap(const CGridDesc_M_N& c_grid_desc_m_n, index_t M01, index_t N01)
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{
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const auto M = c_grid_desc_m_n.GetLength(I0);
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const auto N = c_grid_desc_m_n.GetLength(I1);
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constexpr auto M1 = Number<MPerBlock>{};
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constexpr auto N1 = Number<NPerBlock>{};
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const auto M0 = M / M1;
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const auto N0 = N / N1;
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const auto M00 = M0 / M01;
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const auto N00 = N0 / N01;
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const auto g_m00_m01_n00_n01_to_m0_n0_block_cluster_adaptor =
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make_single_stage_tensor_adaptor(
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make_tuple(make_insert_transform(num_batches_),
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make_unmerge_transform(make_tuple(M00, M01)),
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make_unmerge_transform(make_tuple(N00, N01))),
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make_tuple(Sequence<>{}, Sequence<0>{}, Sequence<1>{}),
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make_tuple(Sequence<0>{}, Sequence<1, 3>{}, Sequence<2, 4>{}));
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const auto globalblockid_to_m00_m01_n00_n01_block_cluster_adaptor =
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make_single_stage_tensor_adaptor(
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make_tuple(make_merge_transform(make_tuple(num_batches_, M00, N00, M01, N01))),
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make_tuple(Sequence<0, 1, 2, 3, 4>{}),
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make_tuple(Sequence<0>{}));
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const auto globalblockid_to_m0_n0_block_cluster_adaptor =
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chain_tensor_adaptors(g_m00_m01_n00_n01_to_m0_n0_block_cluster_adaptor,
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globalblockid_to_m00_m01_n00_n01_block_cluster_adaptor);
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return globalblockid_to_m0_n0_block_cluster_adaptor;
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}
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private:
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index_t num_batches_;
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};
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struct ComputeBasePtrOfStridedBatch
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{
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ComputeBasePtrOfStridedBatch(index_t BatchStrideA,
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index_t BatchStrideB,
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index_t BatchStrideC)
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: BatchStrideA_(BatchStrideA), BatchStrideB_(BatchStrideB), BatchStrideC_(BatchStrideC)
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{
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}
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__host__ __device__ constexpr long_index_t GetABasePtr(index_t g_idx) const
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{
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return g_idx * static_cast<long_index_t>(BatchStrideA_);
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}
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__host__ __device__ constexpr long_index_t GetBBasePtr(index_t g_idx) const
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{
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return g_idx * static_cast<long_index_t>(BatchStrideB_);
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}
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__host__ __device__ constexpr long_index_t GetCBasePtr(index_t g_idx) const
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{
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return g_idx * static_cast<long_index_t>(BatchStrideC_);
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}
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private:
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index_t BatchStrideA_;
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index_t BatchStrideB_;
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index_t BatchStrideC_;
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};
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// GridwiseGemm
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using GridwiseGemm =
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GridwiseGemm_k0mk1_k0nk1_mn_xdlops_v2r3<BlockSize,
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ADataType, // TODO: distinguish A/B datatype
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AccDataType,
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CDataType,
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InMemoryDataOperationEnum_t::Set,
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AGridDesc_K0_M_K1,
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BGridDesc_K0_N_K1,
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CGridDesc_M_N,
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AElementwiseOperation,
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BElementwiseOperation,
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CElementwiseOperation,
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MPerBlock,
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NPerBlock,
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K0PerBlock,
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MPerXDL,
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NPerXDL,
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K1,
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MXdlPerWave,
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NXdlPerWave,
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ABlockTransferThreadClusterLengths_K0_M_K1,
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ABlockTransferThreadClusterArrangeOrder,
|
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ABlockTransferSrcAccessOrder,
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ABlockTransferSrcVectorDim,
|
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ABlockTransferSrcScalarPerVector,
|
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ABlockTransferDstScalarPerVector_K1,
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false, // AThreadTransferSrcResetCoordinateAfterRun,
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ABlockLdsAddExtraM,
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BBlockTransferThreadClusterLengths_K0_N_K1,
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BBlockTransferThreadClusterArrangeOrder,
|
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BBlockTransferSrcAccessOrder,
|
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BBlockTransferSrcVectorDim,
|
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BBlockTransferSrcScalarPerVector,
|
||||
BBlockTransferDstScalarPerVector_K1,
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false, // BThreadTransferSrcResetCoordinateAfterRun,
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||||
BBlockLdsAddExtraN,
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Sequence<2, 3, 0, 1, 7, 5, 4, 6>,
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CThreadTransferSrcDstVectorDim,
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||||
CThreadTransferDstScalarPerVector>;
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||||
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using CGridDesc_M0_N0_M1_N1_M2_M3_M4_N2 =
|
||||
decltype(GridwiseGemm::MakeCGridDescriptor_M0_N0_M1_N1_M2_M3_M4_N2(CGridDesc_M_N{}));
|
||||
using Block2CTileMap =
|
||||
decltype(Block2CTileMapMaker{1}.MakeBlock2CTileMap(CGridDesc_M_N{}, 1, 1));
|
||||
|
||||
// Argument
|
||||
struct Argument : public BaseArgument
|
||||
@@ -222,10 +344,16 @@ struct DeviceBatchedGemmXdl
|
||||
: p_a_grid_{p_a_grid},
|
||||
p_b_grid_{p_b_grid},
|
||||
p_c_grid_{p_c_grid},
|
||||
a_grid_desc_g_k0_m_k1_{},
|
||||
b_grid_desc_g_k0_n_k1_{},
|
||||
c_grid_desc_g_m_n_{},
|
||||
c_grid_desc_g_m0_n0_m1_n1_m2_m3_m4_n2_{},
|
||||
BatchCount_(BatchCount),
|
||||
a_grid_desc_k0_m_k1_{
|
||||
DeviceBatchedGemmXdl::MakeAGridDescriptor_K0_M_K1(M, K, StrideA)},
|
||||
b_grid_desc_k0_n_k1_{
|
||||
DeviceBatchedGemmXdl::MakeBGridDescriptor_K0_N_K1(K, N, StrideB)},
|
||||
c_grid_desc_m_n_{DeviceBatchedGemmXdl::MakeCGridDescriptor_M_N(M, N, StrideC)},
|
||||
c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2_{},
|
||||
compute_base_ptr_of_batch_{a_grid_desc_k0_m_k1_.GetElementSpaceSize(),
|
||||
b_grid_desc_k0_n_k1_.GetElementSpaceSize(),
|
||||
c_grid_desc_m_n_.GetElementSpaceSize()},
|
||||
block_2_ctile_map_{},
|
||||
M01_{M01},
|
||||
N01_{N01},
|
||||
@@ -233,22 +361,14 @@ struct DeviceBatchedGemmXdl
|
||||
b_element_op_{b_element_op},
|
||||
c_element_op_{c_element_op}
|
||||
{
|
||||
a_grid_desc_g_k0_m_k1_ =
|
||||
DeviceBatchedGemmXdl::MakeAGridDescriptor_G_K0_M_K1(BatchCount, M, K, StrideA);
|
||||
b_grid_desc_g_k0_n_k1_ =
|
||||
DeviceBatchedGemmXdl::MakeBGridDescriptor_G_K0_N_K1(BatchCount, K, N, StrideB);
|
||||
c_grid_desc_g_m_n_ =
|
||||
DeviceBatchedGemmXdl::MakeCGridDescriptor_G_M_N(BatchCount, M, N, StrideC);
|
||||
|
||||
if(GridwiseBatchedGemm::CheckValidity(
|
||||
a_grid_desc_g_k0_m_k1_, b_grid_desc_g_k0_n_k1_, c_grid_desc_g_m_n_, M01_, N01_))
|
||||
if(GridwiseGemm::CheckValidity(
|
||||
a_grid_desc_k0_m_k1_, b_grid_desc_k0_n_k1_, c_grid_desc_m_n_, M01_, N01_))
|
||||
{
|
||||
c_grid_desc_g_m0_n0_m1_n1_m2_m3_m4_n2_ =
|
||||
GridwiseBatchedGemm::MakeCGridDescriptor_G_M0_N0_M1_N1_M2_M3_M4_N2(
|
||||
c_grid_desc_g_m_n_);
|
||||
c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2_ =
|
||||
GridwiseGemm::MakeCGridDescriptor_M0_N0_M1_N1_M2_M3_M4_N2(c_grid_desc_m_n_);
|
||||
|
||||
block_2_ctile_map_ =
|
||||
GridwiseBatchedGemm::MakeDefaultBlock2CTileMap(c_grid_desc_g_m_n_, M01, N01);
|
||||
Block2CTileMapMaker{BatchCount}.MakeBlock2CTileMap(c_grid_desc_m_n_, M01, N01);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -256,12 +376,13 @@ struct DeviceBatchedGemmXdl
|
||||
const ADataType* p_a_grid_;
|
||||
const BDataType* p_b_grid_;
|
||||
CDataType* p_c_grid_;
|
||||
AGridDesc_G_K0_M_K1 a_grid_desc_g_k0_m_k1_;
|
||||
BGridDesc_G_K0_N_K1 b_grid_desc_g_k0_n_k1_;
|
||||
CGridDesc_G_M_N c_grid_desc_g_m_n_;
|
||||
typename GridwiseBatchedGemm::CGridDesc_G_M0_N0_M1_N1_M2_M3_M4_N2
|
||||
c_grid_desc_g_m0_n0_m1_n1_m2_m3_m4_n2_;
|
||||
typename GridwiseBatchedGemm::DefaultBlock2CTileMap block_2_ctile_map_;
|
||||
index_t BatchCount_;
|
||||
AGridDesc_K0_M_K1 a_grid_desc_k0_m_k1_;
|
||||
BGridDesc_K0_N_K1 b_grid_desc_k0_n_k1_;
|
||||
CGridDesc_M_N c_grid_desc_m_n_;
|
||||
CGridDesc_M0_N0_M1_N1_M2_M3_M4_N2 c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2_;
|
||||
ComputeBasePtrOfStridedBatch compute_base_ptr_of_batch_;
|
||||
Block2CTileMap block_2_ctile_map_;
|
||||
index_t M01_;
|
||||
index_t N01_;
|
||||
AElementwiseOperation a_element_op_;
|
||||
@@ -277,57 +398,51 @@ struct DeviceBatchedGemmXdl
|
||||
float Run(const Argument& arg, int nrepeat = 1)
|
||||
{
|
||||
{
|
||||
std::cout << "arg.a_grid_desc_g_k0_m_k1_{"
|
||||
<< arg.a_grid_desc_g_k0_m_k1_.GetLength(I0) << ", "
|
||||
<< arg.a_grid_desc_g_k0_m_k1_.GetLength(I1) << ", "
|
||||
<< arg.a_grid_desc_g_k0_m_k1_.GetLength(I2) << ", "
|
||||
<< arg.a_grid_desc_g_k0_m_k1_.GetLength(I3) << "}" << std::endl;
|
||||
std::cout << "arg.a_grid_desc_k0_m_k1_{" << arg.a_grid_desc_k0_m_k1_.GetLength(I0)
|
||||
<< ", " << arg.a_grid_desc_k0_m_k1_.GetLength(I1) << ", "
|
||||
<< arg.a_grid_desc_k0_m_k1_.GetLength(I2) << "}" << std::endl;
|
||||
|
||||
std::cout << "arg.b_grid_desc_g_k0_n_k1_{"
|
||||
<< arg.b_grid_desc_g_k0_n_k1_.GetLength(I0) << ", "
|
||||
<< arg.b_grid_desc_g_k0_n_k1_.GetLength(I1) << ", "
|
||||
<< arg.b_grid_desc_g_k0_n_k1_.GetLength(I2) << ", "
|
||||
<< arg.b_grid_desc_g_k0_n_k1_.GetLength(I3) << "}" << std::endl;
|
||||
std::cout << "arg.b_grid_desc_k0_n_k1_{" << arg.b_grid_desc_k0_n_k1_.GetLength(I0)
|
||||
<< ", " << arg.b_grid_desc_k0_n_k1_.GetLength(I1) << ", "
|
||||
<< arg.b_grid_desc_k0_n_k1_.GetLength(I2) << "}" << std::endl;
|
||||
|
||||
std::cout << "arg.c_grid_desc_g_m_n_{" << arg.c_grid_desc_g_m_n_.GetLength(I0)
|
||||
<< ", " << arg.c_grid_desc_g_m_n_.GetLength(I1) << ", "
|
||||
<< arg.c_grid_desc_g_m_n_.GetLength(I2) << "}" << std::endl;
|
||||
std::cout << "arg.c_grid_desc_m_n_{" << arg.c_grid_desc_m_n_.GetLength(I0) << ", "
|
||||
<< arg.c_grid_desc_m_n_.GetLength(I1) << "}" << std::endl;
|
||||
}
|
||||
|
||||
if(!GridwiseBatchedGemm::CheckValidity(arg.a_grid_desc_g_k0_m_k1_,
|
||||
arg.b_grid_desc_g_k0_n_k1_,
|
||||
arg.c_grid_desc_g_m_n_,
|
||||
arg.M01_,
|
||||
arg.N01_))
|
||||
if(!GridwiseGemm::CheckValidity(arg.a_grid_desc_k0_m_k1_,
|
||||
arg.b_grid_desc_k0_n_k1_,
|
||||
arg.c_grid_desc_m_n_,
|
||||
arg.M01_,
|
||||
arg.N01_))
|
||||
{
|
||||
throw std::runtime_error(
|
||||
"wrong! GridwiseBatchedGemm_km_kn_m0m1n0n1_xdlops_v2r3 has invalid setting");
|
||||
}
|
||||
|
||||
const index_t grid_size =
|
||||
GridwiseBatchedGemm::CalculateGridSize(arg.c_grid_desc_g_m_n_);
|
||||
GridwiseGemm::CalculateGridSize(arg.c_grid_desc_m_n_) * arg.BatchCount_;
|
||||
|
||||
const auto K0 = arg.a_grid_desc_g_k0_m_k1_.GetLength(I1);
|
||||
const auto K0 = arg.a_grid_desc_k0_m_k1_.GetLength(I0);
|
||||
|
||||
const bool has_main_k0_block_loop =
|
||||
GridwiseBatchedGemm::CalculateHasMainK0BlockLoop(K0);
|
||||
const bool has_main_k0_block_loop = GridwiseGemm::CalculateHasMainK0BlockLoop(K0);
|
||||
|
||||
float ave_time = 0;
|
||||
|
||||
if(has_main_k0_block_loop)
|
||||
{
|
||||
const auto kernel = kernel_batched_gemm_xdlops_v2r3<
|
||||
GridwiseBatchedGemm,
|
||||
GridwiseGemm,
|
||||
ADataType, // TODO: distiguish A/B datatype
|
||||
CDataType,
|
||||
remove_reference_t<DeviceBatchedGemmXdl::AGridDesc_G_K0_M_K1>,
|
||||
remove_reference_t<DeviceBatchedGemmXdl::BGridDesc_G_K0_N_K1>,
|
||||
remove_reference_t<
|
||||
typename GridwiseBatchedGemm::CGridDesc_G_M0_N0_M1_N1_M2_M3_M4_N2>,
|
||||
remove_reference_t<DeviceBatchedGemmXdl::AGridDesc_K0_M_K1>,
|
||||
remove_reference_t<DeviceBatchedGemmXdl::BGridDesc_K0_N_K1>,
|
||||
remove_reference_t<typename GridwiseGemm::CGridDesc_M0_N0_M1_N1_M2_M3_M4_N2>,
|
||||
AElementwiseOperation,
|
||||
BElementwiseOperation,
|
||||
CElementwiseOperation,
|
||||
remove_reference_t<typename GridwiseBatchedGemm::DefaultBlock2CTileMap>,
|
||||
ComputeBasePtrOfStridedBatch,
|
||||
remove_reference_t<Block2CTileMap>,
|
||||
true>;
|
||||
|
||||
ave_time = launch_and_time_kernel(kernel,
|
||||
@@ -338,28 +453,30 @@ struct DeviceBatchedGemmXdl
|
||||
arg.p_a_grid_,
|
||||
arg.p_b_grid_,
|
||||
arg.p_c_grid_,
|
||||
arg.a_grid_desc_g_k0_m_k1_,
|
||||
arg.b_grid_desc_g_k0_n_k1_,
|
||||
arg.c_grid_desc_g_m0_n0_m1_n1_m2_m3_m4_n2_,
|
||||
arg.BatchCount_,
|
||||
arg.a_grid_desc_k0_m_k1_,
|
||||
arg.b_grid_desc_k0_n_k1_,
|
||||
arg.c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2_,
|
||||
arg.a_element_op_,
|
||||
arg.b_element_op_,
|
||||
arg.c_element_op_,
|
||||
arg.compute_base_ptr_of_batch_,
|
||||
arg.block_2_ctile_map_);
|
||||
}
|
||||
else
|
||||
{
|
||||
const auto kernel = kernel_batched_gemm_xdlops_v2r3<
|
||||
GridwiseBatchedGemm,
|
||||
GridwiseGemm,
|
||||
ADataType, // TODO: distiguish A/B datatype
|
||||
CDataType,
|
||||
remove_reference_t<DeviceBatchedGemmXdl::AGridDesc_G_K0_M_K1>,
|
||||
remove_reference_t<DeviceBatchedGemmXdl::BGridDesc_G_K0_N_K1>,
|
||||
remove_reference_t<
|
||||
typename GridwiseBatchedGemm::CGridDesc_G_M0_N0_M1_N1_M2_M3_M4_N2>,
|
||||
remove_reference_t<DeviceBatchedGemmXdl::AGridDesc_K0_M_K1>,
|
||||
remove_reference_t<DeviceBatchedGemmXdl::BGridDesc_K0_N_K1>,
|
||||
remove_reference_t<typename GridwiseGemm::CGridDesc_M0_N0_M1_N1_M2_M3_M4_N2>,
|
||||
AElementwiseOperation,
|
||||
BElementwiseOperation,
|
||||
CElementwiseOperation,
|
||||
remove_reference_t<typename GridwiseBatchedGemm::DefaultBlock2CTileMap>,
|
||||
ComputeBasePtrOfStridedBatch,
|
||||
remove_reference_t<Block2CTileMap>,
|
||||
false>;
|
||||
|
||||
ave_time = launch_and_time_kernel(kernel,
|
||||
@@ -370,12 +487,14 @@ struct DeviceBatchedGemmXdl
|
||||
arg.p_a_grid_,
|
||||
arg.p_b_grid_,
|
||||
arg.p_c_grid_,
|
||||
arg.a_grid_desc_g_k0_m_k1_,
|
||||
arg.b_grid_desc_g_k0_n_k1_,
|
||||
arg.c_grid_desc_g_m0_n0_m1_n1_m2_m3_m4_n2_,
|
||||
arg.BatchCount_,
|
||||
arg.a_grid_desc_k0_m_k1_,
|
||||
arg.b_grid_desc_k0_n_k1_,
|
||||
arg.c_grid_desc_m0_n0_m1_n1_m2_m3_m4_n2_,
|
||||
arg.a_element_op_,
|
||||
arg.b_element_op_,
|
||||
arg.c_element_op_,
|
||||
arg.compute_base_ptr_of_batch_,
|
||||
arg.block_2_ctile_map_);
|
||||
}
|
||||
|
||||
@@ -397,11 +516,11 @@ struct DeviceBatchedGemmXdl
|
||||
|
||||
static bool IsSupportedArgument(const Argument& arg)
|
||||
{
|
||||
return GridwiseBatchedGemm::CheckValidity(arg.a_grid_desc_g_k0_m_k1_,
|
||||
arg.b_grid_desc_g_k0_n_k1_,
|
||||
arg.c_grid_desc_g_m_n_,
|
||||
arg.M01_,
|
||||
arg.N01_);
|
||||
return GridwiseGemm::CheckValidity(arg.a_grid_desc_k0_m_k1_,
|
||||
arg.b_grid_desc_k0_n_k1_,
|
||||
arg.c_grid_desc_m_n_,
|
||||
arg.M01_,
|
||||
arg.N01_);
|
||||
}
|
||||
|
||||
// polymorphic
|
||||
|
||||
Reference in New Issue
Block a user