Compile for gfx908 and gfx90a (#130)

* adding compilation for multiple targets

* fix build

* clean

* update Jekinsfile

* update readme

* update Jenkins

* use ck::half_t instead of ushort for bf16

* rename enum classes

* clean

* rename

* clean

include/ck/tensor_operation/gpu/device/convolution_backward_data_specialization.hpp

@@ -5,7 +5,7 @@ namespace ck {
 namespace tensor_operation {
 namespace device {
 
-enum struct ConvolutionBackwardDataSpecialization_t
+enum struct ConvolutionBackwardDataSpecialization
 {
     Default,
     Filter1x1Stride1Pad0,

include/ck/tensor_operation/gpu/device/convolution_forward_specialization.hpp

@@ -7,7 +7,7 @@ namespace ck {
 namespace tensor_operation {
 namespace device {
 
-enum struct ConvolutionForwardSpecialization_t
+enum struct ConvolutionForwardSpecialization
 {
     Default,
     Filter1x1Pad0,
@@ -15,14 +15,14 @@ enum struct ConvolutionForwardSpecialization_t
     OddC,
 };
 
-inline std::string getConvFwdSpecializationStr(const ConvolutionForwardSpecialization_t& s)
+inline std::string getConvFwdSpecializationStr(const ConvolutionForwardSpecialization& s)
 {
     switch(s)
     {
-    case ConvolutionForwardSpecialization_t::Default: return "Default";
-    case ConvolutionForwardSpecialization_t::Filter1x1Pad0: return "Filter1x1Pad0";
-    case ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0: return "Filter1x1Stride1Pad0";
-    case ConvolutionForwardSpecialization_t::OddC: return "OddC";
+    case ConvolutionForwardSpecialization::Default: return "Default";
+    case ConvolutionForwardSpecialization::Filter1x1Pad0: return "Filter1x1Pad0";
+    case ConvolutionForwardSpecialization::Filter1x1Stride1Pad0: return "Filter1x1Stride1Pad0";
+    case ConvolutionForwardSpecialization::OddC: return "OddC";
     default: return "Unrecognized specialization!";
     }
 }

include/ck/tensor_operation/gpu/device/device_batched_gemm_reduce_xdl_cshuffle.hpp

@@ -105,7 +105,7 @@ template <typename ALayout,
           typename CElementwiseOperation,
           typename D0ReduceOperation,
           typename D1ReduceOperation,
-          GemmSpecialization_t GemmSpecialization,
+          GemmSpecialization GemmSpec,
           index_t NumGemmKPrefetchStage,
           index_t BlockSize,
           index_t MPerBlock,
@@ -171,8 +171,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
         const auto MPad = M - MRaw;
         const auto KPad = K - KRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MKPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MKPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad both M and K
             assert(K % AK1 == 0);
@@ -195,8 +195,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
 
             return a_grid_desc_ak0_m_ak1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MNPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
+                          GemmSpec == GemmSpecialization::MNPadding)
         {
             // pad M, but not K
             assert(KRaw % AK1 == 0);
@@ -212,8 +212,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
 
             return a_grid_desc_ak0_m_ak1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::KPadding ||
-                          GemmSpecialization == GemmSpecialization_t::NKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
+                          GemmSpec == GemmSpecialization::NKPadding)
         {
             // pad K, but not M
             assert(K % AK1 == 0);
@@ -274,8 +274,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
         const auto NPad = N - NRaw;
         const auto KPad = K - KRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::NKPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::NKPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad both N and K
             assert(K % BK1 == 0);
@@ -298,8 +298,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
 
             return b_grid_desc_bk0_n_bk1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::NPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MNPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
+                          GemmSpec == GemmSpecialization::MNPadding)
         {
             // pad N, but not K
             assert(KRaw % BK1 == 0);
@@ -315,8 +315,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
 
             return b_grid_desc_bk0_n_bk1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::KPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
+                          GemmSpec == GemmSpecialization::MKPadding)
         {
             // pad K, but not N
             assert(K % BK1 == 0);
@@ -377,8 +377,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
         const auto MPad = M - MRaw;
         const auto NPad = N - NRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad M and N
             return transform_tensor_descriptor(c_grid_desc_mraw_nraw,
@@ -387,8 +387,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
                                                make_tuple(Sequence<0>{}, Sequence<1>{}),
                                                make_tuple(Sequence<0>{}, Sequence<1>{}));
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
+                          GemmSpec == GemmSpecialization::MKPadding)
         {
             // pad M, but not N
             return transform_tensor_descriptor(
@@ -397,8 +397,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
                 make_tuple(Sequence<0>{}, Sequence<1>{}),
                 make_tuple(Sequence<0>{}, Sequence<1>{}));
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::NPadding ||
-                          GemmSpecialization == GemmSpecialization_t::NKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
+                          GemmSpec == GemmSpecialization::NKPadding)
         {
             // pad N, but not M
             return transform_tensor_descriptor(
@@ -422,10 +422,10 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
         const auto M    = math::integer_divide_ceil(MRaw, MPerBlock) * MPerBlock;
         const auto MPad = M - MRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MKPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MPadding ||
+                     GemmSpec == GemmSpecialization::MNPadding ||
+                     GemmSpec == GemmSpecialization::MKPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad M
             return transform_tensor_descriptor(d_grid_desc_mraw,
@@ -544,8 +544,8 @@ struct DeviceBatchedGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwi
         CElementwiseOperation,
         D0ReduceOperation,
         D1ReduceOperation,
-        InMemoryDataOperationEnum_t::Set,
-        InMemoryDataOperationEnum_t::AtomicAdd,
+        InMemoryDataOperationEnum::Set,
+        InMemoryDataOperationEnum::AtomicAdd,
         AGridDesc_AK0_M_AK1,
         BGridDesc_BK0_N_BK1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_batched_gemm_xdl.hpp

@@ -277,7 +277,7 @@ struct DeviceBatchedGemmXdl
                                                 ADataType, // TODO: distinguish A/B datatype
                                                 AccDataType,
                                                 CDataType,
-                                                InMemoryDataOperationEnum_t::Set,
+                                                InMemoryDataOperationEnum::Set,
                                                 AGridDesc_K0_M_K1,
                                                 BGridDesc_K0_N_K1,
                                                 CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_conv2d_backward_weight_xdl_c_shuffle_nhwc_kyxc_nhwk.hpp

@@ -209,7 +209,7 @@ struct DeviceConv2dWrWXdl_C_Shuffle_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_W
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -250,7 +250,7 @@ struct DeviceConv2dWrWXdl_C_Shuffle_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_W
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::AtomicAdd,
+        InMemoryDataOperationEnum::AtomicAdd,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_conv2d_bwd_data_xdl_nhwc_kyxc_nhwk.hpp

@@ -25,7 +25,7 @@ template <typename InDataType,
           typename InElementwiseOperation,
           typename WeiElementwiseOperation,
           typename OutElementwiseOperation,
-          ConvolutionBackwardDataSpecialization_t ConvBackwardDataSpecialization,
+          ConvolutionBackwardDataSpecialization ConvBackwardDataSpecialization,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
           ck::index_t NPerBlock,
@@ -131,7 +131,7 @@ struct DeviceConv2dBwdDataXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
             make_naive_tensor_descriptor_packed(make_tuple(N, Hi, Wi, C));
 
         if constexpr(ConvBackwardDataSpecialization ==
-                     ConvolutionBackwardDataSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionBackwardDataSpecialization::Filter1x1Stride1Pad0)
         {
             // A: output tensor
             const auto out_gemmk0_gemmm_gemmk1_grid_desc = transform_tensor_descriptor(
@@ -368,7 +368,7 @@ struct DeviceConv2dBwdDataXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
         ABDataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -671,7 +671,7 @@ struct DeviceConv2dBwdDataXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
     static bool IsSupportedArgument(const Argument& arg)
     {
         if constexpr(ConvBackwardDataSpecialization ==
-                     ConvolutionBackwardDataSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionBackwardDataSpecialization::Filter1x1Stride1Pad0)
         {
             // check if it's 1x1, stride=1 pad = 0 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&

include/ck/tensor_operation/gpu/device/device_conv2d_fwd_xdl_c_shuffle_bias_activation_add_nhwc_kyxc_nhwk.hpp

@@ -27,7 +27,7 @@ template <
     typename InElementwiseOperation,
     typename WeiElementwiseOperation,
     typename OutElementwiseOperation,
-    ConvolutionForwardSpecialization_t ConvForwardSpecialization,
+    ConvolutionForwardSpecialization ConvForwardSpecialization,
     ck::index_t BlockSize,
     ck::index_t MPerBlock,
     ck::index_t NPerBlock,
@@ -125,7 +125,7 @@ struct
         const auto GemmMPad = GemmM - GemmMRaw;
 
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         { // 1x1, stride=1, pad=0
             const index_t GemmK = Y * X * C;
             assert(GemmK % GemmK1Number == 0);
@@ -179,7 +179,7 @@ struct
                               resi_grid_desc_gemmm_gemmn);
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         { // 1x1, pad=0
             const index_t GemmK = Y * X * C;
             assert(GemmK % GemmK1Number == 0);
@@ -249,7 +249,7 @@ struct
                               bias_grid_desc_gemmm_gemmn,
                               resi_grid_desc_gemmm_gemmn);
         }
-        else if constexpr(ConvForwardSpecialization == ConvolutionForwardSpecialization_t::OddC)
+        else if constexpr(ConvForwardSpecialization == ConvolutionForwardSpecialization::OddC)
         { // C = odd value
             const index_t GemmKRaw = Y * X * C;
             const index_t GemmK = math::integer_least_multiple(GemmKRaw, K0PerBlock * GemmK1Number);
@@ -466,7 +466,7 @@ struct
         ABDataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -811,7 +811,7 @@ struct
     static bool IsSupportedArgument(const Argument& arg)
     {
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             // check if it's 1x1, stride=1 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&
@@ -823,7 +823,7 @@ struct
             }
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             // check if it's 1x1 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&

include/ck/tensor_operation/gpu/device/device_conv2d_fwd_xdl_c_shuffle_bias_activation_nhwc_kyxc_nhwk.hpp

@@ -27,8 +27,8 @@ template <
     typename InElementwiseOperation,
     typename WeiElementwiseOperation,
     typename OutElementwiseOperation,
-    InMemoryDataOperationEnum_t OutGlobalMemoryDataOperation,
-    ConvolutionForwardSpecialization_t ConvForwardSpecialization,
+    InMemoryDataOperationEnum OutGlobalMemoryDataOperation,
+    ConvolutionForwardSpecialization ConvForwardSpecialization,
     ck::index_t BlockSize,
     ck::index_t MPerBlock,
     ck::index_t NPerBlock,
@@ -124,7 +124,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Bias_Activation_Input_N_Hi_Wi_C_Weight_K_Y_X
         const auto GemmMPad = GemmM - GemmMRaw;
 
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         { // 1x1, stride=1, pad=0
             const index_t GemmK = Y * X * C;
             assert(GemmK % GemmK1Number == 0);
@@ -174,7 +174,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Bias_Activation_Input_N_Hi_Wi_C_Weight_K_Y_X
                               bias_grid_desc_gemmm_gemmn);
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         { // 1x1, pad=0
             const index_t GemmK = Y * X * C;
             assert(GemmK % GemmK1Number == 0);
@@ -240,7 +240,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Bias_Activation_Input_N_Hi_Wi_C_Weight_K_Y_X
                               out_gemmm_gemmn_grid_desc,
                               bias_grid_desc_gemmm_gemmn);
         }
-        else if constexpr(ConvForwardSpecialization == ConvolutionForwardSpecialization_t::OddC)
+        else if constexpr(ConvForwardSpecialization == ConvolutionForwardSpecialization::OddC)
         { // C = odd value
             const index_t GemmKRaw = Y * X * C;
             const index_t GemmK = math::integer_least_multiple(GemmKRaw, K0PerBlock * GemmK1Number);
@@ -763,7 +763,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Bias_Activation_Input_N_Hi_Wi_C_Weight_K_Y_X
     static bool IsSupportedArgument(const Argument& arg)
     {
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             // check if it's 1x1, stride=1 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&
@@ -775,7 +775,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Bias_Activation_Input_N_Hi_Wi_C_Weight_K_Y_X
             }
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             // check if it's 1x1 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&

include/ck/tensor_operation/gpu/device/device_conv2d_fwd_xdl_c_shuffle_nhwc_kyxc_nhwk.hpp

@@ -26,7 +26,7 @@ template <
     typename InElementwiseOperation,
     typename WeiElementwiseOperation,
     typename OutElementwiseOperation,
-    ConvolutionForwardSpecialization_t ConvForwardSpecialization,
+    ConvolutionForwardSpecialization ConvForwardSpecialization,
     ck::index_t BlockSize,
     ck::index_t MPerBlock,
     ck::index_t NPerBlock,
@@ -120,7 +120,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_W
         const auto GemmMPad = GemmM - GemmMRaw;
 
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         { // 1x1, stride=1, pad=0
             const index_t GemmK = Y * X * C;
             assert(GemmK % GemmK1Number == 0);
@@ -165,7 +165,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_W
                               out_gemmm_gemmn_grid_desc);
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         { // 1x1, pad=0
             const index_t GemmK = Y * X * C;
             assert(GemmK % GemmK1Number == 0);
@@ -226,7 +226,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_W
                               wei_gemmk0_gemmn_gemmk1_grid_desc,
                               out_gemmm_gemmn_grid_desc);
         }
-        else if constexpr(ConvForwardSpecialization == ConvolutionForwardSpecialization_t::OddC)
+        else if constexpr(ConvForwardSpecialization == ConvolutionForwardSpecialization::OddC)
         { // C = odd value
             const index_t GemmKRaw = Y * X * C;
             const index_t GemmK = math::integer_least_multiple(GemmKRaw, K0PerBlock * GemmK1Number);
@@ -424,7 +424,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_W
         AccDataType,
         CDataType, // TODO: Add ShuffleType for DeviceConv2d
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -733,7 +733,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_W
     static bool IsSupportedArgument(const Argument& arg)
     {
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             // check if it's 1x1, stride=1 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&
@@ -745,7 +745,7 @@ struct DeviceConv2dFwdXdl_C_Shuffle_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_W
             }
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             // check if it's 1x1 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&

include/ck/tensor_operation/gpu/device/device_conv2d_fwd_xdl_nhwc_kyxc_nhwk.hpp

@@ -25,7 +25,7 @@ template <typename InDataType,
           typename InElementwiseOperation,
           typename WeiElementwiseOperation,
           typename OutElementwiseOperation,
-          ConvolutionForwardSpecialization_t ConvForwardSpecialization,
+          ConvolutionForwardSpecialization ConvForwardSpecialization,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
           ck::index_t NPerBlock,
@@ -119,7 +119,7 @@ struct DeviceConv2dFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
         const index_t GemmK0 = GemmK / GemmK1Number;
 
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             // A: input tensor
             const auto in_gemmmraw_gemmk_grid_desc =
@@ -159,7 +159,7 @@ struct DeviceConv2dFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
                               out_gemmm_gemmn_grid_desc);
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             // A: input tensor
             const auto in_n_hi_wi_c_grid_desc =
@@ -316,7 +316,7 @@ struct DeviceConv2dFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
         ABDataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -565,7 +565,7 @@ struct DeviceConv2dFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
     static bool IsSupportedArgument(const Argument& arg)
     {
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             // check if it's 1x1, stride=1 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&
@@ -577,7 +577,7 @@ struct DeviceConv2dFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
             }
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             // check if it's 1x1 conv
             if(!(arg.filter_spatial_lengths_[0] == 1 && arg.filter_spatial_lengths_[1] == 1 &&

include/ck/tensor_operation/gpu/device/device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk.hpp

@@ -83,7 +83,7 @@ template <typename InDataType,
           typename InElementwiseOperation,
           typename WeiElementwiseOperation,
           typename OutElementwiseOperation,
-          ConvolutionForwardSpecialization_t ConvForwardSpecialization,
+          ConvolutionForwardSpecialization ConvForwardSpecialization,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
           ck::index_t NPerBlock,
@@ -207,7 +207,7 @@ struct DeviceConv3dFwdXdl_Input_N_Di_Hi_Wi_C_Weight_K_Z_Y_X_C_Output_N_Do_Ho_Wo_
         const index_t Ho = output_spatial_lengths[1];
         const index_t Wo = output_spatial_lengths[2];
 
-        static_assert(ConvForwardSpecialization == ConvolutionForwardSpecialization_t::Default,
+        static_assert(ConvForwardSpecialization == ConvolutionForwardSpecialization::Default,
                       "Wrong! This specialization not implemented!");
 
         const auto in_desc_n_di_hi_wi_c =
@@ -287,7 +287,7 @@ struct DeviceConv3dFwdXdl_Input_N_Di_Hi_Wi_C_Weight_K_Z_Y_X_C_Output_N_Do_Ho_Wo_
         InDataType,
         AccDataType,
         OutDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_convnd_bwd_data_xdl_ndhwc_kzyxc_ndhwk.hpp

@@ -25,7 +25,7 @@ template <typename InDataType,
           typename InElementwiseOperation,
           typename WeiElementwiseOperation,
           typename OutElementwiseOperation,
-          ConvolutionBackwardDataSpecialization_t ConvBackwardDataSpecialization,
+          ConvolutionBackwardDataSpecialization ConvBackwardDataSpecialization,
           ck::index_t NumDimSpatial,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
@@ -116,7 +116,7 @@ struct DeviceConvndBwdDataXdl_Input_N_Di_Hi_Wi_C_Weight_K_Z_Y_X_C_Output_N_Do_Ho
         const auto in_n_wi_c_grid_desc = make_naive_tensor_descriptor_packed(make_tuple(N, Wi, C));
 
         if constexpr(ConvBackwardDataSpecialization ==
-                     ConvolutionBackwardDataSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionBackwardDataSpecialization::Filter1x1Stride1Pad0)
         {
             // A: output tensor
             const auto out_gemmk0_gemmm_gemmk1_grid_desc = transform_tensor_descriptor(
@@ -336,7 +336,7 @@ struct DeviceConvndBwdDataXdl_Input_N_Di_Hi_Wi_C_Weight_K_Z_Y_X_C_Output_N_Do_Ho
             make_naive_tensor_descriptor_packed(make_tuple(N, Hi, Wi, C));
 
         if constexpr(ConvBackwardDataSpecialization ==
-                     ConvolutionBackwardDataSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionBackwardDataSpecialization::Filter1x1Stride1Pad0)
         {
             // A: output tensor
             const auto out_gemmk0_gemmm_gemmk1_grid_desc = transform_tensor_descriptor(
@@ -618,7 +618,7 @@ struct DeviceConvndBwdDataXdl_Input_N_Di_Hi_Wi_C_Weight_K_Z_Y_X_C_Output_N_Do_Ho
             make_naive_tensor_descriptor_packed(make_tuple(N, Di, Hi, Wi, C));
 
         if constexpr(ConvBackwardDataSpecialization ==
-                     ConvolutionBackwardDataSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionBackwardDataSpecialization::Filter1x1Stride1Pad0)
         {
             // A: output tensor
             const auto out_gemmk0_gemmm_gemmk1_grid_desc = transform_tensor_descriptor(
@@ -959,7 +959,7 @@ struct DeviceConvndBwdDataXdl_Input_N_Di_Hi_Wi_C_Weight_K_Z_Y_X_C_Output_N_Do_Ho
         ABDataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -1385,7 +1385,7 @@ struct DeviceConvndBwdDataXdl_Input_N_Di_Hi_Wi_C_Weight_K_Z_Y_X_C_Output_N_Do_Ho
     static bool IsSupportedArgument(const Argument& arg)
     {
         if constexpr(ConvBackwardDataSpecialization ==
-                     ConvolutionBackwardDataSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionBackwardDataSpecialization::Filter1x1Stride1Pad0)
         {
             // check if it's 1x1, stride=1 pad = 0 conv
             for(int i = 0; i < NumDimSpatial; i++)
@@ -1527,7 +1527,7 @@ struct DeviceConvndBwdDataXdl_Input_N_Di_Hi_Wi_C_Weight_K_Z_Y_X_C_Output_N_Do_Ho
             << K0PerBlock
             << ">";
         if constexpr(ConvBackwardDataSpecialization ==
-                     ConvolutionBackwardDataSpecialization_t::Filter1x1Stride1Pad0){
+                     ConvolutionBackwardDataSpecialization::Filter1x1Stride1Pad0){
             
             str<< " Filter1x1Stride1Pad0";
         }

include/ck/tensor_operation/gpu/device/device_convnd_fwd_xdl_nhwc_kyxc_nhwk.hpp

@@ -44,7 +44,7 @@ template <typename InDataType,
           typename InElementwiseOperation,
           typename WeiElementwiseOperation,
           typename OutElementwiseOperation,
-          ConvolutionForwardSpecialization_t ConvForwardSpecialization,
+          ConvolutionForwardSpecialization ConvForwardSpecialization,
           ck::index_t NumDimSpatial,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
@@ -142,7 +142,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
         const index_t ConvStrideW = conv_filter_strides[0];
 
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             const auto in_gemmmraw_gemmk_grid_desc =
                 make_naive_tensor_descriptor_packed(make_tuple(gemm_m, gemm_k));
@@ -156,7 +156,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
                 make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             const auto in_n_wi_c_grid_desc =
                 make_naive_tensor_descriptor_packed(make_tuple(N, Wi, C));
@@ -262,7 +262,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
         const index_t ConvStrideW = conv_filter_strides[1];
 
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             const auto in_gemmmraw_gemmk_grid_desc =
                 make_naive_tensor_descriptor_packed(make_tuple(gemm_m, gemm_k));
@@ -276,7 +276,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
                 make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             const auto in_n_hi_wi_c_grid_desc =
                 make_naive_tensor_descriptor_packed(make_tuple(N, Hi, Wi, C));
@@ -395,7 +395,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
         const index_t ConvStrideW = conv_filter_strides[2];
 
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             const auto in_gemmmraw_gemmk_grid_desc =
                 make_naive_tensor_descriptor_packed(make_tuple(gemm_m, gemm_k));
@@ -409,7 +409,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
                 make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             const auto in_n_di_hi_wi_c_grid_desc =
                 make_naive_tensor_descriptor_packed(make_tuple(N, Di, Hi, Wi, C));
@@ -613,7 +613,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
         ABDataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -878,7 +878,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
         }
 
         if constexpr(ConvForwardSpecialization ==
-                     ConvolutionForwardSpecialization_t::Filter1x1Stride1Pad0)
+                     ConvolutionForwardSpecialization::Filter1x1Stride1Pad0)
         {
             // check if it's 1x1, stride=1 conv
             for(ck::index_t i = 0; i < NumDimSpatial; ++i)
@@ -891,7 +891,7 @@ struct DeviceConvNDFwdXdl_Input_N_Hi_Wi_C_Weight_K_Y_X_C_Output_N_Ho_Wo_K
             }
         }
         else if constexpr(ConvForwardSpecialization ==
-                          ConvolutionForwardSpecialization_t::Filter1x1Pad0)
+                          ConvolutionForwardSpecialization::Filter1x1Pad0)
         {
             // check if it's 1x1 conv
             for(ck::index_t i = 0; i < NumDimSpatial; ++i)

include/ck/tensor_operation/gpu/device/device_gemm_reduce_xdl_cshuffle.hpp

@@ -29,7 +29,7 @@ template <typename ALayout,
           typename CElementwiseOperation,
           typename D0ReduceOperation,
           typename D1ReduceOperation,
-          GemmSpecialization_t GemmSpecialization,
+          GemmSpecialization GemmSpec,
           index_t NumGemmKPrefetchStage,
           index_t BlockSize,
           index_t MPerBlock,
@@ -95,8 +95,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
         const auto MPad = M - MRaw;
         const auto KPad = K - KRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MKPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MKPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad both M and K
             assert(K % AK1 == 0);
@@ -119,8 +119,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
 
             return a_grid_desc_ak0_m_ak1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MNPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
+                          GemmSpec == GemmSpecialization::MNPadding)
         {
             // pad M, but not K
             assert(KRaw % AK1 == 0);
@@ -136,8 +136,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
 
             return a_grid_desc_ak0_m_ak1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::KPadding ||
-                          GemmSpecialization == GemmSpecialization_t::NKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
+                          GemmSpec == GemmSpecialization::NKPadding)
         {
             // pad K, but not M
             assert(K % AK1 == 0);
@@ -198,8 +198,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
         const auto NPad = N - NRaw;
         const auto KPad = K - KRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::NKPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::NKPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad both N and K
             assert(K % BK1 == 0);
@@ -222,8 +222,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
 
             return b_grid_desc_bk0_n_bk1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::NPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MNPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
+                          GemmSpec == GemmSpecialization::MNPadding)
         {
             // pad N, but not K
             assert(KRaw % BK1 == 0);
@@ -239,8 +239,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
 
             return b_grid_desc_bk0_n_bk1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::KPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
+                          GemmSpec == GemmSpecialization::MKPadding)
         {
             // pad K, but not N
             assert(K % BK1 == 0);
@@ -301,8 +301,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
         const auto MPad = M - MRaw;
         const auto NPad = N - NRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad M and N
             return transform_tensor_descriptor(c_grid_desc_mraw_nraw,
@@ -311,8 +311,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
                                                make_tuple(Sequence<0>{}, Sequence<1>{}),
                                                make_tuple(Sequence<0>{}, Sequence<1>{}));
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
+                          GemmSpec == GemmSpecialization::MKPadding)
         {
             // pad M, but not N
             return transform_tensor_descriptor(
@@ -321,8 +321,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
                 make_tuple(Sequence<0>{}, Sequence<1>{}),
                 make_tuple(Sequence<0>{}, Sequence<1>{}));
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::NPadding ||
-                          GemmSpecialization == GemmSpecialization_t::NKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
+                          GemmSpec == GemmSpecialization::NKPadding)
         {
             // pad N, but not M
             return transform_tensor_descriptor(
@@ -346,10 +346,10 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
         const auto M    = math::integer_divide_ceil(MRaw, MPerBlock) * MPerBlock;
         const auto MPad = M - MRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MKPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MPadding ||
+                     GemmSpec == GemmSpecialization::MNPadding ||
+                     GemmSpec == GemmSpecialization::MKPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad M
             return transform_tensor_descriptor(d_grid_desc_mraw,
@@ -382,8 +382,8 @@ struct DeviceGemmReduce_Xdl_CShuffle : public DeviceGemmReduce<AElementwiseOpera
         CElementwiseOperation,
         D0ReduceOperation,
         D1ReduceOperation,
-        InMemoryDataOperationEnum_t::Set,
-        InMemoryDataOperationEnum_t::AtomicAdd,
+        InMemoryDataOperationEnum::Set,
+        InMemoryDataOperationEnum::AtomicAdd,
         AGridDesc_AK0_M_AK1,
         BGridDesc_BK0_N_BK1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_gemm_xdl.hpp

@@ -27,7 +27,7 @@ template <typename ADataType,
           typename AElementwiseOperation,
           typename BElementwiseOperation,
           typename CElementwiseOperation,
-          GemmSpecialization_t GemmSpecialization,
+          GemmSpecialization GemmSpec,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
           ck::index_t NPerBlock,
@@ -80,7 +80,7 @@ struct DeviceGemmXdl
             }
         }();
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
 
@@ -119,7 +119,7 @@ struct DeviceGemmXdl
             }
         }();
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
 
@@ -154,7 +154,7 @@ struct DeviceGemmXdl
             }
         }();
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
             const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
@@ -186,7 +186,7 @@ struct DeviceGemmXdl
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_gemm_xdl_c_shuffle.hpp

@@ -138,7 +138,7 @@ struct DeviceGemmXdl_C_Shuffle
         AccDataType,
         CShuffleDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_gemm_xdl_c_shuffle_bias_2d.hpp

@@ -139,7 +139,7 @@ struct DeviceGemmXdl_C_Shuffle_Bias_2d
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_gemm_xdl_c_shuffle_bias_activation.hpp

@@ -147,7 +147,7 @@ struct DeviceGemmXdl_C_Shuffle_Bias_Activation
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_gemm_xdl_c_shuffle_bias_activation_add.hpp

@@ -169,7 +169,7 @@ struct DeviceGemmXdl_C_Shuffle_Bias_Activation_Add
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_gemm_xdl_cshuffle.hpp

@@ -24,7 +24,7 @@ template <typename ALayout,
           typename AElementwiseOperation,
           typename BElementwiseOperation,
           typename CElementwiseOperation,
-          GemmSpecialization_t GemmSpecialization,
+          GemmSpecialization GemmSpec,
           index_t NumGemmKPrefetchStage,
           index_t BlockSize,
           index_t MPerBlock,
@@ -84,8 +84,8 @@ struct DeviceGemm_Xdl_CShuffle
         const auto MPad = M - MRaw;
         const auto KPad = K - KRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MKPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MKPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad both M and K
             assert(K % AK1 == 0);
@@ -108,8 +108,8 @@ struct DeviceGemm_Xdl_CShuffle
 
             return a_grid_desc_ak0_m_ak1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MNPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
+                          GemmSpec == GemmSpecialization::MNPadding)
         {
             // pad M, but not K
             assert(KRaw % AK1 == 0);
@@ -125,8 +125,8 @@ struct DeviceGemm_Xdl_CShuffle
 
             return a_grid_desc_ak0_m_ak1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::KPadding ||
-                          GemmSpecialization == GemmSpecialization_t::NKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
+                          GemmSpec == GemmSpecialization::NKPadding)
         {
             // pad K, but not M
             assert(K % AK1 == 0);
@@ -187,8 +187,8 @@ struct DeviceGemm_Xdl_CShuffle
         const auto NPad = N - NRaw;
         const auto KPad = K - KRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::NKPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::NKPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad both N and K
             assert(K % BK1 == 0);
@@ -211,8 +211,8 @@ struct DeviceGemm_Xdl_CShuffle
 
             return b_grid_desc_bk0_n_bk1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::NPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MNPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
+                          GemmSpec == GemmSpecialization::MNPadding)
         {
             // pad N, but not K
             assert(KRaw % BK1 == 0);
@@ -228,8 +228,8 @@ struct DeviceGemm_Xdl_CShuffle
 
             return b_grid_desc_bk0_n_bk1;
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::KPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::KPadding ||
+                          GemmSpec == GemmSpecialization::MKPadding)
         {
             // pad K, but not N
             assert(K % BK1 == 0);
@@ -290,8 +290,8 @@ struct DeviceGemm_Xdl_CShuffle
         const auto MPad = M - MRaw;
         const auto NPad = N - NRaw;
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding ||
-                     GemmSpecialization == GemmSpecialization_t::MNKPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding ||
+                     GemmSpec == GemmSpecialization::MNKPadding)
         {
             // pad M and N
             return transform_tensor_descriptor(c_grid_desc_mraw_nraw,
@@ -300,8 +300,8 @@ struct DeviceGemm_Xdl_CShuffle
                                                make_tuple(Sequence<0>{}, Sequence<1>{}),
                                                make_tuple(Sequence<0>{}, Sequence<1>{}));
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::MPadding ||
-                          GemmSpecialization == GemmSpecialization_t::MKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::MPadding ||
+                          GemmSpec == GemmSpecialization::MKPadding)
         {
             // pad M, but not N
             return transform_tensor_descriptor(
@@ -310,8 +310,8 @@ struct DeviceGemm_Xdl_CShuffle
                 make_tuple(Sequence<0>{}, Sequence<1>{}),
                 make_tuple(Sequence<0>{}, Sequence<1>{}));
         }
-        else if constexpr(GemmSpecialization == GemmSpecialization_t::NPadding ||
-                          GemmSpecialization == GemmSpecialization_t::NKPadding)
+        else if constexpr(GemmSpec == GemmSpecialization::NPadding ||
+                          GemmSpec == GemmSpecialization::NKPadding)
         {
             // pad N, but not M
             return transform_tensor_descriptor(
@@ -340,7 +340,7 @@ struct DeviceGemm_Xdl_CShuffle
         AElementwiseOperation,
         BElementwiseOperation,
         CElementwiseOperation,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_AK0_M_AK1,
         BGridDesc_BK0_N_BK1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_gemm_xdl_splitk.hpp

@@ -31,7 +31,7 @@ template <typename ADataType,
           typename AElementwiseOperation,
           typename BElementwiseOperation,
           typename CElementwiseOperation,
-          GemmSpecialization_t GemmSpecialization,
+          GemmSpecialization GemmSpec,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
           ck::index_t NPerBlock,
@@ -91,7 +91,7 @@ struct DeviceGemmXdlSplitK
             make_tuple(Sequence<0>{}, Sequence<1>{}),
             make_tuple(Sequence<0>{}, Sequence<1>{}));
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
             return transform_tensor_descriptor(
@@ -136,7 +136,7 @@ struct DeviceGemmXdlSplitK
             make_tuple(Sequence<0>{}, Sequence<1>{}),
             make_tuple(Sequence<0>{}, Sequence<1>{}));
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
             return transform_tensor_descriptor(
@@ -170,7 +170,7 @@ struct DeviceGemmXdlSplitK
             }
         }();
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
             const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
@@ -209,7 +209,7 @@ struct DeviceGemmXdlSplitK
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -250,7 +250,7 @@ struct DeviceGemmXdlSplitK
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::AtomicAdd,
+        InMemoryDataOperationEnum::AtomicAdd,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_gemm_xdl_splitk_c_shuffle.hpp

@@ -31,7 +31,7 @@ template <typename ADataType,
           typename AElementwiseOperation,
           typename BElementwiseOperation,
           typename CElementwiseOperation,
-          GemmSpecialization_t GemmSpecialization,
+          GemmSpecialization GemmSpec,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
           ck::index_t NPerBlock,
@@ -93,7 +93,7 @@ struct DeviceGemmXdlSplitKCShuffle
             make_tuple(Sequence<0>{}, Sequence<1>{}),
             make_tuple(Sequence<0>{}, Sequence<1>{}));
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
             return transform_tensor_descriptor(
@@ -138,7 +138,7 @@ struct DeviceGemmXdlSplitKCShuffle
             make_tuple(Sequence<0>{}, Sequence<1>{}),
             make_tuple(Sequence<0>{}, Sequence<1>{}));
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
             return transform_tensor_descriptor(
@@ -172,7 +172,7 @@ struct DeviceGemmXdlSplitKCShuffle
             }
         }();
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
             const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
@@ -211,7 +211,7 @@ struct DeviceGemmXdlSplitKCShuffle
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,
@@ -253,7 +253,7 @@ struct DeviceGemmXdlSplitKCShuffle
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::AtomicAdd,
+        InMemoryDataOperationEnum::AtomicAdd,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_grouped_gemm_xdl.hpp

@@ -27,7 +27,7 @@ template <typename ADataType,
           typename AElementwiseOperation,
           typename BElementwiseOperation,
           typename CElementwiseOperation,
-          GemmSpecialization_t GemmSpecialization,
+          GemmSpecialization GemmSpec,
           ck::index_t BlockSize,
           ck::index_t MPerBlock,
           ck::index_t NPerBlock,
@@ -81,7 +81,7 @@ struct DeviceGroupedGemmXdl
             }
         }();
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
 
@@ -120,7 +120,7 @@ struct DeviceGroupedGemmXdl
             }
         }();
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
 
@@ -155,7 +155,7 @@ struct DeviceGroupedGemmXdl
             }
         }();
 
-        if constexpr(GemmSpecialization == GemmSpecialization_t::MNPadding)
+        if constexpr(GemmSpec == GemmSpecialization::MNPadding)
         {
             const auto PadM = (MPerBlock - M % MPerBlock) % MPerBlock;
             const auto PadN = (NPerBlock - N % NPerBlock) % NPerBlock;
@@ -187,7 +187,7 @@ struct DeviceGroupedGemmXdl
         ADataType, // TODO: distinguish A/B datatype
         AccDataType,
         CDataType,
-        InMemoryDataOperationEnum_t::Set,
+        InMemoryDataOperationEnum::Set,
         AGridDesc_K0_M_K1,
         BGridDesc_K0_N_K1,
         CGridDesc_M_N,

include/ck/tensor_operation/gpu/device/device_pool2d_fwd.hpp

@@ -10,7 +10,7 @@ namespace ck {
 namespace tensor_operation {
 namespace device {
 
-template <ck::ReduceTensorOp_t ReduceOpId>
+template <ck::ReduceTensorOp ReduceOpId>
 struct DevicePool2dFwd : public BaseOperator
 {
     virtual std::unique_ptr<BaseArgument>
@@ -29,7 +29,7 @@ struct DevicePool2dFwd : public BaseOperator
     virtual std::unique_ptr<BaseInvoker> MakeInvokerPointer() = 0;
 };
 
-template <ck::ReduceTensorOp_t ReduceOpId>
+template <ck::ReduceTensorOp ReduceOpId>
 using DevicePool2dFwdPtr = std::unique_ptr<DevicePool2dFwd<ReduceOpId>>;
 
 } // namespace device

include/ck/tensor_operation/gpu/device/device_pool2d_fwd_nhwc_nhwc.hpp

@@ -16,7 +16,7 @@ namespace device {
 template <typename InDataType,
           typename OutDataType,
           typename AccDataType,
-          ck::ReduceTensorOp_t ReduceOpId,
+          ck::ReduceTensorOp ReduceOpId,
           bool NeedIndices,
           ck::index_t BlockSize,
           ck::index_t ReduceMThreadClusterSize,
@@ -181,7 +181,7 @@ struct DevicePool2dFwd_Input_N_Hi_Wi_C_Output_N_Ho_Wo_C : public DevicePool2dFwd
             reduce_lowest_length_    = window_spatial_lengths[1];
 
             // TODO: is this correct?
-            if constexpr(ReduceOpId == ck::ReduceTensorOp_t::AVG)
+            if constexpr(ReduceOpId == ck::ReduceTensorOp::AVG)
             {
                 ck::index_t divider = window_spatial_lengths[0] * window_spatial_lengths[1];
                 in_element_op_      = InElementwiseOperation{divider};

include/ck/tensor_operation/gpu/device/gemm_specialization.hpp

@@ -5,7 +5,7 @@ namespace ck {
 namespace tensor_operation {
 namespace device {
 
-enum struct GemmSpecialization_t
+enum struct GemmSpecialization
 {
     Default,
     MPadding,

include/ck/tensor_operation/gpu/device/reduction_operator_mapping.hpp

@@ -37,11 +37,11 @@ namespace ck {
 // The boolean member "indexable" are also provided in reduce_binary_operactor for
 // easier checking by the upper-layer codes in the kernels.
 
-template <typename T, ReduceTensorOp_t Op>
+template <typename T, ReduceTensorOp Op>
 struct reduce_binary_operator;
 
 template <typename T>
-struct reduce_binary_operator<T, ReduceTensorOp_t::ADD>
+struct reduce_binary_operator<T, ReduceTensorOp::ADD>
 {
     using opType   = reduce::Add<T>;
     using dataType = T;
@@ -50,7 +50,7 @@ struct reduce_binary_operator<T, ReduceTensorOp_t::ADD>
 };
 
 template <typename T>
-struct reduce_binary_operator<T, ReduceTensorOp_t::MUL>
+struct reduce_binary_operator<T, ReduceTensorOp::MUL>
 {
     using opType   = reduce::Mul<T>;
     using dataType = T;
@@ -59,7 +59,7 @@ struct reduce_binary_operator<T, ReduceTensorOp_t::MUL>
 };
 
 template <typename T>
-struct reduce_binary_operator<T, ReduceTensorOp_t::MIN>
+struct reduce_binary_operator<T, ReduceTensorOp::MIN>
 {
     using opType   = reduce::Min<T>;
     using dataType = T;
@@ -68,7 +68,7 @@ struct reduce_binary_operator<T, ReduceTensorOp_t::MIN>
 };
 
 template <typename T>
-struct reduce_binary_operator<T, ReduceTensorOp_t::MAX>
+struct reduce_binary_operator<T, ReduceTensorOp::MAX>
 {
     using opType   = reduce::Max<T>;
     using dataType = T;
@@ -77,7 +77,7 @@ struct reduce_binary_operator<T, ReduceTensorOp_t::MAX>
 };
 
 template <typename T>
-struct reduce_binary_operator<T, ReduceTensorOp_t::AMAX>
+struct reduce_binary_operator<T, ReduceTensorOp::AMAX>
 {
     using opType   = reduce::AMax<T>;
     using dataType = T;
@@ -86,7 +86,7 @@ struct reduce_binary_operator<T, ReduceTensorOp_t::AMAX>
 };
 
 template <typename T>
-struct reduce_binary_operator<T, ReduceTensorOp_t::AVG>
+struct reduce_binary_operator<T, ReduceTensorOp::AVG>
 {
     using opType   = reduce::Add<T>;
     using dataType = T;
@@ -95,7 +95,7 @@ struct reduce_binary_operator<T, ReduceTensorOp_t::AVG>
 };
 
 template <typename T>
-struct reduce_binary_operator<T, ReduceTensorOp_t::NORM1>
+struct reduce_binary_operator<T, ReduceTensorOp::NORM1>
 {
     using opType   = reduce::Add<T>;
     using dataType = T;
@@ -104,7 +104,7 @@ struct reduce_binary_operator<T, ReduceTensorOp_t::NORM1>
 };
 
 template <typename T>
-struct reduce_binary_operator<T, ReduceTensorOp_t::NORM2>
+struct reduce_binary_operator<T, ReduceTensorOp::NORM2>
 {
     using opType   = reduce::Add<T>;
     using dataType = T;
@@ -115,7 +115,7 @@ struct reduce_binary_operator<T, ReduceTensorOp_t::NORM2>
 // The templated struct reduce_unary_operator maps the enum Ids of Reduce operators to two unary
 // functor classes.
 // The two unary functors are called before and afer the Reduction is executed respectively
-template <typename T, ReduceTensorOp_t Op, bool IsFirstReduce, bool IsLastReduce>
+template <typename T, ReduceTensorOp Op, bool IsFirstReduce, bool IsLastReduce>
 struct reduce_unary_operator
 {
     using InElementwiseOperation  = tensor_operation::element_wise::UnaryIdentic<T, T>;
@@ -123,42 +123,42 @@ struct reduce_unary_operator
 };
 
 template <typename T, bool IsFirstReduce>
-struct reduce_unary_operator<T, ReduceTensorOp_t::AVG, IsFirstReduce, true>
+struct reduce_unary_operator<T, ReduceTensorOp::AVG, IsFirstReduce, true>
 {
     using InElementwiseOperation  = tensor_operation::element_wise::UnaryIdentic<T, T>;
     using AccElementwiseOperation = tensor_operation::element_wise::UnaryIdentic<T, T, true>;
 };
 
 template <typename T, bool IsLastReduce>
-struct reduce_unary_operator<T, ReduceTensorOp_t::NORM1, true, IsLastReduce>
+struct reduce_unary_operator<T, ReduceTensorOp::NORM1, true, IsLastReduce>
 {
     using InElementwiseOperation  = tensor_operation::element_wise::UnaryAbs<T, T>;
     using AccElementwiseOperation = tensor_operation::element_wise::UnaryIdentic<T, T>;
 };
 
 template <typename T, bool IsLastReduce>
-struct reduce_unary_operator<T, ReduceTensorOp_t::AMAX, true, IsLastReduce>
+struct reduce_unary_operator<T, ReduceTensorOp::AMAX, true, IsLastReduce>
 {
     using InElementwiseOperation  = tensor_operation::element_wise::UnaryAbs<T, T>;
     using AccElementwiseOperation = tensor_operation::element_wise::UnaryIdentic<T, T>;
 };
 
 template <typename T>
-struct reduce_unary_operator<T, ReduceTensorOp_t::NORM2, true, false>
+struct reduce_unary_operator<T, ReduceTensorOp::NORM2, true, false>
 {
     using InElementwiseOperation  = tensor_operation::element_wise::UnarySquare<T, T>;
     using AccElementwiseOperation = tensor_operation::element_wise::UnaryIdentic<T, T>;
 };
 
 template <typename T>
-struct reduce_unary_operator<T, ReduceTensorOp_t::NORM2, true, true>
+struct reduce_unary_operator<T, ReduceTensorOp::NORM2, true, true>
 {
     using InElementwiseOperation  = tensor_operation::element_wise::UnarySquare<T, T>;
     using AccElementwiseOperation = tensor_operation::element_wise::UnarySqrt<T, T>;
 };
 
 template <typename T>
-struct reduce_unary_operator<T, ReduceTensorOp_t::NORM2, false, true>
+struct reduce_unary_operator<T, ReduceTensorOp::NORM2, false, true>
 {
     using InElementwiseOperation  = tensor_operation::element_wise::UnaryIdentic<T, T>;
     using AccElementwiseOperation = tensor_operation::element_wise::UnarySqrt<T, T>;