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Implement DPP8 based GEMM for Navi21 (#826)
[ROCm/composable_kernel commit: d4c84256f7]
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@@ -6,6 +6,8 @@ if(DL_KERNELS)
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if(DTYPES MATCHES "fp16" OR NOT DEFINED DTYPES)
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add_example_executable(example_gemm_dl_fp16 gemm_dl_fp16.cpp)
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add_dependencies(example_gemm_dl example_gemm_dl_fp16)
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add_example_executable(example_gemm_dl_dpp8_fp16 gemm_dl_dpp8_fp16.cpp)
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add_dependencies(example_gemm_dl example_gemm_dl_dpp8_fp16)
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endif()
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if(DTYPES MATCHES "int8" OR NOT DEFINED DTYPES)
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add_example_executable(example_gemm_dl_int8 gemm_dl_int8.cpp)
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37
example/01_gemm/gemm_dl_dpp8_fp16.cpp
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37
example/01_gemm/gemm_dl_dpp8_fp16.cpp
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@@ -0,0 +1,37 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2018-2023, Advanced Micro Devices, Inc. All rights reserved.
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#include "common.hpp"
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#include "ck/tensor_operation/gpu/device/impl/device_gemm_dl_dpp8.hpp"
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using ADataType = ck::half_t;
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using BDataType = ck::half_t;
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using CDataType = ck::half_t;
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using AccDataType = float;
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using ALayout = Col;
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using BLayout = Row;
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using CLayout = Row;
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using AElementOp = PassThrough;
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using BElementOp = PassThrough;
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using CElementOp = PassThrough;
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static constexpr auto GemmDefault = ck::tensor_operation::device::GemmSpecialization::Default;
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// clang-format off
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using DeviceGemmInstance = ck::tensor_operation::device::DeviceGemmDlDpp8
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// ######| AData| BData| CData| AccData| ALayout| BLayout| CLayout| A| B| C| GEMM| Block| MPer| NPer| K0Per| K1| M1Per| N1Per| KPer| M11N11Thread| M11N11Thread| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| ABlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| BBlockTransfer| CThreadTransfer| CThreadTransfer| CThreadTransfer|
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// ######| Type| Type| Type| Type| | | | Elementwise| Elementwise| Elementwise| Spacialization| Size| Block| Block| Block| | ThreadM111| ThreadN111| Thread| ClusterM110Xs| ClusterN110Xs| ThreadSliceLengths| ThreadClusterLengths| ThreadCluster| SrcAccess| SrcVectorTensor| SrcVectorTensor| DstVectorTensor| ThreadSliceLengths| ThreadClusterLengths| ThreadCluster| SrcAccess| SrcVectorTensor| SrcVectorTensor| DstVectorTensor| SrcDstAccess| SrcDstVectorDim| DstScalarPerVector|
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// ######| | | | | | | | Operation| Operation| Operation| | | | | | | | | | | | K0_M0_M1_K1| K0_M0_M1_K1| ArrangeOrder| Order| Lengths_K0_M0_M1_K1| ContiguousDimOrder| Lengths_K0_M0_M1_K1| K0_N0_N1_K1| K0_N0_N1_K1| ArrangeOrder| Order| Lengths_K0_N0_N1_K1| ContiguousDimOrder| Lengths_K0_N0_N1_K1| Order| | |
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// ######| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
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< ADataType, BDataType, CDataType, AccDataType, ALayout, BLayout, CLayout, AElementOp, BElementOp, CElementOp, GemmDefault, 256, 128, 128, 16, 2, 1, 8, 8, S<8, 8>, S<4, 1>, S<2, 1, 4, 2>, S<8, 1, 32, 1>, S<0, 3, 1, 2>, S<0, 3, 1, 2>, S<1, 1, 4, 1>, S<0, 3, 1, 2>, S<1, 1, 4, 2>, S<2, 1, 4, 2>, S<8, 1, 32, 1>, S<0, 3, 1, 2>, S<0, 3, 1, 2>, S<1, 1, 4, 1>, S<0, 3, 1, 2>, S<1, 1, 4, 2>, S<0, 1, 2, 3, 4, 5>, 5, 4>;
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// clang-format on
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using ReferenceGemmInstance = ck::tensor_operation::host::
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ReferenceGemm<ADataType, BDataType, CDataType, AccDataType, AElementOp, BElementOp, CElementOp>;
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#include "run_gemm_example.inc"
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int main(int argc, char* argv[]) { return !run_gemm_example(argc, argv); }
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