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[rocm-libraries] ROCm/rocm-libraries#6302 (commit 8d419e8)
CK: Remove 41 commented-out dead code blocks (~200 lines) (#6302) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Depends on #6300 ## Summary Remove 41 commented-out code blocks across 33 files in Composable Kernel, totaling ~200 lines. Identified using an automated dead code scanning skill (`ck-dead-code`) with a calibrated two-stage pipeline: 1. **Pre-filter**: Keyword-based scan found 1,338 `//`-commented blocks. Calibrated heuristics (trained on 50-sample expert classification) reduced to 89 high-confidence candidates — 93% noise reduction. 2. **Expert triage**: LLM expert classified each block in context as CODE_REMOVE, CODE_KEEP, or NOT_CODE. | Classification | Count | |---------------|-------| | Removed (this PR) | 41 | | Kept (debug helpers, alt configs, reference impls) | 32 | | Not code (false positives) | 16 | Removed blocks include: superseded implementations, old test data, abandoned stubs, unreachable code, and buggy dead code.
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assistant-librarian[bot]
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@@ -339,16 +339,6 @@ struct GroupedFlatmmKernel : FlatmmKernel<TilePartitioner_, FlatmmPipeline_, Epi
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{
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return hostArgs;
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}
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// CK_TILE_HOST static constexpr auto
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// MakeKernelArgs(const ContiguousGroupedFlatmmHostArgs& hostArgs)
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// {
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// return hostArgs;
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// }
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// CK_TILE_HOST static constexpr auto
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// MakeKernelArgs(const MaskedGroupedFlatmmHostArgs& hostArgs)
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// {
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// return hostArgs;
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// }
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template <class ScaleM = FlatmmScalePointer<-1>,
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class ScaleN = FlatmmScalePointer<-1>,
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@@ -483,13 +483,6 @@ struct MoeFlatmmKernel
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if constexpr(std::is_same_v<BLayout, tensor_layout::gemm::RowMajor>)
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{
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// if(kargs.N % TilePartitioner::NPerBlock != 0 && FlatmmPipeline::kPadN == false)
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// {
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// std::cerr << "Can't support N that is not a multiple of NPerBlock"
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// " without padding!"
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// << std::endl;
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// return false;
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// }
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if(kargs.N % FlatmmPipeline::GetVectorSizeB() != 0)
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{
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std::cerr << "N is not a multiple of vector load size for B tensor!" << std::endl;
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@@ -392,10 +392,6 @@ struct UniversalFlatmmPipelineAgBgCrPolicy
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constexpr index_t M1 = BlockSize / get_warp_size();
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static_assert(M2 != 0, "M2 is zero, which will lead to a division by zero error.");
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static_assert(M1 != 0, "M1 is zero, which will lead to a division by zero error.");
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// constexpr index_t M0 = MPerBlock / (M2 * M1);
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// static_assert(M0 * M1 * M2 == MPerBlock,
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// "Incorrect M0, M2, M1 configuration! "
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// "M0, M1, M2 must cover whole MPerBlock!");
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return make_static_tile_distribution(
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tile_distribution_encoding<sequence<1>,
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@@ -1151,11 +1151,6 @@ struct F16xMXF4FlatmmPipelineAGmemBGmemCRegV1
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a_warp_tensor(number<AwarpIter>{}) =
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load_tile(a_warp_windows_pong(number<AmIter>{})(number<AkIter>{}));
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}
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// barrier
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// if constexpr((kIter == KIterPerWarp - 1) && (mIter == MIter_2nd_last))
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// {
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// block_sync_lds();
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// }
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});
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}
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});
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@@ -1636,10 +1631,6 @@ struct F8xMXF4FlatmmPipelineAGmemBGmemCRegV1
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? Aload_rep
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: 0;
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}
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// if((kIter % KPerScaleLoad == 0) && (mIter == 0))
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// {
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// load_perM = load_perM + 1;
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// }
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SchedulerPerM(dsread_perM, dswrite_perM, load_perM);
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}
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}
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@@ -103,13 +103,8 @@ struct MoeFlatmmPipelineAGmemBGmemCRegV1
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static constexpr index_t Aload_num_perK = dswrite_num_perK;
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static constexpr index_t Aload_rep = dswrite_rep;
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static constexpr index_t Bload_num_perK = kNPerBlock * WG::kK / NWarp / BK1 / WaveSize;
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// static constexpr index_t ScaleBload_K1 = ContinuousScaleNPerThread *
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// ContinuousScaleKPerThread; static constexpr index_t ScaleBload_num =
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// kNPerBlock * kKPerBlock / NWarp / 32 / ScaleBload_K1 /
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// WaveSize; // BlockN * BlockK / NWarp / ScalePerK / ScaleB_K1 / wavesize
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// static constexpr index_t KPerScaleLoad = KIterPerWarp / ScaleBload_num;
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static constexpr index_t HalfMIter = (MIterPerWarp + 1) / 2;
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static constexpr index_t Bload_rep = (Bload_num_perK + HalfMIter - 1) / HalfMIter;
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static constexpr index_t HalfMIter = (MIterPerWarp + 1) / 2;
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static constexpr index_t Bload_rep = (Bload_num_perK + HalfMIter - 1) / HalfMIter;
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static constexpr index_t mfma_perM_perK = NIterPerWarp * mfma_per_wg;
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static constexpr index_t dswrite_mIter = (DsWritePreIssue - 1) % MIterPerWarp;
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@@ -352,10 +347,6 @@ struct MoeFlatmmPipelineAGmemBGmemCRegV1
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? Aload_rep
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: 0;
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}
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// if((kIter % KPerScaleLoad == 0) && (mIter == 0))
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// {
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// load_perM = load_perM + 1;
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// }
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SchedulerPerM(dsread_perM, dswrite_perM, load_perM);
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}
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}
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@@ -390,10 +390,6 @@ struct MXFlatmmPipelineAGmemBGmemCRegV1 : FlatmmPipelineAGmemBGmemCRegV1<Problem
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? Aload_rep
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: 0;
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}
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// if((kIter % KPerScaleLoad == 0) && (mIter == 0))
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// {
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// load_perM = load_perM + 1;
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// }
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SchedulerPerM(dsread_perM, dswrite_perM, load_perM);
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}
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}
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